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initial check in based on SVN revision 575

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This commit is contained in:
Brent Perteet
2025-05-14 12:57:39 -05:00
commit a3ef12e24a
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131
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/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2018 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include "fsl_common.h"
#include "clock_config.h"
#include "board.h"
#include "fsl_debug_console.h"
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
#include "fsl_i2c.h"
#endif /* SDK_I2C_BASED_COMPONENT_USED */
#if defined BOARD_USE_CODEC
#include "fsl_wm8904.h"
#endif
/*******************************************************************************
* Variables
******************************************************************************/
/* Clock rate on the CLKIN pin */
const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
/*******************************************************************************
* Code
******************************************************************************/
/* Initialize debug console. */
status_t BOARD_InitDebugConsole(void)
{
#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
status_t result;
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
RESET_PeripheralReset(BOARD_DEBUG_UART_RST);
result = DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE,
BOARD_DEBUG_UART_CLK_FREQ);
assert(kStatus_Success == result);
return result;
#else
return kStatus_Success;
#endif
}
status_t BOARD_InitDebugConsole_Core1(void)
{
#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
status_t result;
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
RESET_PeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
result = DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1,
BOARD_DEBUG_UART_TYPE_CORE1, BOARD_DEBUG_UART_CLK_FREQ_CORE1);
assert(kStatus_Success == result);
return result;
#else
return kStatus_Success;
#endif
}
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
{
i2c_master_config_t i2cConfig = {0};
I2C_MasterGetDefaultConfig(&i2cConfig);
I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
}
status_t BOARD_I2C_Send(I2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize)
{
i2c_master_transfer_t masterXfer;
/* Prepare transfer structure. */
masterXfer.slaveAddress = deviceAddress;
masterXfer.direction = kI2C_Write;
masterXfer.subaddress = subAddress;
masterXfer.subaddressSize = subaddressSize;
masterXfer.data = txBuff;
masterXfer.dataSize = txBuffSize;
masterXfer.flags = kI2C_TransferDefaultFlag;
return I2C_MasterTransferBlocking(base, &masterXfer);
}
status_t BOARD_I2C_Receive(I2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize)
{
i2c_master_transfer_t masterXfer;
/* Prepare transfer structure. */
masterXfer.slaveAddress = deviceAddress;
masterXfer.subaddress = subAddress;
masterXfer.subaddressSize = subaddressSize;
masterXfer.data = rxBuff;
masterXfer.dataSize = rxBuffSize;
masterXfer.direction = kI2C_Read;
masterXfer.flags = kI2C_TransferDefaultFlag;
return I2C_MasterTransferBlocking(base, &masterXfer);
}
void BOARD_Codec_I2C_Init(void)
{
BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
}
status_t BOARD_Codec_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Codec_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
}
#endif /* SDK_I2C_BASED_COMPONENT_USED */

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/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2018 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include "clock_config.h"
#include "fsl_common.h"
#include "fsl_gpio.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "LPCXPRESSO54114"
#define BOARD_EXTCLKINRATE (0)
/*! @brief The UART to use for debug messages. */
#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) USART0
#define BOARD_DEBUG_UART_INSTANCE 0U
#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetFlexCommClkFreq(0)
#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0
#define BOARD_DEBUG_UART_RST kFC0_RST_SHIFT_RSTn
#define BOARD_UART_IRQ FLEXCOMM0_IRQn
#define BOARD_UART_IRQ_HANDLER FLEXCOMM0_IRQHandler
#define BOARD_DEBUG_UART_TYPE_CORE1 kSerialPort_Uart
#define BOARD_DEBUG_UART_BASEADDR_CORE1 (uint32_t) USART2
#define BOARD_DEBUG_UART_INSTANCE_CORE1 2U
#define BOARD_DEBUG_UART_CLK_FREQ_CORE1 CLOCK_GetFlexCommClkFreq(2)
#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM2
#define BOARD_DEBUG_UART_RST_CORE1 kFC2_RST_SHIFT_RSTn
#define BOARD_UART_IRQ_CORE1 FLEXCOMM2_IRQn
#define BOARD_UART_IRQ_HANDLER_CORE1 FLEXCOMM2_IRQHandler
#define BOARD_DEBUG_SPI_CLK_FREQ 12000000
#ifndef BOARD_DEBUG_UART_BAUDRATE
#define BOARD_DEBUG_UART_BAUDRATE 115200
#endif /* BOARD_DEBUG_UART_BAUDRATE */
#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200
#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
#ifndef BOARD_LED_RED_GPIO
#define BOARD_LED_RED_GPIO GPIO
#endif
#define BOARD_LED_RED_GPIO_PORT 0U
#ifndef BOARD_LED_RED_GPIO_PIN
#define BOARD_LED_RED_GPIO_PIN 29U
#endif
#ifndef BOARD_LED_GREEN_GPIO
#define BOARD_LED_GREEN_GPIO GPIO
#endif
#define BOARD_LED_GREEN_GPIO_PORT 1U
#ifndef BOARD_LED_GREEN_GPIO_PIN
#define BOARD_LED_GREEN_GPIO_PIN 10U
#endif
#ifndef BOARD_LED_BLUE_GPIO
#define BOARD_LED_BLUE_GPIO GPIO
#endif
#define BOARD_LED_BLUE_GPIO_PORT 1U
#ifndef BOARD_LED_BLUE_GPIO_PIN
#define BOARD_LED_BLUE_GPIO_PIN 9U
#endif
#ifndef BOARD_SW1_GPIO
#define BOARD_SW1_GPIO GPIO
#endif
#define BOARD_SW1_GPIO_PORT 0U
#ifndef BOARD_SW1_GPIO_PIN
#define BOARD_SW1_GPIO_PIN 24U
#endif
#define BOARD_SW1_NAME "SW1"
#define BOARD_SW3_IRQ PIN_INT0_IRQn
#define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler
#ifndef BOARD_SW2_GPIO
#define BOARD_SW2_GPIO GPIO
#endif
#define BOARD_SW2_GPIO_PORT 0U
#ifndef BOARD_SW2_GPIO_PIN
#define BOARD_SW2_GPIO_PIN 31U
#endif
#define BOARD_SW2_NAME "SW2"
#define BOARD_SW3_IRQ PIN_INT0_IRQn
#define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler
#ifndef BOARD_SW3_GPIO
#define BOARD_SW3_GPIO GPIO
#endif
#define BOARD_SW3_GPIO_PORT 0U
#ifndef BOARD_SW3_GPIO_PIN
#define BOARD_SW3_GPIO_PIN 4U
#endif
#define BOARD_SW3_NAME "SW3"
#define BOARD_SW3_IRQ PIN_INT0_IRQn
#define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler
#define BOARD_SW3_GPIO_PININT_INDEX 0
#define BOARD_ARDUINO_INT_IRQ (GINT0_IRQn)
#define BOARD_ARDUINO_I2C_IRQ (FLEXCOMM4_IRQn)
#define BOARD_ARDUINO_I2C_INDEX (4)
/* Board led color mapping */
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
#define LED_RED_INIT(output) \
GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_RED */
#define LED_RED_ON() \
GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */
#define LED_RED_OFF() \
GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */
#define LED_RED_TOGGLE() \
GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
#define LED_GREEN_INIT(output) \
GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_GREEN */
#define LED_GREEN_ON() \
GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
#define LED_GREEN_OFF() \
GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
#define LED_GREEN_TOGGLE() \
GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
#define LED_BLUE_INIT(output) \
GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_BLUE */
#define LED_BLUE_ON() \
GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
#define LED_BLUE_OFF() \
GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
#define LED_BLUE_TOGGLE() \
GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
#define BOARD_CODEC_I2C_BASEADDR I2C4
#define BOARD_CODEC_I2C_INSTANCE 4U
#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
/* Display. */
#define BOARD_LCD_DC_GPIO GPIO
#define BOARD_LCD_DC_GPIO_PORT 1U
#define BOARD_LCD_DC_GPIO_PIN 15U
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*******************************************************************************
* API
******************************************************************************/
status_t BOARD_InitDebugConsole(void);
status_t BOARD_InitDebugConsole_Core1(void);
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz);
status_t BOARD_I2C_Send(I2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize);
status_t BOARD_I2C_Receive(I2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize);
void BOARD_Codec_I2C_Init(void);
status_t BOARD_Codec_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Codec_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
#endif /* SDK_I2C_BASED_COMPONENT_USED */
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _BOARD_H_ */

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to set up clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Setup voltage for the fastest of the clock outputs
*
* 3. Set up wait states of the flash.
*
* 4. Set up all dividers.
*
* 5. Set up all selectors to provide selected clocks.
*/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v11.0
processor: LPC54114J256
package_id: LPC54114J256BD64
mcu_data: ksdk2_0
processor_version: 13.0.1
board: LPCXpresso54114
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
#include "fsl_power.h"
#include "fsl_clock.h"
#include "clock_config.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockPLL150M();
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO12M
outputs:
- {id: System_clock.outFreq, value: 12 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO12M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO12M configuration
******************************************************************************/
void BOARD_BootClockFRO12M(void)
{
#ifndef SDK_SECONDARY_CORE
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */
POWER_SetVoltageForFreq(12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
#endif
}
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF48M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFROHF48M
outputs:
- {id: System_clock.outFreq, value: 48 MHz}
settings:
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFROHF48M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFROHF48M configuration
******************************************************************************/
void BOARD_BootClockFROHF48M(void)
{
#ifndef SDK_SECONDARY_CORE
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */
POWER_SetVoltageForFreq(48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(48000000U); /*!< Set FLASH wait states for core */
CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
#endif
}
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF96M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFROHF96M
outputs:
- {id: System_clock.outFreq, value: 96 MHz}
settings:
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
sources:
- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFROHF96M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFROHF96M configuration
******************************************************************************/
void BOARD_BootClockFROHF96M(void)
{
#ifndef SDK_SECONDARY_CORE
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */
POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
#endif
}
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL150M
called_from_default_init: true
outputs:
- {id: PLL_clock.outFreq, value: 144 MHz}
- {id: System_clock.outFreq, value: 144 MHz}
settings:
- {id: PLL_Mode, value: Normal}
- {id: SYSCON.DIRECTO.sel, value: SYSCON.PLL}
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.clk_in}
- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
- {id: SYSCON.M_MULT.scale, value: '48', locked: true}
- {id: SYSCON.N_DIV.scale, value: '8', locked: true}
- {id: SYSCON.PLL_BYPASS.sel, value: SYSCON.DIRECTO}
- {id: SYSCON.SYSPLLCLKSEL.sel, value: SYSCON.clk_in}
sources:
- {id: SYSCON.clk_in.outFreq, value: 24 MHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockPLL150M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL150M configuration
******************************************************************************/
void BOARD_BootClockPLL150M(void)
{
#ifndef SDK_SECONDARY_CORE
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */
POWER_SetVoltageForFreq(144000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(144000000U); /*!< Set FLASH wait states for core */
/*!< Set up PLL */
CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Switch PLL clock source selector to EXT_CLK */
const pll_setup_t pllSetup = {
.syspllctrl = SYSCON_SYSPLLCTRL_BANDSEL_MASK | SYSCON_SYSPLLCTRL_SELI(52U) | SYSCON_SYSPLLCTRL_SELP(25U) | SYSCON_SYSPLLCTRL_DIRECTO_MASK,
.syspllndec = SYSCON_SYSPLLNDEC_NDEC(44U),
.syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
.syspllssctrl = {(SYSCON_SYSPLLSSCTRL0_MDEC(32682U) | SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK),0x0U},
.pllRate = 144000000U,
.flags = PLL_SETUPFLAG_POWERUP
};
CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */
/* PLL input more than 20 MHz */
/* SYSTICK is used for waiting for PLL stabilization */
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SysTick divider counter and halt it */
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 3U, false); /*!< Set SysTick divider to value 3 */
SysTick->LOAD = 27999UL; /*!< Set SysTick count value */
SysTick->VAL = 0UL; /*!< Reset current count value */
SysTick->CTRL = SysTick_CTRL_ENABLE_Msk; /*!< Enable SYSTICK */
while((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != SysTick_CTRL_COUNTFLAG_Msk){} /*!< Waiting for PLL stabilization */
SysTick->CTRL = 0UL; /*!< Stop SYSTICK */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */
SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(1U)); /*!< Switch MAINCLKSELA to EXT_CLK even it is not used for MAINCLKSELB */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
#endif
}

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_XTAL0_CLK_HZ 12000000U /*!< Board xtal0 frequency in Hz */
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO12M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO12M_ADC_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_ASYNCAPB_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_DMIC_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOMS_CLK32K_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_MASTER_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_PLL_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SYSTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK 12000000UL
#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_USB_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockFRO12M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO12M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF48M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFROHF48M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFROHF48M_ADC_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_ASYNCAPB_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_DMIC_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_FXCOMS_CLK32K_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_MASTER_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_PLL_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_SYSTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_SYSTEM_CLOCK 48000000UL
#define BOARD_BOOTCLOCKFROHF48M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_USB_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF48M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockFROHF48M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFROHF48M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF96M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFROHF96M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFROHF96M_ADC_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_ASYNCAPB_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_DMIC_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOMS_CLK32K_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_MASTER_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_PLL_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SYSTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK 96000000UL
#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_USB_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockFROHF96M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFROHF96M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockPLL150M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKPLL150M_ADC_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_ASYNCAPB_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_DMIC_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOMS_CLK32K_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_MASTER_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_PLL_CLOCK 144000000UL
#define BOARD_BOOTCLOCKPLL150M_SYSTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK 144000000UL
#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_USB_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockPLL150M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockPLL150M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

954
board/pin_mux.c Normal file
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@@ -0,0 +1,954 @@
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v13.1
processor: LPC54114J256
package_id: LPC54114J256BD64
mcu_data: ksdk2_0
processor_version: 13.0.1
board: LPCXpresso54114
pin_labels:
- {pin_num: '3', pin_signal: PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1, label: 'J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX', identifier: SFTKY4}
- {pin_num: '2', pin_signal: PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0, label: 'J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP', identifier: SFTKY3}
- {pin_num: '1', pin_signal: PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1, label: 'J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL', identifier: RST_RF}
- {pin_num: '4', pin_signal: PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3, label: 'J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX', identifier: RF_BUSY}
- {pin_num: '7', pin_signal: PIO1_16/PDM0_DATA/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1, label: 'J1[19]/P1_16-CT32B0_MAT0-GYRO_INT1', identifier: CTL_PSU}
- {pin_num: '10', pin_signal: PIO1_17/MCLK/UTICK_CAP3, label: 'J9[9]/P1_17-IR_LEARN_EN', identifier: E_STOP}
- {pin_num: '11', pin_signal: PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0, label: 'J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED', identifier: I_OUT1}
- {pin_num: '12', pin_signal: PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1, label: 'J9[2]/P0_30-ADC1', identifier: V_OUT1}
- {pin_num: '14', pin_signal: PIO1_0/PDM0_DATA/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3, label: 'J2[3]/P1_0-PDM0_DATA-CT32B3_MAT1', identifier: PSU_MON}
- {pin_num: '15', pin_signal: PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4, label: 'J1[15]/P1_1-FC5_SSEL2', identifier: VBAT_MON}
- {pin_num: '16', pin_signal: PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5, label: 'J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3', identifier: ID1}
- {pin_num: '17', pin_signal: PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6, label: 'J2[20]/P1_3-FC7_SSEL2-CT32B0_CAP1', identifier: ID2}
- {pin_num: '18', pin_signal: PIO1_4/PDM1_CLK/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7, label: 'J2[18]/J9[10]/P1_4-ADC7-PDM1_CLK-FC7_RTS-FC3_TXD',
identifier: V_CHK}
- {pin_num: '19', pin_signal: PIO1_5/PDM1_DATA/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8, label: 'J2[16]/J9[12]/P1_5-ADC8-PDM1_DAT-FC7_CTS', identifier: TEMP}
- {pin_num: '27', pin_signal: PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10, label: 'J1[10]/P1_7-FC7_RXD_SDA_MOSI_DATA', identifier: BAT_ID}
- {pin_num: '28', pin_signal: PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11, label: 'J1[12]/J9[6]/P1_8-ADC11-FC7_TXD_SCL_MISO_FRAME', identifier: LCD_CD}
- {pin_num: '29', pin_signal: PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED, label: 'J9[5]/D2[3]/P1_9-BLUE_LED', identifier: SIG_EN}
- {pin_num: '30', pin_signal: PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME, label: 'J9[8]/D2[4]/P1_10-SCT4-LED_GREEN', identifier: SD_EN}
- {pin_num: '31', pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3, label: 'U18[4]/TO_MUX_P0_0-ISP_RX', identifier: FC0_MOSI}
- {pin_num: '32', pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1, label: 'U6[4]/U22[3]/P0_1-ISP_TX', identifier: FC0_MISO}
- {pin_num: '36', pin_signal: PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3/CTIMER2_CAP1, label: 'J9[1]/P0_2-GPIO_SPI_CS', identifier: SFTKY1}
- {pin_num: '37', pin_signal: PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3, label: 'J9[3]/P0_3-GPIO_SPI_CS', identifier: SFTKY2}
- {pin_num: '39', pin_signal: PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0, label: 'J1[20]/P0_5-FC6_RXD_SDA_MOSI_DATA', identifier: RXD}
- {pin_num: '40', pin_signal: PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0, label: 'J1[18]/P0_6-FC6_TXD_SCL_MISO_FRAME', identifier: TXD}
- {pin_num: '41', pin_signal: PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2, label: 'J1[16]/P0_7-FC6_SCK', identifier: POT_CS}
- {pin_num: '42', pin_signal: PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS, label: 'J2[19]/P1_11-FC6_RTS_SSEL1-MAG_DRDY', identifier: RAMP_EN}
- {pin_num: '43', pin_signal: PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3, label: 'J2[15]/P0_8-FC2_RXD_SDA_MOSI', identifier: PWM_BAR}
- {pin_num: '44', pin_signal: PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0, label: 'J2[13]/P0_9-FC2_TXD_SCL_MISO', identifier: PWM_CPU}
- {pin_num: '45', pin_signal: PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0, label: 'J2[11]/P0_10-FC2_SCK-CT32B3_MAT0', identifier: CS_EEP}
- {pin_num: '46', pin_signal: PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1, label: 'J4[4]/U9[13]/BRIDGE_T_SCK', identifier: SCLK}
- {pin_num: '47', pin_signal: PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3, label: 'J4[2]/U9[11]/BRIDGE_T_MOSI', identifier: SDATA}
- {pin_num: '48', pin_signal: PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0, label: 'J4[3]/U15[4]/BRIDGE_T_MISO', identifier: SDIN}
- {pin_num: '49', pin_signal: PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/CTIMER2_MAT1/FC1_SCK, label: 'J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3', identifier: SFTKY0}
- {pin_num: '50', pin_signal: PIO0_15/FC3_RTS_SCL_SSEL1/SWO/CTIMER2_MAT2/FC4_SCK, label: 'J2[10]/JS30/U4[12]/TDO-SWO_TRGT-SPIFI_IO2', identifier: LCD_CS}
- {pin_num: '51', pin_signal: PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2, label: 'J2[9]/P1_12-CT32B1_MAT0-ACCl_INT1', identifier: SIG_RST}
- {pin_num: '54', pin_signal: PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA, label: 'J2[7]/P1_13-CT32B1_MAT1', identifier: SD_RST}
- {pin_num: '57', pin_signal: PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS, label: 'J2[1]/P1_14-SCTO7', identifier: RAMP_RST}
- {pin_num: '58', pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, label: 'J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO', identifier: WRITE}
- {pin_num: '59', pin_signal: PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1, label: 'J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn', identifier: PORT_LE}
- {pin_num: '60', pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0, label: 'J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI', identifier: FC0_SCK}
- {pin_num: '61', pin_signal: PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0, label: 'J2[2]/P0_21-CLKOUT-SPIFI_CLK', identifier: POT_CS2}
- {pin_num: '62', pin_signal: PIO1_15/PDM0_CLK/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0, label: 'J1[17]/P1_15-SCTO5-FC7_CTS', identifier: ON_POLL}
- {pin_num: '63', pin_signal: PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3, label: 'J4[8]/P0_22-BRIDGE_GPIO', identifier: SYS_CLK}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_gpio.h"
#include "fsl_iocon.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
- pin_list:
- {pin_num: '31', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3, mode: inactive, invert: disabled,
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
- {pin_num: '32', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1, mode: inactive, invert: disabled,
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
- {pin_num: '46', peripheral: FLEXCOMM3, signal: SCK, pin_signal: PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1, mode: pullUp, invert: disabled, glitch_filter: disabled,
slew_rate: standard, open_drain: disabled}
- {pin_num: '47', peripheral: FLEXCOMM3, signal: RXD_SDA_MOSI, pin_signal: PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3, mode: pullUp, invert: disabled,
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
- {pin_num: '48', peripheral: FLEXCOMM3, signal: TXD_SCL_MISO, pin_signal: PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0, mode: pullUp, invert: disabled, glitch_filter: disabled,
slew_rate: standard, open_drain: disabled}
- {pin_num: '11', peripheral: ADC0, signal: 'CH, 0', pin_signal: PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0}
- {pin_num: '12', peripheral: ADC0, signal: 'CH, 1', pin_signal: PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1}
- {pin_num: '18', peripheral: ADC0, signal: 'CH, 7', pin_signal: PIO1_4/PDM1_CLK/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7}
- {pin_num: '17', peripheral: ADC0, signal: 'CH, 6', pin_signal: PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6}
- {pin_num: '16', peripheral: ADC0, signal: 'CH, 5', pin_signal: PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5}
- {pin_num: '15', peripheral: ADC0, signal: 'CH, 4', pin_signal: PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4}
- {pin_num: '14', peripheral: ADC0, signal: 'CH, 3', pin_signal: PIO1_0/PDM0_DATA/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3}
- {pin_num: '51', peripheral: GPIO, signal: 'PIO1, 12', pin_signal: PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2, direction: OUTPUT}
- {pin_num: '54', peripheral: GPIO, signal: 'PIO1, 13', pin_signal: PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA, direction: OUTPUT}
- {pin_num: '57', peripheral: GPIO, signal: 'PIO1, 14', pin_signal: PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS, direction: OUTPUT}
- {pin_num: '62', peripheral: GPIO, signal: 'PIO1, 15', pin_signal: PIO1_15/PDM0_CLK/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0, direction: INPUT}
- {pin_num: '7', peripheral: GPIO, signal: 'PIO1, 16', pin_signal: PIO1_16/PDM0_DATA/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1, direction: OUTPUT, mode: pullDown}
- {pin_num: '60', peripheral: FLEXCOMM0, signal: SCK, pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0}
- {pin_num: '36', peripheral: GPIO, signal: 'PIO0, 2', pin_signal: PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3/CTIMER2_CAP1, direction: INPUT}
- {pin_num: '37', peripheral: GPIO, signal: 'PIO0, 3', pin_signal: PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3, direction: INPUT}
- {pin_num: '41', peripheral: GPIO, signal: 'PIO0, 7', pin_signal: PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2, direction: OUTPUT, gpio_init_state: 'true'}
- {pin_num: '61', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0, direction: OUTPUT, gpio_init_state: 'true'}
- {pin_num: '52', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_16/FC3_SSEL2/FC6_CTS_SDA_SSEL0/CTIMER3_MAT1/SWCLK}
- {pin_num: '53', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_17/FC3_SSEL3/FC6_RTS_SCL_SSEL1/CTIMER3_MAT2/SWDIO}
- {pin_num: '28', peripheral: GPIO, signal: 'PIO1, 8', pin_signal: PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11, direction: OUTPUT}
- {pin_num: '59', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1, direction: OUTPUT}
- {pin_num: '2', peripheral: GPIO, signal: 'PIO0, 24', pin_signal: PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0, direction: INPUT}
- {pin_num: '3', peripheral: GPIO, signal: 'PIO0, 25', pin_signal: PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1, direction: INPUT}
- {pin_num: '49', peripheral: GPIO, signal: 'PIO0, 14', pin_signal: PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/CTIMER2_MAT1/FC1_SCK, direction: INPUT, mode: inactive}
- {pin_num: '19', peripheral: ADC0, signal: 'CH, 8', pin_signal: PIO1_5/PDM1_DATA/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8}
- {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 26', pin_signal: PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3, direction: OUTPUT, i2c_filter: disabled}
- {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 17', pin_signal: PIO1_17/MCLK/UTICK_CAP3, direction: OUTPUT}
- {pin_num: '27', peripheral: ADC0, signal: 'CH, 10', pin_signal: PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10}
- {pin_num: '29', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED, direction: OUTPUT}
- {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 10', pin_signal: PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME, direction: OUTPUT}
- {pin_num: '39', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0}
- {pin_num: '40', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0, identifier: ''}
- {pin_num: '42', peripheral: GPIO, signal: 'PIO1, 11', pin_signal: PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS, direction: OUTPUT}
- {pin_num: '45', peripheral: GPIO, signal: 'PIO0, 10', pin_signal: PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0, direction: OUTPUT}
- {pin_num: '58', peripheral: GPIO, signal: 'PIO0, 18', pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, direction: OUTPUT}
- {pin_num: '63', peripheral: SYSCON, signal: CLKIN, pin_signal: PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3}
- {pin_num: '50', peripheral: FLEXCOMM3, signal: RTS_SCL_SSEL1, pin_signal: PIO0_15/FC3_RTS_SCL_SSEL1/SWO/CTIMER2_MAT2/FC4_SCK, identifier: ''}
- {pin_num: '43', peripheral: SCT0, signal: 'OUT, 1', pin_signal: PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3}
- {pin_num: '44', peripheral: SCT0, signal: 'OUT, 2', pin_signal: PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0}
- {pin_num: '1', peripheral: SCT0, signal: 'IN, 0', pin_signal: PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1, identifier: ''}
- {pin_num: '5', peripheral: USB0, signal: USB_DP, pin_signal: USB0_DP}
- {pin_num: '6', peripheral: USB0, signal: USB_DM, pin_signal: USB0_DM}
- {pin_num: '26', peripheral: USB0, signal: USB_VBUS, pin_signal: PIO1_6/FC7_SCK/CTIMER1_CAP2/CTIMER1_MAT2/USB0_VBUS/ADC0_9, identifier: ''}
- {pin_num: '38', peripheral: GPIO, signal: 'PIO0, 4', pin_signal: PIO0_4/FC0_SCK/FC3_SSEL2/CTIMER0_CAP2, direction: OUTPUT}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M4F */
void BOARD_InitPins(void)
{
/* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables the clock for the GPIO0 module */
CLOCK_EnableClock(kCLOCK_Gpio0);
/* Enables the clock for the GPIO1 module */
CLOCK_EnableClock(kCLOCK_Gpio1);
gpio_pin_config_t SFTKY1_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_2 (pin 36) */
GPIO_PinInit(BOARD_INITPINS_SFTKY1_GPIO, BOARD_INITPINS_SFTKY1_PORT, BOARD_INITPINS_SFTKY1_PIN, &SFTKY1_config);
gpio_pin_config_t SFTKY2_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_3 (pin 37) */
GPIO_PinInit(BOARD_INITPINS_SFTKY2_GPIO, BOARD_INITPINS_SFTKY2_PORT, BOARD_INITPINS_SFTKY2_PIN, &SFTKY2_config);
gpio_pin_config_t gpio0_pin38_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_4 (pin 38) */
GPIO_PinInit(GPIO, 0U, 4U, &gpio0_pin38_config);
gpio_pin_config_t POT_CS_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO0_7 (pin 41) */
GPIO_PinInit(BOARD_INITPINS_POT_CS_GPIO, BOARD_INITPINS_POT_CS_PORT, BOARD_INITPINS_POT_CS_PIN, &POT_CS_config);
gpio_pin_config_t CS_EEP_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_10 (pin 45) */
GPIO_PinInit(BOARD_INITPINS_CS_EEP_GPIO, BOARD_INITPINS_CS_EEP_PORT, BOARD_INITPINS_CS_EEP_PIN, &CS_EEP_config);
gpio_pin_config_t SFTKY0_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_14 (pin 49) */
GPIO_PinInit(BOARD_INITPINS_SFTKY0_GPIO, BOARD_INITPINS_SFTKY0_PORT, BOARD_INITPINS_SFTKY0_PIN, &SFTKY0_config);
gpio_pin_config_t WRITE_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_18 (pin 58) */
GPIO_PinInit(BOARD_INITPINS_WRITE_GPIO, BOARD_INITPINS_WRITE_PORT, BOARD_INITPINS_WRITE_PIN, &WRITE_config);
gpio_pin_config_t PORT_LE_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_19 (pin 59) */
GPIO_PinInit(BOARD_INITPINS_PORT_LE_GPIO, BOARD_INITPINS_PORT_LE_PORT, BOARD_INITPINS_PORT_LE_PIN, &PORT_LE_config);
gpio_pin_config_t POT_CS2_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO0_21 (pin 61) */
GPIO_PinInit(BOARD_INITPINS_POT_CS2_GPIO, BOARD_INITPINS_POT_CS2_PORT, BOARD_INITPINS_POT_CS2_PIN, &POT_CS2_config);
gpio_pin_config_t SFTKY3_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_24 (pin 2) */
GPIO_PinInit(BOARD_INITPINS_SFTKY3_GPIO, BOARD_INITPINS_SFTKY3_PORT, BOARD_INITPINS_SFTKY3_PIN, &SFTKY3_config);
gpio_pin_config_t SFTKY4_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_25 (pin 3) */
GPIO_PinInit(BOARD_INITPINS_SFTKY4_GPIO, BOARD_INITPINS_SFTKY4_PORT, BOARD_INITPINS_SFTKY4_PIN, &SFTKY4_config);
gpio_pin_config_t RF_BUSY_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_26 (pin 4) */
GPIO_PinInit(BOARD_INITPINS_RF_BUSY_GPIO, BOARD_INITPINS_RF_BUSY_PORT, BOARD_INITPINS_RF_BUSY_PIN, &RF_BUSY_config);
gpio_pin_config_t LCD_CD_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_8 (pin 28) */
GPIO_PinInit(BOARD_INITPINS_LCD_CD_GPIO, BOARD_INITPINS_LCD_CD_PORT, BOARD_INITPINS_LCD_CD_PIN, &LCD_CD_config);
gpio_pin_config_t SIG_EN_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_9 (pin 29) */
GPIO_PinInit(BOARD_INITPINS_SIG_EN_GPIO, BOARD_INITPINS_SIG_EN_PORT, BOARD_INITPINS_SIG_EN_PIN, &SIG_EN_config);
gpio_pin_config_t SD_EN_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_10 (pin 30) */
GPIO_PinInit(BOARD_INITPINS_SD_EN_GPIO, BOARD_INITPINS_SD_EN_PORT, BOARD_INITPINS_SD_EN_PIN, &SD_EN_config);
gpio_pin_config_t RAMP_EN_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_11 (pin 42) */
GPIO_PinInit(BOARD_INITPINS_RAMP_EN_GPIO, BOARD_INITPINS_RAMP_EN_PORT, BOARD_INITPINS_RAMP_EN_PIN, &RAMP_EN_config);
gpio_pin_config_t SIG_RST_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_12 (pin 51) */
GPIO_PinInit(BOARD_INITPINS_SIG_RST_GPIO, BOARD_INITPINS_SIG_RST_PORT, BOARD_INITPINS_SIG_RST_PIN, &SIG_RST_config);
gpio_pin_config_t SD_RST_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_13 (pin 54) */
GPIO_PinInit(BOARD_INITPINS_SD_RST_GPIO, BOARD_INITPINS_SD_RST_PORT, BOARD_INITPINS_SD_RST_PIN, &SD_RST_config);
gpio_pin_config_t RAMP_RST_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_14 (pin 57) */
GPIO_PinInit(BOARD_INITPINS_RAMP_RST_GPIO, BOARD_INITPINS_RAMP_RST_PORT, BOARD_INITPINS_RAMP_RST_PIN, &RAMP_RST_config);
gpio_pin_config_t ON_POLL_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_15 (pin 62) */
GPIO_PinInit(BOARD_INITPINS_ON_POLL_GPIO, BOARD_INITPINS_ON_POLL_PORT, BOARD_INITPINS_ON_POLL_PIN, &ON_POLL_config);
gpio_pin_config_t CTL_PSU_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_16 (pin 7) */
GPIO_PinInit(BOARD_INITPINS_CTL_PSU_GPIO, BOARD_INITPINS_CTL_PSU_PORT, BOARD_INITPINS_CTL_PSU_PIN, &CTL_PSU_config);
gpio_pin_config_t E_STOP_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_17 (pin 10) */
GPIO_PinInit(BOARD_INITPINS_E_STOP_GPIO, BOARD_INITPINS_E_STOP_PORT, BOARD_INITPINS_E_STOP_PIN, &E_STOP_config);
const uint32_t FC0_MOSI = (/* Pin is configured as FC0_RXD_SDA_MOSI */
IOCON_PIO_FUNC1 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN0 (coords: 31) is configured as FC0_RXD_SDA_MOSI */
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_FC0_MOSI_PORT, BOARD_INITPINS_FC0_MOSI_PIN, FC0_MOSI);
const uint32_t FC0_MISO = (/* Pin is configured as FC0_TXD_SCL_MISO */
IOCON_PIO_FUNC1 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN1 (coords: 32) is configured as FC0_TXD_SCL_MISO */
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_FC0_MISO_PORT, BOARD_INITPINS_FC0_MISO_PIN, FC0_MISO);
IOCON->PIO[0][10] = ((IOCON->PIO[0][10] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT010 (pin 45) is configured as PIO0_10. */
| IOCON_PIO_FUNC(PIO010_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO010_DIGIMODE_DIGITAL));
const uint32_t SCLK = (/* Pin is configured as FC3_SCK */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN11 (coords: 46) is configured as FC3_SCK */
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_SCLK_PORT, BOARD_INITPINS_SCLK_PIN, SCLK);
const uint32_t SDATA = (/* Pin is configured as FC3_RXD_SDA_MOSI */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN12 (coords: 47) is configured as FC3_RXD_SDA_MOSI */
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_SDATA_PORT, BOARD_INITPINS_SDATA_PIN, SDATA);
const uint32_t SDIN = (/* Pin is configured as FC3_TXD_SCL_MISO */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN13 (coords: 48) is configured as FC3_TXD_SCL_MISO */
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_SDIN_PORT, BOARD_INITPINS_SDIN_PIN, SDIN);
IOCON->PIO[0][14] = ((IOCON->PIO[0][14] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT014 (pin 49) is configured as PIO0_14. */
| IOCON_PIO_FUNC(PIO014_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO014_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO014_DIGIMODE_DIGITAL));
IOCON->PIO[0][15] = ((IOCON->PIO[0][15] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT015 (pin 50) is configured as FC3_RTS_SCL_SSEL1. */
| IOCON_PIO_FUNC(PIO015_FUNC_ALT1)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO015_DIGIMODE_DIGITAL));
IOCON->PIO[0][16] = ((IOCON->PIO[0][16] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT016 (pin 52) is configured as SWCLK. */
| IOCON_PIO_FUNC(PIO016_FUNC_ALT5)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO016_DIGIMODE_DIGITAL));
IOCON->PIO[0][17] = ((IOCON->PIO[0][17] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT017 (pin 53) is configured as SWDIO. */
| IOCON_PIO_FUNC(PIO017_FUNC_ALT5)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO017_DIGIMODE_DIGITAL));
IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT018 (pin 58) is configured as PIO0_18. */
| IOCON_PIO_FUNC(PIO018_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO018_DIGIMODE_DIGITAL));
IOCON->PIO[0][19] = ((IOCON->PIO[0][19] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT019 (pin 59) is configured as PIO0_19. */
| IOCON_PIO_FUNC(PIO019_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO019_DIGIMODE_DIGITAL));
IOCON->PIO[0][2] = ((IOCON->PIO[0][2] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT02 (pin 36) is configured as PIO0_2. */
| IOCON_PIO_FUNC(PIO02_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO02_DIGIMODE_DIGITAL));
IOCON->PIO[0][20] = ((IOCON->PIO[0][20] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT020 (pin 60) is configured as FC0_SCK. */
| IOCON_PIO_FUNC(PIO020_FUNC_ALT2)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO020_DIGIMODE_DIGITAL));
IOCON->PIO[0][21] = ((IOCON->PIO[0][21] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT021 (pin 61) is configured as PIO0_21. */
| IOCON_PIO_FUNC(PIO021_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO021_DIGIMODE_DIGITAL));
IOCON->PIO[0][22] = ((IOCON->PIO[0][22] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT022 (pin 63) is configured as CLKIN. */
| IOCON_PIO_FUNC(PIO022_FUNC_ALT1)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO022_DIGIMODE_DIGITAL));
IOCON->PIO[0][24] = ((IOCON->PIO[0][24] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT024 (pin 2) is configured as PIO0_24. */
| IOCON_PIO_FUNC(PIO024_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO024_DIGIMODE_DIGITAL));
IOCON->PIO[0][25] = ((IOCON->PIO[0][25] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT025 (pin 3) is configured as PIO0_25. */
| IOCON_PIO_FUNC(PIO025_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO025_DIGIMODE_DIGITAL));
IOCON->PIO[0][26] = ((IOCON->PIO[0][26] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_I2CFILTER_MASK)))
/* Selects pin function.
* : PORT026 (pin 4) is configured as PIO0_26. */
| IOCON_PIO_FUNC(PIO026_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO026_DIGIMODE_DIGITAL)
/* Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation.
* : Disabled.
* I2C 50 ns glitch filter disabled. */
| IOCON_PIO_I2CFILTER(PIO026_I2CFILTER_DISABLED));
IOCON->PIO[0][29] = ((IOCON->PIO[0][29] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT029 (pin 11) is configured as ADC0_0. */
| IOCON_PIO_FUNC(PIO029_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO029_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO029_DIGIMODE_ANALOG));
IOCON->PIO[0][3] = ((IOCON->PIO[0][3] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT03 (pin 37) is configured as PIO0_3. */
| IOCON_PIO_FUNC(PIO03_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO03_DIGIMODE_DIGITAL));
IOCON->PIO[0][30] = ((IOCON->PIO[0][30] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT030 (pin 12) is configured as ADC0_1. */
| IOCON_PIO_FUNC(PIO030_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO030_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO030_DIGIMODE_ANALOG));
IOCON->PIO[0][4] = ((IOCON->PIO[0][4] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT04 (pin 38) is configured as PIO0_4. */
| IOCON_PIO_FUNC(PIO04_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO04_DIGIMODE_DIGITAL));
IOCON->PIO[0][5] = ((IOCON->PIO[0][5] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT05 (pin 39) is configured as FC6_RXD_SDA_MOSI_DATA. */
| IOCON_PIO_FUNC(PIO05_FUNC_ALT1)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO05_DIGIMODE_DIGITAL));
IOCON->PIO[0][6] = ((IOCON->PIO[0][6] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT06 (pin 40) is configured as FC6_TXD_SCL_MISO_WS. */
| IOCON_PIO_FUNC(PIO06_FUNC_ALT1)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO06_DIGIMODE_DIGITAL));
IOCON->PIO[0][7] = ((IOCON->PIO[0][7] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT07 (pin 41) is configured as PIO0_7. */
| IOCON_PIO_FUNC(PIO07_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO07_DIGIMODE_DIGITAL));
IOCON->PIO[0][8] = ((IOCON->PIO[0][8] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT08 (pin 43) is configured as SCT0_OUT1. */
| IOCON_PIO_FUNC(PIO08_FUNC_ALT2)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO08_DIGIMODE_DIGITAL));
IOCON->PIO[0][9] = ((IOCON->PIO[0][9] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT09 (pin 44) is configured as SCT0_OUT2. */
| IOCON_PIO_FUNC(PIO09_FUNC_ALT2)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO09_DIGIMODE_DIGITAL));
IOCON->PIO[1][0] = ((IOCON->PIO[1][0] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT10 (pin 14) is configured as ADC0_3. */
| IOCON_PIO_FUNC(PIO10_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO10_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO10_DIGIMODE_ANALOG));
IOCON->PIO[1][1] = ((IOCON->PIO[1][1] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT11 (pin 15) is configured as ADC0_4. */
| IOCON_PIO_FUNC(PIO11_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO11_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO11_DIGIMODE_ANALOG));
IOCON->PIO[1][10] = ((IOCON->PIO[1][10] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT110 (pin 30) is configured as PIO1_10. */
| IOCON_PIO_FUNC(PIO110_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO110_DIGIMODE_DIGITAL));
IOCON->PIO[1][11] = ((IOCON->PIO[1][11] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT111 (pin 42) is configured as PIO1_11. */
| IOCON_PIO_FUNC(PIO111_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO111_DIGIMODE_DIGITAL));
IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT112 (pin 51) is configured as PIO1_12. */
| IOCON_PIO_FUNC(PIO112_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO112_DIGIMODE_DIGITAL));
IOCON->PIO[1][13] = ((IOCON->PIO[1][13] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT113 (pin 54) is configured as PIO1_13. */
| IOCON_PIO_FUNC(PIO113_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO113_DIGIMODE_DIGITAL));
IOCON->PIO[1][14] = ((IOCON->PIO[1][14] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT114 (pin 57) is configured as PIO1_14. */
| IOCON_PIO_FUNC(PIO114_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO114_DIGIMODE_DIGITAL));
IOCON->PIO[1][15] = ((IOCON->PIO[1][15] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT115 (pin 62) is configured as PIO1_15. */
| IOCON_PIO_FUNC(PIO115_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO115_DIGIMODE_DIGITAL));
IOCON->PIO[1][16] = ((IOCON->PIO[1][16] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT116 (pin 7) is configured as PIO1_16. */
| IOCON_PIO_FUNC(PIO116_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Pull-down.
* Pull-down resistor enabled. */
| IOCON_PIO_MODE(PIO116_MODE_PULL_DOWN)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO116_DIGIMODE_DIGITAL));
IOCON->PIO[1][17] = ((IOCON->PIO[1][17] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT117 (pin 10) is configured as PIO1_17. */
| IOCON_PIO_FUNC(PIO117_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO117_DIGIMODE_DIGITAL));
IOCON->PIO[1][2] = ((IOCON->PIO[1][2] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT12 (pin 16) is configured as ADC0_5. */
| IOCON_PIO_FUNC(PIO12_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO12_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO12_DIGIMODE_ANALOG));
IOCON->PIO[1][3] = ((IOCON->PIO[1][3] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT13 (pin 17) is configured as ADC0_6. */
| IOCON_PIO_FUNC(PIO13_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO13_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO13_DIGIMODE_ANALOG));
IOCON->PIO[1][4] = ((IOCON->PIO[1][4] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT14 (pin 18) is configured as ADC0_7. */
| IOCON_PIO_FUNC(PIO14_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO14_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO14_DIGIMODE_ANALOG));
IOCON->PIO[1][5] = ((IOCON->PIO[1][5] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT15 (pin 19) is configured as ADC0_8. */
| IOCON_PIO_FUNC(PIO15_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO15_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO15_DIGIMODE_ANALOG));
IOCON->PIO[1][6] = ((IOCON->PIO[1][6] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT16 (pin 26) is configured as USB0_VBUS. */
| IOCON_PIO_FUNC(PIO16_FUNC_ALT7)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO16_DIGIMODE_DIGITAL));
IOCON->PIO[1][7] = ((IOCON->PIO[1][7] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT17 (pin 27) is configured as ADC0_10. */
| IOCON_PIO_FUNC(PIO17_FUNC_ALT0)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled). */
| IOCON_PIO_MODE(PIO17_MODE_INACTIVE)
/* Select Analog/Digital mode.
* : Analog mode. */
| IOCON_PIO_DIGIMODE(PIO17_DIGIMODE_ANALOG));
IOCON->PIO[1][8] = ((IOCON->PIO[1][8] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT18 (pin 28) is configured as PIO1_8. */
| IOCON_PIO_FUNC(PIO18_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO18_DIGIMODE_DIGITAL));
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT19 (pin 29) is configured as PIO1_9. */
| IOCON_PIO_FUNC(PIO19_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO19_DIGIMODE_DIGITAL));
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

786
board/pin_mux.h Normal file
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@@ -0,0 +1,786 @@
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/*!
* @brief Enables digital function */
#define IOCON_PIO_DIGITAL_EN 0x80u
/*!
* @brief Selects pin function 1 */
#define IOCON_PIO_FUNC1 0x01u
/*!
* @brief Input filter disabled */
#define IOCON_PIO_INPFILT_OFF 0x0100u
/*!
* @brief Input function is not inverted */
#define IOCON_PIO_INV_DI 0x00u
/*!
* @brief No addition pin function */
#define IOCON_PIO_MODE_INACT 0x00u
/*!
* @brief Selects pull-up function */
#define IOCON_PIO_MODE_PULLUP 0x10u
/*!
* @brief Open drain is disabled */
#define IOCON_PIO_OPENDRAIN_DI 0x00u
/*!
* @brief Standard mode, output slew rate control is enabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO010_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO010_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO014_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO014_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO014_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO015_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 1. */
#define PIO015_FUNC_ALT1 0x01u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO016_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 5. */
#define PIO016_FUNC_ALT5 0x05u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO017_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 5. */
#define PIO017_FUNC_ALT5 0x05u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO018_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO018_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO019_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO019_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO020_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 2. */
#define PIO020_FUNC_ALT2 0x02u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO021_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO021_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO022_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 1. */
#define PIO022_FUNC_ALT1 0x01u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO024_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO024_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO025_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO025_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO026_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO026_FUNC_ALT0 0x00u
/*!
* @brief
* Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation.
* : Disabled.
* I2C 50 ns glitch filter disabled.
*/
#define PIO026_I2CFILTER_DISABLED 0x01u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO029_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO029_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO029_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO02_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO02_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO030_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO030_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO030_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO03_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO03_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO04_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO04_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO05_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 1. */
#define PIO05_FUNC_ALT1 0x01u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO06_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 1. */
#define PIO06_FUNC_ALT1 0x01u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO07_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO07_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO08_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 2. */
#define PIO08_FUNC_ALT2 0x02u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO09_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 2. */
#define PIO09_FUNC_ALT2 0x02u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO10_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO10_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO10_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO110_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO110_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO111_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO111_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO112_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO112_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO113_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO113_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO114_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO114_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO115_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO115_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO116_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO116_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Pull-down.
* Pull-down resistor enabled.
*/
#define PIO116_MODE_PULL_DOWN 0x01u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO117_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO117_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO11_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO11_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO11_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO12_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO12_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO12_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO13_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO13_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO13_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO14_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO14_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO14_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO15_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO15_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO15_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO16_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 7. */
#define PIO16_FUNC_ALT7 0x07u
/*!
* @brief Select Analog/Digital mode.: Analog mode. */
#define PIO17_DIGIMODE_ANALOG 0x00u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO17_FUNC_ALT0 0x00u
/*!
* @brief
* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO17_MODE_INACTIVE 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO18_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO18_FUNC_ALT0 0x00u
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO19_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO19_FUNC_ALT0 0x00u
/*! @name PIO0_0 (number 31), U18[4]/TO_MUX_P0_0-ISP_RX
@{ */
#define BOARD_INITPINS_FC0_MOSI_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_FC0_MOSI_PIN 0U /*!<@brief PORT pin number */
#define BOARD_INITPINS_FC0_MOSI_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_1 (number 32), U6[4]/U22[3]/P0_1-ISP_TX
@{ */
#define BOARD_INITPINS_FC0_MISO_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_FC0_MISO_PIN 1U /*!<@brief PORT pin number */
#define BOARD_INITPINS_FC0_MISO_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_11 (number 46), J4[4]/U9[13]/BRIDGE_T_SCK
@{ */
#define BOARD_INITPINS_SCLK_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SCLK_PIN 11U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SCLK_PIN_MASK (1U << 11U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_12 (number 47), J4[2]/U9[11]/BRIDGE_T_MOSI
@{ */
#define BOARD_INITPINS_SDATA_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SDATA_PIN 12U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SDATA_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_13 (number 48), J4[3]/U15[4]/BRIDGE_T_MISO
@{ */
#define BOARD_INITPINS_SDIN_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SDIN_PIN 13U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SDIN_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_29 (number 11), J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED
@{ */
#define BOARD_INITPINS_I_OUT1_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_I_OUT1_PIN 29U /*!<@brief PORT pin number */
#define BOARD_INITPINS_I_OUT1_PIN_MASK (1U << 29U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_30 (number 12), J9[2]/P0_30-ADC1
@{ */
#define BOARD_INITPINS_V_OUT1_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_V_OUT1_PIN 30U /*!<@brief PORT pin number */
#define BOARD_INITPINS_V_OUT1_PIN_MASK (1U << 30U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_4 (number 18), J2[18]/J9[10]/P1_4-ADC7-PDM1_CLK-FC7_RTS-FC3_TXD
@{ */
#define BOARD_INITPINS_V_CHK_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_V_CHK_PIN 4U /*!<@brief PORT pin number */
#define BOARD_INITPINS_V_CHK_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_3 (number 17), J2[20]/P1_3-FC7_SSEL2-CT32B0_CAP1
@{ */
#define BOARD_INITPINS_ID2_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_ID2_PIN 3U /*!<@brief PORT pin number */
#define BOARD_INITPINS_ID2_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_2 (number 16), J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3
@{ */
#define BOARD_INITPINS_ID1_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_ID1_PIN 2U /*!<@brief PORT pin number */
#define BOARD_INITPINS_ID1_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_1 (number 15), J1[15]/P1_1-FC5_SSEL2
@{ */
#define BOARD_INITPINS_VBAT_MON_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_VBAT_MON_PIN 1U /*!<@brief PORT pin number */
#define BOARD_INITPINS_VBAT_MON_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_0 (number 14), J2[3]/P1_0-PDM0_DATA-CT32B3_MAT1
@{ */
#define BOARD_INITPINS_PSU_MON_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_PSU_MON_PIN 0U /*!<@brief PORT pin number */
#define BOARD_INITPINS_PSU_MON_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_12 (number 51), J2[9]/P1_12-CT32B1_MAT0-ACCl_INT1
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SIG_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SIG_RST_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SIG_RST_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SIG_RST_PIN 12U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SIG_RST_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_13 (number 54), J2[7]/P1_13-CT32B1_MAT1
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SD_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SD_RST_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SD_RST_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SD_RST_PIN 13U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SD_RST_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_14 (number 57), J2[1]/P1_14-SCTO7
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_RAMP_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_RAMP_RST_GPIO_PIN_MASK (1U << 14U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_RAMP_RST_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_RAMP_RST_PIN 14U /*!<@brief PORT pin number */
#define BOARD_INITPINS_RAMP_RST_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_15 (number 62), J1[17]/P1_15-SCTO5-FC7_CTS
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_ON_POLL_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_ON_POLL_GPIO_PIN_MASK (1U << 15U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_ON_POLL_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_ON_POLL_PIN 15U /*!<@brief PORT pin number */
#define BOARD_INITPINS_ON_POLL_PIN_MASK (1U << 15U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_16 (number 7), J1[19]/P1_16-CT32B0_MAT0-GYRO_INT1
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_CTL_PSU_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_CTL_PSU_GPIO_PIN_MASK (1U << 16U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_CTL_PSU_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_CTL_PSU_PIN 16U /*!<@brief PORT pin number */
#define BOARD_INITPINS_CTL_PSU_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_20 (number 60), J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI
@{ */
#define BOARD_INITPINS_FC0_SCK_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_FC0_SCK_PIN 20U /*!<@brief PORT pin number */
#define BOARD_INITPINS_FC0_SCK_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_2 (number 36), J9[1]/P0_2-GPIO_SPI_CS
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SFTKY1_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SFTKY1_GPIO_PIN_MASK (1U << 2U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SFTKY1_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SFTKY1_PIN 2U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SFTKY1_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_3 (number 37), J9[3]/P0_3-GPIO_SPI_CS
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SFTKY2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SFTKY2_GPIO_PIN_MASK (1U << 3U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SFTKY2_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SFTKY2_PIN 3U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SFTKY2_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_7 (number 41), J1[16]/P0_7-FC6_SCK
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_POT_CS_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_POT_CS_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_POT_CS_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_POT_CS_PIN 7U /*!<@brief PORT pin number */
#define BOARD_INITPINS_POT_CS_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_21 (number 61), J2[2]/P0_21-CLKOUT-SPIFI_CLK
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_POT_CS2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_POT_CS2_GPIO_PIN_MASK (1U << 21U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_POT_CS2_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_POT_CS2_PIN 21U /*!<@brief PORT pin number */
#define BOARD_INITPINS_POT_CS2_PIN_MASK (1U << 21U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_16 (number 52), J2[4]/JS28/U4[4]/TCK-SWDCLK_TRGT-SPIFI_IO1
@{ */
#define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PIN 16U /*!<@brief PORT pin number */
#define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_17 (number 53), J2[6]/P1[2]/U2[5]/U14[4]/IF_TMS_SWDIO-SPIFI_IO0
@{ */
#define BOARD_INITPINS_DEBUG_SWD_SWDIO_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_DEBUG_SWD_SWDIO_PIN 17U /*!<@brief PORT pin number */
#define BOARD_INITPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 17U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_8 (number 28), J1[12]/J9[6]/P1_8-ADC11-FC7_TXD_SCL_MISO_FRAME
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_LCD_CD_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_LCD_CD_GPIO_PIN_MASK (1U << 8U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_LCD_CD_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_LCD_CD_PIN 8U /*!<@brief PORT pin number */
#define BOARD_INITPINS_LCD_CD_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_19 (number 59), J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_PORT_LE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_PORT_LE_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_PORT_LE_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_PORT_LE_PIN 19U /*!<@brief PORT pin number */
#define BOARD_INITPINS_PORT_LE_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_24 (number 2), J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SFTKY3_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SFTKY3_GPIO_PIN_MASK (1U << 24U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SFTKY3_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SFTKY3_PIN 24U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SFTKY3_PIN_MASK (1U << 24U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_25 (number 3), J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SFTKY4_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SFTKY4_GPIO_PIN_MASK (1U << 25U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SFTKY4_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SFTKY4_PIN 25U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SFTKY4_PIN_MASK (1U << 25U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_14 (number 49), J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SFTKY0_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SFTKY0_GPIO_PIN_MASK (1U << 14U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SFTKY0_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SFTKY0_PIN 14U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SFTKY0_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_5 (number 19), J2[16]/J9[12]/P1_5-ADC8-PDM1_DAT-FC7_CTS
@{ */
#define BOARD_INITPINS_TEMP_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_TEMP_PIN 5U /*!<@brief PORT pin number */
#define BOARD_INITPINS_TEMP_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_26 (number 4), J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_RF_BUSY_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_RF_BUSY_GPIO_PIN_MASK (1U << 26U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_RF_BUSY_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_RF_BUSY_PIN 26U /*!<@brief PORT pin number */
#define BOARD_INITPINS_RF_BUSY_PIN_MASK (1U << 26U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_17 (number 10), J9[9]/P1_17-IR_LEARN_EN
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_E_STOP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_E_STOP_GPIO_PIN_MASK (1U << 17U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_E_STOP_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_E_STOP_PIN 17U /*!<@brief PORT pin number */
#define BOARD_INITPINS_E_STOP_PIN_MASK (1U << 17U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_7 (number 27), J1[10]/P1_7-FC7_RXD_SDA_MOSI_DATA
@{ */
#define BOARD_INITPINS_BAT_ID_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_BAT_ID_PIN 7U /*!<@brief PORT pin number */
#define BOARD_INITPINS_BAT_ID_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_9 (number 29), J9[5]/D2[3]/P1_9-BLUE_LED
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SIG_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SIG_EN_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SIG_EN_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SIG_EN_PIN 9U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SIG_EN_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_10 (number 30), J9[8]/D2[4]/P1_10-SCT4-LED_GREEN
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_SD_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_SD_EN_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_SD_EN_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SD_EN_PIN 10U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SD_EN_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_5 (number 39), J1[20]/P0_5-FC6_RXD_SDA_MOSI_DATA
@{ */
#define BOARD_INITPINS_RXD_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_RXD_PIN 5U /*!<@brief PORT pin number */
#define BOARD_INITPINS_RXD_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_11 (number 42), J2[19]/P1_11-FC6_RTS_SSEL1-MAG_DRDY
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_RAMP_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_RAMP_EN_GPIO_PIN_MASK (1U << 11U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_RAMP_EN_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_RAMP_EN_PIN 11U /*!<@brief PORT pin number */
#define BOARD_INITPINS_RAMP_EN_PIN_MASK (1U << 11U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_10 (number 45), J2[11]/P0_10-FC2_SCK-CT32B3_MAT0
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_CS_EEP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_CS_EEP_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_CS_EEP_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_CS_EEP_PIN 10U /*!<@brief PORT pin number */
#define BOARD_INITPINS_CS_EEP_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_18 (number 58), J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_WRITE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_WRITE_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
#define BOARD_INITPINS_WRITE_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_WRITE_PIN 18U /*!<@brief PORT pin number */
#define BOARD_INITPINS_WRITE_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_22 (number 63), J4[8]/P0_22-BRIDGE_GPIO
@{ */
#define BOARD_INITPINS_SYS_CLK_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_SYS_CLK_PIN 22U /*!<@brief PORT pin number */
#define BOARD_INITPINS_SYS_CLK_PIN_MASK (1U << 22U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_8 (number 43), J2[15]/P0_8-FC2_RXD_SDA_MOSI
@{ */
#define BOARD_INITPINS_PWM_BAR_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_PWM_BAR_PIN 8U /*!<@brief PORT pin number */
#define BOARD_INITPINS_PWM_BAR_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_9 (number 44), J2[13]/P0_9-FC2_TXD_SCL_MISO
@{ */
#define BOARD_INITPINS_PWM_CPU_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_PWM_CPU_PIN 9U /*!<@brief PORT pin number */
#define BOARD_INITPINS_PWM_CPU_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
/* @} */
/*! @name USB0_DP (number 5), J5[3]/U7[2]/USB_DP
@{ */
/* @} */
/*! @name USB0_DM (number 6), J5[2]/U7[3]/USB_DM
@{ */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void); /* Function assigned for the Cortex-M4F */
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/