initial check in based on SVN revision 575
This commit is contained in:
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.cproject
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776
.cproject
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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|
||||
<option id="com.crt.advproject.link.sgstubs.placement.1600107179" name="Secure Gateway Placement" superClass="com.crt.advproject.link.sgstubs.placement"/>
|
||||
<option id="com.crt.advproject.link.sgstubenable.2074198409" name="Enable generation of Secure Gateway Import Library" superClass="com.crt.advproject.link.sgstubenable"/>
|
||||
<option id="com.crt.advproject.link.nonsecureobject.2062330043" name="Secure Gateway Import Library" superClass="com.crt.advproject.link.nonsecureobject"/>
|
||||
<option id="com.crt.advproject.link.inimplib.1968911293" name="Input Secure Gateway Import Library" superClass="com.crt.advproject.link.inimplib"/>
|
||||
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.710440485" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.tool.debug.release.442121840" name="MCU Debugger" superClass="com.crt.advproject.tool.debug.release">
|
||||
<option id="com.crt.advproject.miscellaneous.end_of_heap.1888490626" name="Last used address of the heap" superClass="com.crt.advproject.miscellaneous.end_of_heap"/>
|
||||
<option id="com.crt.advproject.miscellaneous.pvHeapStart.915467834" name="First address of the heap" superClass="com.crt.advproject.miscellaneous.pvHeapStart"/>
|
||||
<option id="com.crt.advproject.miscellaneous.pvHeapLimit.954457502" name="Maximum extent of heap" superClass="com.crt.advproject.miscellaneous.pvHeapLimit"/>
|
||||
<option id="com.crt.advproject.debugger.security.nonsecureimageenable.970993936" name="Enable pre-programming of Non-Secure Image" superClass="com.crt.advproject.debugger.security.nonsecureimageenable"/>
|
||||
<option id="com.crt.advproject.debugger.security.nonsecureimage.724327550" name="Non-Secure Project" superClass="com.crt.advproject.debugger.security.nonsecureimage"/>
|
||||
<option id="com.crt.advproject.linkserver.debug.prevent.release.1477835412" name="Prevent Debugging" superClass="com.crt.advproject.linkserver.debug.prevent.release"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="CMSIS"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="LPC54114"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="board"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="component"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="device"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="drivers"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="source"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="startup"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="usb"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="utilities"/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="lpcxpresso54114_spi_polling_b2b_transfer_master.null.391928996" name="lpcxpresso54114_spi_polling_b2b_transfer_master" projectType="com.crt.advproject.projecttype.exe"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.2108029807;com.crt.advproject.config.exe.release.2108029807.;com.crt.advproject.gas.exe.release.864313276;com.crt.advproject.assembler.input.1591716624">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.debug.1065441720;com.crt.advproject.config.exe.debug.1065441720.;com.crt.advproject.gas.exe.debug.795374604;com.crt.advproject.assembler.input.306596110">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.debug.1065441720;com.crt.advproject.config.exe.debug.1065441720.;com.crt.advproject.gcc.exe.debug.348394351;com.crt.advproject.compiler.input.15172363">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.2108029807;com.crt.advproject.config.exe.release.2108029807.;com.crt.advproject.gcc.exe.release.4209321;com.crt.advproject.compiler.input.1307036287">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="com.crt.config">
|
||||
<projectStorage><?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_3="NXP" property_4="LPC54113J256" property_count="5" version="100300"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC54113J256" flash_driver="LPC5411x_256K.cfx" match_id="0x0" name="LPC54113J256" stub="crt_emu_cm3_gen">
|
||||
<chip>
|
||||
<name>LPC54113J256</name>
|
||||
<family>LPC5411x</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" driver="LPC5411x_256K.cfx" edited="true" id="PROGRAM_FLASH" location="0x0" size="0x40000"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="SRAM1" location="0x20010000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="SRAM0" location="0x20000000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="SRAMX" location="0x4000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="SRAM2" location="0x20020000" size="0x8000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig></projectStorage>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Debug">
|
||||
<resource resourceType="PROJECT" workspacePath="/TX1_LPC54114"/>
|
||||
</configuration>
|
||||
<configuration configurationName="Release">
|
||||
<resource resourceType="PROJECT" workspacePath="/TX1_LPC54114"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="com.crt.advproject"/>
|
||||
<storageModule moduleId="openCmsis"/>
|
||||
</cproject>
|
||||
23
.gitignore
vendored
Normal file
23
.gitignore
vendored
Normal file
@@ -0,0 +1,23 @@
|
||||
CMakeLists.txt.user
|
||||
CMakeCache.txt
|
||||
CMakeFiles
|
||||
CMakeScripts
|
||||
Testing
|
||||
Makefile
|
||||
cmake_install.cmake
|
||||
install_manifest.txt
|
||||
compile_commands.json
|
||||
CTestTestfile.cmake
|
||||
_deps
|
||||
build
|
||||
.cache
|
||||
Debug
|
||||
Release
|
||||
/source/Fonts/bmp/Application Files/MonoBitmapConverter_1_0_0_0/ChangeLog.txt.deploy
|
||||
/source/Fonts/bmp/Application Files/MonoBitmapConverter_1_0_0_0/MonoBitmapConverter.application
|
||||
/source/Fonts/bmp/Application Files/MonoBitmapConverter_1_0_0_0/MonoBitmapConverter.exe.config.deploy
|
||||
/source/Fonts/bmp/Application Files/MonoBitmapConverter_1_0_0_0/MonoBitmapConverter.exe.deploy
|
||||
/source/Fonts/bmp/Application Files/MonoBitmapConverter_1_0_0_0/MonoBitmapConverter.exe.manifest
|
||||
/source/Fonts/bmp/MonoBitmapConverter.application
|
||||
/source/Fonts/bmp/setup.exe
|
||||
/*.launch
|
||||
26
.project
Normal file
26
.project
Normal file
@@ -0,0 +1,26 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>TX_App</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
25
.settings/language.settings.xml
Normal file
25
.settings/language.settings.xml
Normal file
@@ -0,0 +1,25 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="com.crt.advproject.config.exe.debug.1065441720" name="Debug">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="com.crt.advproject.GCCBuildCommandParser" keep-relative-paths="false" name="MCU GCC Build Output Parser" parameter="(arm-none-eabi-gcc)|(arm-none-eabi-[gc]\+\+)|(gcc)|([gc]\+\+)|(clang)" prefer-non-shared="true"/>
|
||||
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="5279856300461763" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.crt.advproject.config.exe.release.2108029807" name="Release">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="com.crt.advproject.GCCBuildCommandParser" keep-relative-paths="false" name="MCU GCC Build Output Parser" parameter="(arm-none-eabi-gcc)|(arm-none-eabi-[gc]\+\+)|(gcc)|([gc]\+\+)|(clang)" prefer-non-shared="true"/>
|
||||
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="-22250574711266011" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
75
.settings/org.eclipse.cdt.codan.core.prefs
Normal file
75
.settings/org.eclipse.cdt.codan.core.prefs
Normal file
@@ -0,0 +1,75 @@
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false}
|
||||
org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"}
|
||||
org.eclipse.cdt.codan.checkers.localvarreturn=-Warning
|
||||
org.eclipse.cdt.codan.checkers.localvarreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Returning the address of a local variable\\")"}
|
||||
org.eclipse.cdt.codan.checkers.nocommentinside=-Error
|
||||
org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"}
|
||||
org.eclipse.cdt.codan.checkers.nolinecomment=-Error
|
||||
org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"}
|
||||
org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false}
|
||||
org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment in condition\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment to itself\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.BlacklistProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.BlacklistProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function or method is blacklisted\\")",blacklist\=>()}
|
||||
org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"C-Style cast instead of C++ cast\\")",checkMacro\=>true}
|
||||
org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No break at end of case\\")",no_break_comment\=>"no break",last_case_param\=>false,empty_case_param\=>false,enable_fallthrough_quickfix_param\=>false}
|
||||
org.eclipse.cdt.codan.internal.checkers.CatchByReference.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Catching by reference is recommended\\")",unknown\=>false,exceptions\=>()}
|
||||
org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Circular inheritance\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class members should be properly initialized\\")",skip\=>true}
|
||||
org.eclipse.cdt.codan.internal.checkers.CopyrightProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.CopyrightProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Lack of copyright information\\")",regex\=>".*Copyright.*"}
|
||||
org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid 'decltype(auto)' specifier\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Field cannot be resolved\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Direct float comparison\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function cannot be resolved\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Goto statement used\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid arguments\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Avoid magic numbers\\")",checkArray\=>true,checkOperatorParen\=>true,exceptions\=>(1,0,-1,2,1.0,0.0,-1.0)}
|
||||
org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Method cannot be resolved\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.MissCaseProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.MissCaseProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing cases in switch\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing default in switch\\")",defaultWithAllEnums\=>false}
|
||||
org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing reference return value in assignment operator\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing self check in assignment operator\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Multiple variable declaration\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()}
|
||||
org.eclipse.cdt.codan.internal.checkers.NoDiscardProblem=Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.NoDiscardProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return value not evaluated\\")",macro\=>true}
|
||||
org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Miss copy constructor or assignment operator\\")",onlynew\=>false}
|
||||
org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()}
|
||||
org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Static variable in header file\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false}
|
||||
org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false}
|
||||
org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol shadowing\\")",paramFuncParameters\=>true}
|
||||
org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true}
|
||||
org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused static function\\")",macro\=>true}
|
||||
org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")}
|
||||
org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem=-Warning
|
||||
org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Using directive in header\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"}
|
||||
org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem=-Error
|
||||
org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Virtual method call in constructor/destructor\\")"}
|
||||
194
.settings/org.eclipse.cdt.core.prefs
Normal file
194
.settings/org.eclipse.cdt.core.prefs
Normal file
@@ -0,0 +1,194 @@
|
||||
doxygen/doxygen_new_line_after_brief=true
|
||||
doxygen/doxygen_use_brief_tag=false
|
||||
doxygen/doxygen_use_javadoc_tags=true
|
||||
doxygen/doxygen_use_pre_tag=false
|
||||
doxygen/doxygen_use_structural_commands=false
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.cdt.core.formatter.alignment_for_arguments_in_method_invocation=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_assignment=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_base_clause_in_type_declaration=80
|
||||
org.eclipse.cdt.core.formatter.alignment_for_binary_expression=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_compact_if=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_conditional_expression=34
|
||||
org.eclipse.cdt.core.formatter.alignment_for_conditional_expression_chain=18
|
||||
org.eclipse.cdt.core.formatter.alignment_for_constructor_initializer_list=0
|
||||
org.eclipse.cdt.core.formatter.alignment_for_declarator_list=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_enumerator_list=48
|
||||
org.eclipse.cdt.core.formatter.alignment_for_expression_list=0
|
||||
org.eclipse.cdt.core.formatter.alignment_for_expressions_in_array_initializer=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_lambda_expression=20
|
||||
org.eclipse.cdt.core.formatter.alignment_for_member_access=0
|
||||
org.eclipse.cdt.core.formatter.alignment_for_overloaded_left_shift_chain=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_parameters_in_method_declaration=16
|
||||
org.eclipse.cdt.core.formatter.alignment_for_throws_clause_in_method_declaration=16
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_array_initializer=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_block=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_block_in_case=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_linkage_declaration=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_method_declaration=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_namespace_declaration=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_switch=next_line
|
||||
org.eclipse.cdt.core.formatter.brace_position_for_type_declaration=next_line
|
||||
org.eclipse.cdt.core.formatter.comment.line_up_line_comment_in_blocks_on_first_column=false
|
||||
org.eclipse.cdt.core.formatter.comment.min_distance_between_code_and_line_comment=1
|
||||
org.eclipse.cdt.core.formatter.comment.never_indent_line_comments_on_first_column=true
|
||||
org.eclipse.cdt.core.formatter.comment.preserve_white_space_between_code_and_line_comments=true
|
||||
org.eclipse.cdt.core.formatter.comment_formatter_off_tag=@formatter\:off
|
||||
org.eclipse.cdt.core.formatter.comment_formatter_on_tag=@formatter\:on
|
||||
org.eclipse.cdt.core.formatter.compact_else_if=true
|
||||
org.eclipse.cdt.core.formatter.continuation_indentation=2
|
||||
org.eclipse.cdt.core.formatter.continuation_indentation_for_array_initializer=2
|
||||
org.eclipse.cdt.core.formatter.format_block_comment=true
|
||||
org.eclipse.cdt.core.formatter.format_guardian_clause_on_one_line=false
|
||||
org.eclipse.cdt.core.formatter.format_header_comment=true
|
||||
org.eclipse.cdt.core.formatter.format_line_comment=true
|
||||
org.eclipse.cdt.core.formatter.indent_access_specifier_compare_to_type_header=false
|
||||
org.eclipse.cdt.core.formatter.indent_access_specifier_extra_spaces=0
|
||||
org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_access_specifier=true
|
||||
org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_linkage=false
|
||||
org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_namespace_header=false
|
||||
org.eclipse.cdt.core.formatter.indent_breaks_compare_to_cases=true
|
||||
org.eclipse.cdt.core.formatter.indent_declaration_compare_to_template_header=false
|
||||
org.eclipse.cdt.core.formatter.indent_empty_lines=false
|
||||
org.eclipse.cdt.core.formatter.indent_label_compare_to_statements=true
|
||||
org.eclipse.cdt.core.formatter.indent_statements_compare_to_block=true
|
||||
org.eclipse.cdt.core.formatter.indent_statements_compare_to_body=true
|
||||
org.eclipse.cdt.core.formatter.indent_switchstatements_compare_to_cases=true
|
||||
org.eclipse.cdt.core.formatter.indent_switchstatements_compare_to_switch=false
|
||||
org.eclipse.cdt.core.formatter.indentation.size=4
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_after_colon_in_constructor_initializer_list=insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_after_label=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_after_opening_brace_in_array_initializer=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_after_template_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_at_end_of_file_if_missing=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_before_catch_in_try_statement=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_before_closing_brace_in_array_initializer=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_before_colon_in_constructor_initializer_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_before_else_in_if_statement=insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_before_identifier_in_function_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_before_while_in_do_statement=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_new_line_in_empty_block=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_assignment_operator=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_binary_operator=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_closing_angle_bracket_in_template_arguments=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_closing_angle_bracket_in_template_parameters=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_closing_brace_in_block=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_closing_paren_in_cast=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_colon_in_base_clause=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_colon_in_case=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_colon_in_conditional=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_colon_in_labeled_statement=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_array_initializer=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_base_types=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_declarator_list=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_enum_declarations=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_expression_list=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_declaration_parameters=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_declaration_throws=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_invocation_arguments=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_structured_binding_name_list=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_template_arguments=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_comma_in_template_parameters=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_lambda_return=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_angle_bracket_in_template_arguments=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_angle_bracket_in_template_parameters=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_brace_in_array_initializer=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_bracket=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_cast=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_catch=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_exception_specification=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_for=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_if=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_method_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_method_invocation=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_parenthesized_expression=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_switch=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_while=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_opening_structured_binding_name_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_pointer_in_declarator_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_pointer_in_method_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_postfix_operator=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_prefix_operator=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_question_in_conditional=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_semicolon_in_for=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_after_unary_operator=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_assignment_operator=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_binary_operator=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_angle_bracket_in_template_arguments=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_angle_bracket_in_template_parameters=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_brace_in_array_initializer=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_bracket=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_cast=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_catch=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_exception_specification=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_for=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_if=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_method_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_method_invocation=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_parenthesized_expression=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_switch=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_while=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_closing_structured_binding_name_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_colon_in_base_clause=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_colon_in_case=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_colon_in_conditional=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_colon_in_default=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_colon_in_labeled_statement=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_array_initializer=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_base_types=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_declarator_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_enum_declarations=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_expression_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_declaration_parameters=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_declaration_throws=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_invocation_arguments=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_structured_binding_name_list=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_template_arguments=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_comma_in_template_parameters=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_lambda_return=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_angle_bracket_in_template_arguments=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_angle_bracket_in_template_parameters=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_array_initializer=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_block=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_linkage_declaration=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_method_declaration=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_namespace_declaration=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_switch=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_type_declaration=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_bracket=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_catch=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_exception_specification=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_for=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_if=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_method_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_method_invocation=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_parenthesized_expression=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_switch=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_while=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_opening_structured_binding_name_list=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_pointer_in_declarator_list=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_pointer_in_method_declaration=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_postfix_operator=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_prefix_operator=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_question_in_conditional=insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_ref_qualifier_in_structured_binding=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_semicolon=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_semicolon_in_for=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_before_unary_operator=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_between_empty_braces_in_array_initializer=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_between_empty_brackets=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_exception_specification=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_method_declaration=do not insert
|
||||
org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_method_invocation=do not insert
|
||||
org.eclipse.cdt.core.formatter.join_wrapped_lines=true
|
||||
org.eclipse.cdt.core.formatter.keep_else_statement_on_same_line=false
|
||||
org.eclipse.cdt.core.formatter.keep_empty_array_initializer_on_one_line=false
|
||||
org.eclipse.cdt.core.formatter.keep_imple_if_on_one_line=false
|
||||
org.eclipse.cdt.core.formatter.keep_then_statement_on_same_line=false
|
||||
org.eclipse.cdt.core.formatter.lineSplit=80
|
||||
org.eclipse.cdt.core.formatter.number_of_empty_lines_to_preserve=1
|
||||
org.eclipse.cdt.core.formatter.put_empty_statement_on_new_line=true
|
||||
org.eclipse.cdt.core.formatter.tabulation.char=tab
|
||||
org.eclipse.cdt.core.formatter.tabulation.size=4
|
||||
org.eclipse.cdt.core.formatter.use_comment_formatter_tag=true
|
||||
org.eclipse.cdt.core.formatter.use_tabs_only_for_leading_indentations=false
|
||||
3
.settings/org.eclipse.cdt.ui.prefs
Normal file
3
.settings/org.eclipse.cdt.ui.prefs
Normal file
@@ -0,0 +1,3 @@
|
||||
eclipse.preferences.version=1
|
||||
formatter_profile=org.eclipse.cdt.ui.default.allman_profile
|
||||
formatter_settings_version=1
|
||||
2
.settings/org.eclipse.core.resources.prefs
Normal file
2
.settings/org.eclipse.core.resources.prefs
Normal file
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
2
.settings/org.eclipse.ltk.core.refactoring.prefs
Normal file
2
.settings/org.eclipse.ltk.core.refactoring.prefs
Normal file
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false
|
||||
13
.vscode/settings.json
vendored
Normal file
13
.vscode/settings.json
vendored
Normal file
@@ -0,0 +1,13 @@
|
||||
{
|
||||
"files.associations": {
|
||||
"main.h": "c",
|
||||
"pin_mux.h": "c",
|
||||
"fsl_debug_console.h": "c",
|
||||
"board.h": "c",
|
||||
"fsl_common.h": "c",
|
||||
"clock_config.h": "c",
|
||||
"utils.h": "c",
|
||||
"ports.h": "c",
|
||||
"mode.h": "c"
|
||||
}
|
||||
}
|
||||
378
CMSIS/arm_common_tables.h
Normal file
378
CMSIS/arm_common_tables.h
Normal file
@@ -0,0 +1,378 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
* Description: Extern declaration for common tables
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_COMMON_TABLES_H
|
||||
#define _ARM_COMMON_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
|
||||
extern const uint16_t armBitRevTable[1024];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
|
||||
extern const float32_t twiddleCoef_16[32];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
|
||||
extern const float32_t twiddleCoef_32[64];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
|
||||
extern const float32_t twiddleCoef_64[128];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
|
||||
extern const float32_t twiddleCoef_128[256];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
|
||||
extern const float32_t twiddleCoef_256[512];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
|
||||
extern const float32_t twiddleCoef_512[1024];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
|
||||
extern const float32_t twiddleCoef_1024[2048];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
|
||||
extern const float32_t twiddleCoef_2048[4096];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
|
||||
extern const float32_t twiddleCoef_4096[8192];
|
||||
#define twiddleCoef twiddleCoef_4096
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
|
||||
extern const q31_t twiddleCoef_16_q31[24];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
|
||||
extern const q31_t twiddleCoef_32_q31[48];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
|
||||
extern const q31_t twiddleCoef_64_q31[96];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
|
||||
extern const q31_t twiddleCoef_128_q31[192];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
|
||||
extern const q31_t twiddleCoef_256_q31[384];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
|
||||
extern const q31_t twiddleCoef_512_q31[768];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
|
||||
extern const q31_t twiddleCoef_1024_q31[1536];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
|
||||
extern const q31_t twiddleCoef_2048_q31[3072];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
|
||||
extern const q31_t twiddleCoef_4096_q31[6144];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
|
||||
extern const q15_t twiddleCoef_16_q15[24];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
|
||||
extern const q15_t twiddleCoef_32_q15[48];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
|
||||
extern const q15_t twiddleCoef_64_q15[96];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
|
||||
extern const q15_t twiddleCoef_128_q15[192];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
|
||||
extern const q15_t twiddleCoef_256_q15[384];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
|
||||
extern const q15_t twiddleCoef_512_q15[768];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
|
||||
extern const q15_t twiddleCoef_1024_q15[1536];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
|
||||
extern const q15_t twiddleCoef_2048_q15[3072];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
|
||||
extern const q15_t twiddleCoef_4096_q15[6144];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
|
||||
extern const float32_t twiddleCoef_rfft_32[32];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
|
||||
extern const float32_t twiddleCoef_rfft_64[64];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
|
||||
extern const float32_t twiddleCoef_rfft_128[128];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
|
||||
extern const float32_t twiddleCoef_rfft_256[256];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
|
||||
extern const float32_t twiddleCoef_rfft_512[512];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
|
||||
extern const float32_t twiddleCoef_rfft_1024[1024];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
|
||||
extern const float32_t twiddleCoef_rfft_2048[2048];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
|
||||
extern const float32_t twiddleCoef_rfft_4096[4096];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
/* floating-point bit reversal tables */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
|
||||
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
|
||||
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
|
||||
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
|
||||
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
|
||||
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
|
||||
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
|
||||
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
|
||||
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
|
||||
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
|
||||
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
|
||||
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
|
||||
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
|
||||
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
|
||||
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
|
||||
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
|
||||
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
|
||||
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
|
||||
/* fixed-point bit reversal tables */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
|
||||
extern const float32_t realCoefA[8192];
|
||||
extern const float32_t realCoefB[8192];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
|
||||
extern const q31_t realCoefAQ31[8192];
|
||||
extern const q31_t realCoefBQ31[8192];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
|
||||
extern const q15_t realCoefAQ15[8192];
|
||||
extern const q15_t realCoefBQ15[8192];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
|
||||
extern const float32_t Weights_128[256];
|
||||
extern const float32_t cos_factors_128[128];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
|
||||
extern const float32_t Weights_512[1024];
|
||||
extern const float32_t cos_factors_512[512];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
|
||||
extern const float32_t Weights_2048[4096];
|
||||
extern const float32_t cos_factors_2048[2048];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
|
||||
extern const float32_t Weights_8192[16384];
|
||||
extern const float32_t cos_factors_8192[8192];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
|
||||
extern const q15_t WeightsQ15_128[256];
|
||||
extern const q15_t cos_factorsQ15_128[128];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
|
||||
extern const q15_t WeightsQ15_512[1024];
|
||||
extern const q15_t cos_factorsQ15_512[512];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
|
||||
extern const q15_t WeightsQ15_2048[4096];
|
||||
extern const q15_t cos_factorsQ15_2048[2048];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
|
||||
extern const q15_t WeightsQ15_8192[16384];
|
||||
extern const q15_t cos_factorsQ15_8192[8192];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
|
||||
extern const q31_t WeightsQ31_128[256];
|
||||
extern const q31_t cos_factorsQ31_128[128];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
|
||||
extern const q31_t WeightsQ31_512[1024];
|
||||
extern const q31_t cos_factorsQ31_512[512];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
|
||||
extern const q31_t WeightsQ31_2048[4096];
|
||||
extern const q31_t cos_factorsQ31_2048[2048];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
|
||||
extern const q31_t WeightsQ31_8192[16384];
|
||||
extern const q31_t cos_factorsQ31_8192[8192];
|
||||
#endif
|
||||
|
||||
#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
|
||||
extern const q15_t armRecipTableQ15[64];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
|
||||
extern const q31_t armRecipTableQ31[64];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
|
||||
|
||||
/* Tables for Fast Math Sine and Cosine */
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
|
||||
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
|
||||
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
|
||||
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
|
||||
|
||||
#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
|
||||
|
||||
#endif /* ARM_COMMON_TABLES_H */
|
||||
66
CMSIS/arm_const_structs.h
Normal file
66
CMSIS/arm_const_structs.h
Normal file
@@ -0,0 +1,66 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
7361
CMSIS/arm_math.h
Normal file
7361
CMSIS/arm_math.h
Normal file
File diff suppressed because it is too large
Load Diff
894
CMSIS/cmsis_armcc.h
Normal file
894
CMSIS/cmsis_armcc.h
Normal file
@@ -0,0 +1,894 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_armcc.h
|
||||
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
|
||||
* @version V5.1.0
|
||||
* @date 08. May 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_ARMCC_H
|
||||
#define __CMSIS_ARMCC_H
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
|
||||
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
|
||||
#endif
|
||||
|
||||
/* CMSIS compiler control architecture macros */
|
||||
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
|
||||
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#endif
|
||||
|
||||
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#endif
|
||||
|
||||
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#endif
|
||||
|
||||
/* __ARM_ARCH_8M_BASE__ not applicable */
|
||||
/* __ARM_ARCH_8M_MAIN__ not applicable */
|
||||
|
||||
/* CMSIS compiler control DSP macros */
|
||||
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
#define __ARM_FEATURE_DSP 1
|
||||
#endif
|
||||
|
||||
/* CMSIS compiler specific defines */
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE __inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static __inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE static __forceinline
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __declspec(noreturn)
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION __packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#define __COMPILER_BARRIER() __memory_changed()
|
||||
#endif
|
||||
|
||||
/* ######################### Startup and Lowlevel Init ######################## */
|
||||
|
||||
#ifndef __PROGRAM_START
|
||||
#define __PROGRAM_START __main
|
||||
#endif
|
||||
|
||||
#ifndef __INITIAL_SP
|
||||
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
|
||||
#endif
|
||||
|
||||
#ifndef __STACK_LIMIT
|
||||
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE
|
||||
#define __VECTOR_TABLE __Vectors
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE_ATTRIBUTE
|
||||
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
|
||||
#endif
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Enable IRQ Interrupts
|
||||
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
/* intrinsic void __enable_irq(); */
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable IRQ Interrupts
|
||||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
/* intrinsic void __disable_irq(); */
|
||||
|
||||
/**
|
||||
\brief Get Control Register
|
||||
\details Returns the content of the Control Register.
|
||||
\return Control Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_CONTROL(void)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
return(__regControl);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Control Register
|
||||
\details Writes the given value to the Control Register.
|
||||
\param [in] control Control Register value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
__regControl = control;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get IPSR Register
|
||||
\details Returns the content of the IPSR Register.
|
||||
\return IPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_IPSR(void)
|
||||
{
|
||||
register uint32_t __regIPSR __ASM("ipsr");
|
||||
return(__regIPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get APSR Register
|
||||
\details Returns the content of the APSR Register.
|
||||
\return APSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
register uint32_t __regAPSR __ASM("apsr");
|
||||
return(__regAPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get xPSR Register
|
||||
\details Returns the content of the xPSR Register.
|
||||
\return xPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_xPSR(void)
|
||||
{
|
||||
register uint32_t __regXPSR __ASM("xpsr");
|
||||
return(__regXPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Process Stack Pointer
|
||||
\details Returns the current value of the Process Stack Pointer (PSP).
|
||||
\return PSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PSP(void)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
return(__regProcessStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Process Stack Pointer
|
||||
\details Assigns the given value to the Process Stack Pointer (PSP).
|
||||
\param [in] topOfProcStack Process Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
__regProcessStackPointer = topOfProcStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Main Stack Pointer
|
||||
\details Returns the current value of the Main Stack Pointer (MSP).
|
||||
\return MSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_MSP(void)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
return(__regMainStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Main Stack Pointer
|
||||
\details Assigns the given value to the Main Stack Pointer (MSP).
|
||||
\param [in] topOfMainStack Main Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
__regMainStackPointer = topOfMainStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Priority Mask
|
||||
\details Returns the current state of the priority mask bit from the Priority Mask Register.
|
||||
\return Priority Mask value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
return(__regPriMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Priority Mask
|
||||
\details Assigns the given value to the Priority Mask Register.
|
||||
\param [in] priMask Priority Mask
|
||||
*/
|
||||
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
__regPriMask = (priMask);
|
||||
}
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief Enable FIQ
|
||||
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable FIQ
|
||||
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Base Priority
|
||||
\details Returns the current value of the Base Priority register.
|
||||
\return Base Priority register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
return(__regBasePri);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority
|
||||
\details Assigns the given value to the Base Priority register.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
__regBasePri = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority with condition
|
||||
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
|
||||
or the new value increases the BASEPRI priority level.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePriMax __ASM("basepri_max");
|
||||
__regBasePriMax = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Fault Mask
|
||||
\details Returns the current value of the Fault Mask register.
|
||||
\return Fault Mask register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
return(__regFaultMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Fault Mask
|
||||
\details Assigns the given value to the Fault Mask register.
|
||||
\param [in] faultMask Fault Mask value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
__regFaultMask = (faultMask & (uint32_t)1U);
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
|
||||
/**
|
||||
\brief Get FPSCR
|
||||
\details Returns the current value of the Floating Point Status/Control register.
|
||||
\return Floating Point Status/Control register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FPSCR(void)
|
||||
{
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
return(__regfpscr);
|
||||
#else
|
||||
return(0U);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set FPSCR
|
||||
\details Assigns the given value to the Floating Point Status/Control register.
|
||||
\param [in] fpscr Floating Point Status/Control value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
|
||||
{
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
__regfpscr = (fpscr);
|
||||
#else
|
||||
(void)fpscr;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/*@} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/* ########################## Core Instruction Access ######################### */
|
||||
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||
Access to dedicated instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief No Operation
|
||||
\details No Operation does nothing. This instruction can be used for code alignment purposes.
|
||||
*/
|
||||
#define __NOP __nop
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Interrupt
|
||||
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFI __wfi
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Event
|
||||
\details Wait For Event is a hint instruction that permits the processor to enter
|
||||
a low-power state until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFE __wfe
|
||||
|
||||
|
||||
/**
|
||||
\brief Send Event
|
||||
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||||
*/
|
||||
#define __SEV __sev
|
||||
|
||||
|
||||
/**
|
||||
\brief Instruction Synchronization Barrier
|
||||
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or memory,
|
||||
after the instruction has been completed.
|
||||
*/
|
||||
#define __ISB() do {\
|
||||
__schedule_barrier();\
|
||||
__isb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Synchronization Barrier
|
||||
\details Acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete.
|
||||
*/
|
||||
#define __DSB() do {\
|
||||
__schedule_barrier();\
|
||||
__dsb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Memory Barrier
|
||||
\details Ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion.
|
||||
*/
|
||||
#define __DMB() do {\
|
||||
__schedule_barrier();\
|
||||
__dmb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (32 bit)
|
||||
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#define __REV __rev
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
|
||||
{
|
||||
rev16 r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
|
||||
{
|
||||
revsh r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right in unsigned value (32 bit)
|
||||
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||
\param [in] op1 Value to rotate
|
||||
\param [in] op2 Number of Bits to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#define __ROR __ror
|
||||
|
||||
|
||||
/**
|
||||
\brief Breakpoint
|
||||
\details Causes the processor to enter Debug state.
|
||||
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
|
||||
\param [in] value is ignored by the processor.
|
||||
If required, a debugger can use it to store additional information about the breakpoint.
|
||||
*/
|
||||
#define __BKPT(value) __breakpoint(value)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse bit order of value
|
||||
\details Reverses the bit order of the given value.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
#define __RBIT __rbit
|
||||
#else
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
|
||||
|
||||
result = value; /* r will be reversed bits of v; first get LSB of v */
|
||||
for (value >>= 1U; value != 0U; value >>= 1U)
|
||||
{
|
||||
result <<= 1U;
|
||||
result |= value & 1U;
|
||||
s--;
|
||||
}
|
||||
result <<= s; /* shift when v's highest bits are zero */
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Count leading zeros
|
||||
\details Counts the number of leading zeros of a data value.
|
||||
\param [in] value Value to count the leading zeros
|
||||
\return number of leading zeros in value
|
||||
*/
|
||||
#define __CLZ __clz
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (8 bit)
|
||||
\details Executes a exclusive LDR instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (16 bit)
|
||||
\details Executes a exclusive LDR instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (32 bit)
|
||||
\details Executes a exclusive LDR instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (8 bit)
|
||||
\details Executes a exclusive STR instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXB(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (16 bit)
|
||||
\details Executes a exclusive STR instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXH(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (32 bit)
|
||||
\details Executes a exclusive STR instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXW(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Remove the exclusive lock
|
||||
\details Removes the exclusive lock which is created by LDREX.
|
||||
*/
|
||||
#define __CLREX __clrex
|
||||
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __SSAT __ssat
|
||||
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __USAT __usat
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right with Extend (32 bit)
|
||||
\details Moves each bit of a bitstring right by one bit.
|
||||
The carry input is shifted in at the left end of the bitstring.
|
||||
\param [in] value Value to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
rrx r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRBT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRHT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRT(value, ptr) __strt(value, ptr)
|
||||
|
||||
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
#define __SADD8 __sadd8
|
||||
#define __QADD8 __qadd8
|
||||
#define __SHADD8 __shadd8
|
||||
#define __UADD8 __uadd8
|
||||
#define __UQADD8 __uqadd8
|
||||
#define __UHADD8 __uhadd8
|
||||
#define __SSUB8 __ssub8
|
||||
#define __QSUB8 __qsub8
|
||||
#define __SHSUB8 __shsub8
|
||||
#define __USUB8 __usub8
|
||||
#define __UQSUB8 __uqsub8
|
||||
#define __UHSUB8 __uhsub8
|
||||
#define __SADD16 __sadd16
|
||||
#define __QADD16 __qadd16
|
||||
#define __SHADD16 __shadd16
|
||||
#define __UADD16 __uadd16
|
||||
#define __UQADD16 __uqadd16
|
||||
#define __UHADD16 __uhadd16
|
||||
#define __SSUB16 __ssub16
|
||||
#define __QSUB16 __qsub16
|
||||
#define __SHSUB16 __shsub16
|
||||
#define __USUB16 __usub16
|
||||
#define __UQSUB16 __uqsub16
|
||||
#define __UHSUB16 __uhsub16
|
||||
#define __SASX __sasx
|
||||
#define __QASX __qasx
|
||||
#define __SHASX __shasx
|
||||
#define __UASX __uasx
|
||||
#define __UQASX __uqasx
|
||||
#define __UHASX __uhasx
|
||||
#define __SSAX __ssax
|
||||
#define __QSAX __qsax
|
||||
#define __SHSAX __shsax
|
||||
#define __USAX __usax
|
||||
#define __UQSAX __uqsax
|
||||
#define __UHSAX __uhsax
|
||||
#define __USAD8 __usad8
|
||||
#define __USADA8 __usada8
|
||||
#define __SSAT16 __ssat16
|
||||
#define __USAT16 __usat16
|
||||
#define __UXTB16 __uxtb16
|
||||
#define __UXTAB16 __uxtab16
|
||||
#define __SXTB16 __sxtb16
|
||||
#define __SXTAB16 __sxtab16
|
||||
#define __SMUAD __smuad
|
||||
#define __SMUADX __smuadx
|
||||
#define __SMLAD __smlad
|
||||
#define __SMLADX __smladx
|
||||
#define __SMLALD __smlald
|
||||
#define __SMLALDX __smlaldx
|
||||
#define __SMUSD __smusd
|
||||
#define __SMUSDX __smusdx
|
||||
#define __SMLSD __smlsd
|
||||
#define __SMLSDX __smlsdx
|
||||
#define __SMLSLD __smlsld
|
||||
#define __SMLSLDX __smlsldx
|
||||
#define __SEL __sel
|
||||
#define __QADD __qadd
|
||||
#define __QSUB __qsub
|
||||
|
||||
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
|
||||
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
|
||||
|
||||
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
|
||||
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
|
||||
|
||||
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
|
||||
((int64_t)(ARG3) << 32U) ) >> 32U))
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||
|
||||
|
||||
#endif /* __CMSIS_ARMCC_H */
|
||||
1444
CMSIS/cmsis_armclang.h
Normal file
1444
CMSIS/cmsis_armclang.h
Normal file
File diff suppressed because it is too large
Load Diff
1891
CMSIS/cmsis_armclang_ltm.h
Normal file
1891
CMSIS/cmsis_armclang_ltm.h
Normal file
File diff suppressed because it is too large
Load Diff
283
CMSIS/cmsis_compiler.h
Normal file
283
CMSIS/cmsis_compiler.h
Normal file
@@ -0,0 +1,283 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
2168
CMSIS/cmsis_gcc.h
Normal file
2168
CMSIS/cmsis_gcc.h
Normal file
File diff suppressed because it is too large
Load Diff
964
CMSIS/cmsis_iccarm.h
Normal file
964
CMSIS/cmsis_iccarm.h
Normal file
@@ -0,0 +1,964 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_iccarm.h
|
||||
* @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
|
||||
* @version V5.1.0
|
||||
* @date 08. May 2019
|
||||
******************************************************************************/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2017-2019 IAR Systems
|
||||
// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License")
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#ifndef __CMSIS_ICCARM_H__
|
||||
#define __CMSIS_ICCARM_H__
|
||||
|
||||
#ifndef __ICCARM__
|
||||
#error This file should only be compiled by ICCARM
|
||||
#endif
|
||||
|
||||
#pragma system_include
|
||||
|
||||
#define __IAR_FT _Pragma("inline=forced") __intrinsic
|
||||
|
||||
#if (__VER__ >= 8000000)
|
||||
#define __ICCARM_V8 1
|
||||
#else
|
||||
#define __ICCARM_V8 0
|
||||
#endif
|
||||
|
||||
#ifndef __ALIGNED
|
||||
#if __ICCARM_V8
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#elif (__VER__ >= 7080000)
|
||||
/* Needs IAR language extensions */
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#else
|
||||
#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/* Define compiler macros for CPU architecture, used in CMSIS 5.
|
||||
*/
|
||||
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
|
||||
/* Macros already defined */
|
||||
#else
|
||||
#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#elif defined(__ARM8M_BASELINE__)
|
||||
#define __ARM_ARCH_8M_BASE__ 1
|
||||
#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
|
||||
#if __ARM_ARCH == 6
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#elif __ARM_ARCH == 7
|
||||
#if __ARM_FEATURE_DSP
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#else
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#endif
|
||||
#endif /* __ARM_ARCH */
|
||||
#endif /* __ARM_ARCH_PROFILE == 'M' */
|
||||
#endif
|
||||
|
||||
/* Alternativ core deduction for older ICCARM's */
|
||||
#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
|
||||
!defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
|
||||
#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
|
||||
#define __ARM_ARCH_8M_BASE__ 1
|
||||
#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#else
|
||||
#error "Unknown target."
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
|
||||
#define __IAR_M0_FAMILY 1
|
||||
#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
|
||||
#define __IAR_M0_FAMILY 1
|
||||
#else
|
||||
#define __IAR_M0_FAMILY 0
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
|
||||
#endif
|
||||
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
|
||||
#ifndef __NO_RETURN
|
||||
#if __ICCARM_V8
|
||||
#define __NO_RETURN __attribute__((__noreturn__))
|
||||
#else
|
||||
#define __NO_RETURN _Pragma("object_attribute=__noreturn")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED __packed
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED_STRUCT
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED_UNION
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED_UNION __packed union
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __RESTRICT
|
||||
#if __ICCARM_V8
|
||||
#define __RESTRICT __restrict
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __RESTRICT restrict
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
|
||||
#ifndef __FORCEINLINE
|
||||
#define __FORCEINLINE _Pragma("inline=forced")
|
||||
#endif
|
||||
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
|
||||
{
|
||||
return *(__packed uint16_t*)(ptr);
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
|
||||
{
|
||||
*(__packed uint16_t*)(ptr) = val;;
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
|
||||
{
|
||||
return *(__packed uint32_t*)(ptr);
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
|
||||
{
|
||||
*(__packed uint32_t*)(ptr) = val;;
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__packed struct __iar_u32 { uint32_t v; };
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
|
||||
#endif
|
||||
|
||||
#ifndef __USED
|
||||
#if __ICCARM_V8
|
||||
#define __USED __attribute__((used))
|
||||
#else
|
||||
#define __USED _Pragma("__root")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __WEAK
|
||||
#if __ICCARM_V8
|
||||
#define __WEAK __attribute__((weak))
|
||||
#else
|
||||
#define __WEAK _Pragma("__weak")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PROGRAM_START
|
||||
#define __PROGRAM_START __iar_program_start
|
||||
#endif
|
||||
|
||||
#ifndef __INITIAL_SP
|
||||
#define __INITIAL_SP CSTACK$$Limit
|
||||
#endif
|
||||
|
||||
#ifndef __STACK_LIMIT
|
||||
#define __STACK_LIMIT CSTACK$$Base
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE
|
||||
#define __VECTOR_TABLE __vector_table
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE_ATTRIBUTE
|
||||
#define __VECTOR_TABLE_ATTRIBUTE @".intvec"
|
||||
#endif
|
||||
|
||||
#ifndef __ICCARM_INTRINSICS_VERSION__
|
||||
#define __ICCARM_INTRINSICS_VERSION__ 0
|
||||
#endif
|
||||
|
||||
#if __ICCARM_INTRINSICS_VERSION__ == 2
|
||||
|
||||
#if defined(__CLZ)
|
||||
#undef __CLZ
|
||||
#endif
|
||||
#if defined(__REVSH)
|
||||
#undef __REVSH
|
||||
#endif
|
||||
#if defined(__RBIT)
|
||||
#undef __RBIT
|
||||
#endif
|
||||
#if defined(__SSAT)
|
||||
#undef __SSAT
|
||||
#endif
|
||||
#if defined(__USAT)
|
||||
#undef __USAT
|
||||
#endif
|
||||
|
||||
#include "iccarm_builtin.h"
|
||||
|
||||
#define __disable_fault_irq __iar_builtin_disable_fiq
|
||||
#define __disable_irq __iar_builtin_disable_interrupt
|
||||
#define __enable_fault_irq __iar_builtin_enable_fiq
|
||||
#define __enable_irq __iar_builtin_enable_interrupt
|
||||
#define __arm_rsr __iar_builtin_rsr
|
||||
#define __arm_wsr __iar_builtin_wsr
|
||||
|
||||
|
||||
#define __get_APSR() (__arm_rsr("APSR"))
|
||||
#define __get_BASEPRI() (__arm_rsr("BASEPRI"))
|
||||
#define __get_CONTROL() (__arm_rsr("CONTROL"))
|
||||
#define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
|
||||
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
#define __get_FPSCR() (__arm_rsr("FPSCR"))
|
||||
#define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
|
||||
#else
|
||||
#define __get_FPSCR() ( 0 )
|
||||
#define __set_FPSCR(VALUE) ((void)VALUE)
|
||||
#endif
|
||||
|
||||
#define __get_IPSR() (__arm_rsr("IPSR"))
|
||||
#define __get_MSP() (__arm_rsr("MSP"))
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
#define __get_MSPLIM() (0U)
|
||||
#else
|
||||
#define __get_MSPLIM() (__arm_rsr("MSPLIM"))
|
||||
#endif
|
||||
#define __get_PRIMASK() (__arm_rsr("PRIMASK"))
|
||||
#define __get_PSP() (__arm_rsr("PSP"))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __get_PSPLIM() (0U)
|
||||
#else
|
||||
#define __get_PSPLIM() (__arm_rsr("PSPLIM"))
|
||||
#endif
|
||||
|
||||
#define __get_xPSR() (__arm_rsr("xPSR"))
|
||||
|
||||
#define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
|
||||
#define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
|
||||
#define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
|
||||
#define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
|
||||
#define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
#define __set_MSPLIM(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
|
||||
#endif
|
||||
#define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
|
||||
#define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __set_PSPLIM(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
|
||||
#endif
|
||||
|
||||
#define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
|
||||
#define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
|
||||
#define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
|
||||
#define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
|
||||
#define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
|
||||
#define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
|
||||
#define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
|
||||
#define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
|
||||
#define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
|
||||
#define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
|
||||
#define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
|
||||
#define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
|
||||
#define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
|
||||
#define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __TZ_get_PSPLIM_NS() (0U)
|
||||
#define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
|
||||
#define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
|
||||
#endif
|
||||
|
||||
#define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
|
||||
#define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
|
||||
|
||||
#define __NOP __iar_builtin_no_operation
|
||||
|
||||
#define __CLZ __iar_builtin_CLZ
|
||||
#define __CLREX __iar_builtin_CLREX
|
||||
|
||||
#define __DMB __iar_builtin_DMB
|
||||
#define __DSB __iar_builtin_DSB
|
||||
#define __ISB __iar_builtin_ISB
|
||||
|
||||
#define __LDREXB __iar_builtin_LDREXB
|
||||
#define __LDREXH __iar_builtin_LDREXH
|
||||
#define __LDREXW __iar_builtin_LDREX
|
||||
|
||||
#define __RBIT __iar_builtin_RBIT
|
||||
#define __REV __iar_builtin_REV
|
||||
#define __REV16 __iar_builtin_REV16
|
||||
|
||||
__IAR_FT int16_t __REVSH(int16_t val)
|
||||
{
|
||||
return (int16_t) __iar_builtin_REVSH(val);
|
||||
}
|
||||
|
||||
#define __ROR __iar_builtin_ROR
|
||||
#define __RRX __iar_builtin_RRX
|
||||
|
||||
#define __SEV __iar_builtin_SEV
|
||||
|
||||
#if !__IAR_M0_FAMILY
|
||||
#define __SSAT __iar_builtin_SSAT
|
||||
#endif
|
||||
|
||||
#define __STREXB __iar_builtin_STREXB
|
||||
#define __STREXH __iar_builtin_STREXH
|
||||
#define __STREXW __iar_builtin_STREX
|
||||
|
||||
#if !__IAR_M0_FAMILY
|
||||
#define __USAT __iar_builtin_USAT
|
||||
#endif
|
||||
|
||||
#define __WFE __iar_builtin_WFE
|
||||
#define __WFI __iar_builtin_WFI
|
||||
|
||||
#if __ARM_MEDIA__
|
||||
#define __SADD8 __iar_builtin_SADD8
|
||||
#define __QADD8 __iar_builtin_QADD8
|
||||
#define __SHADD8 __iar_builtin_SHADD8
|
||||
#define __UADD8 __iar_builtin_UADD8
|
||||
#define __UQADD8 __iar_builtin_UQADD8
|
||||
#define __UHADD8 __iar_builtin_UHADD8
|
||||
#define __SSUB8 __iar_builtin_SSUB8
|
||||
#define __QSUB8 __iar_builtin_QSUB8
|
||||
#define __SHSUB8 __iar_builtin_SHSUB8
|
||||
#define __USUB8 __iar_builtin_USUB8
|
||||
#define __UQSUB8 __iar_builtin_UQSUB8
|
||||
#define __UHSUB8 __iar_builtin_UHSUB8
|
||||
#define __SADD16 __iar_builtin_SADD16
|
||||
#define __QADD16 __iar_builtin_QADD16
|
||||
#define __SHADD16 __iar_builtin_SHADD16
|
||||
#define __UADD16 __iar_builtin_UADD16
|
||||
#define __UQADD16 __iar_builtin_UQADD16
|
||||
#define __UHADD16 __iar_builtin_UHADD16
|
||||
#define __SSUB16 __iar_builtin_SSUB16
|
||||
#define __QSUB16 __iar_builtin_QSUB16
|
||||
#define __SHSUB16 __iar_builtin_SHSUB16
|
||||
#define __USUB16 __iar_builtin_USUB16
|
||||
#define __UQSUB16 __iar_builtin_UQSUB16
|
||||
#define __UHSUB16 __iar_builtin_UHSUB16
|
||||
#define __SASX __iar_builtin_SASX
|
||||
#define __QASX __iar_builtin_QASX
|
||||
#define __SHASX __iar_builtin_SHASX
|
||||
#define __UASX __iar_builtin_UASX
|
||||
#define __UQASX __iar_builtin_UQASX
|
||||
#define __UHASX __iar_builtin_UHASX
|
||||
#define __SSAX __iar_builtin_SSAX
|
||||
#define __QSAX __iar_builtin_QSAX
|
||||
#define __SHSAX __iar_builtin_SHSAX
|
||||
#define __USAX __iar_builtin_USAX
|
||||
#define __UQSAX __iar_builtin_UQSAX
|
||||
#define __UHSAX __iar_builtin_UHSAX
|
||||
#define __USAD8 __iar_builtin_USAD8
|
||||
#define __USADA8 __iar_builtin_USADA8
|
||||
#define __SSAT16 __iar_builtin_SSAT16
|
||||
#define __USAT16 __iar_builtin_USAT16
|
||||
#define __UXTB16 __iar_builtin_UXTB16
|
||||
#define __UXTAB16 __iar_builtin_UXTAB16
|
||||
#define __SXTB16 __iar_builtin_SXTB16
|
||||
#define __SXTAB16 __iar_builtin_SXTAB16
|
||||
#define __SMUAD __iar_builtin_SMUAD
|
||||
#define __SMUADX __iar_builtin_SMUADX
|
||||
#define __SMMLA __iar_builtin_SMMLA
|
||||
#define __SMLAD __iar_builtin_SMLAD
|
||||
#define __SMLADX __iar_builtin_SMLADX
|
||||
#define __SMLALD __iar_builtin_SMLALD
|
||||
#define __SMLALDX __iar_builtin_SMLALDX
|
||||
#define __SMUSD __iar_builtin_SMUSD
|
||||
#define __SMUSDX __iar_builtin_SMUSDX
|
||||
#define __SMLSD __iar_builtin_SMLSD
|
||||
#define __SMLSDX __iar_builtin_SMLSDX
|
||||
#define __SMLSLD __iar_builtin_SMLSLD
|
||||
#define __SMLSLDX __iar_builtin_SMLSLDX
|
||||
#define __SEL __iar_builtin_SEL
|
||||
#define __QADD __iar_builtin_QADD
|
||||
#define __QSUB __iar_builtin_QSUB
|
||||
#define __PKHBT __iar_builtin_PKHBT
|
||||
#define __PKHTB __iar_builtin_PKHTB
|
||||
#endif
|
||||
|
||||
#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
|
||||
#define __CLZ __cmsis_iar_clz_not_active
|
||||
#define __SSAT __cmsis_iar_ssat_not_active
|
||||
#define __USAT __cmsis_iar_usat_not_active
|
||||
#define __RBIT __cmsis_iar_rbit_not_active
|
||||
#define __get_APSR __cmsis_iar_get_APSR_not_active
|
||||
#endif
|
||||
|
||||
|
||||
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
|
||||
#define __get_FPSCR __cmsis_iar_get_FPSR_not_active
|
||||
#define __set_FPSCR __cmsis_iar_set_FPSR_not_active
|
||||
#endif
|
||||
|
||||
#ifdef __INTRINSICS_INCLUDED
|
||||
#error intrinsics.h is already included previously!
|
||||
#endif
|
||||
|
||||
#include <intrinsics.h>
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
|
||||
#undef __CLZ
|
||||
#undef __SSAT
|
||||
#undef __USAT
|
||||
#undef __RBIT
|
||||
#undef __get_APSR
|
||||
|
||||
__STATIC_INLINE uint8_t __CLZ(uint32_t data)
|
||||
{
|
||||
if (data == 0U) { return 32U; }
|
||||
|
||||
uint32_t count = 0U;
|
||||
uint32_t mask = 0x80000000U;
|
||||
|
||||
while ((data & mask) == 0U)
|
||||
{
|
||||
count += 1U;
|
||||
mask = mask >> 1U;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __RBIT(uint32_t v)
|
||||
{
|
||||
uint8_t sc = 31U;
|
||||
uint32_t r = v;
|
||||
for (v >>= 1U; v; v >>= 1U)
|
||||
{
|
||||
r <<= 1U;
|
||||
r |= v & 1U;
|
||||
sc--;
|
||||
}
|
||||
return (r << sc);
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm("MRS %0,APSR" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
|
||||
#undef __get_FPSCR
|
||||
#undef __set_FPSCR
|
||||
#define __get_FPSCR() (0)
|
||||
#define __set_FPSCR(VALUE) ((void)VALUE)
|
||||
#endif
|
||||
|
||||
#pragma diag_suppress=Pe940
|
||||
#pragma diag_suppress=Pe177
|
||||
|
||||
#define __enable_irq __enable_interrupt
|
||||
#define __disable_irq __disable_interrupt
|
||||
#define __NOP __no_operation
|
||||
|
||||
#define __get_xPSR __get_PSR
|
||||
|
||||
#if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
|
||||
|
||||
__IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
|
||||
{
|
||||
return __LDREX((unsigned long *)ptr);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
|
||||
{
|
||||
return __STREX(value, (unsigned long *)ptr);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
|
||||
#if (__CORTEX_M >= 0x03)
|
||||
|
||||
__IAR_FT uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
|
||||
return(result);
|
||||
}
|
||||
|
||||
__IAR_FT void __set_BASEPRI_MAX(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
|
||||
}
|
||||
|
||||
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||||
{
|
||||
return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
|
||||
}
|
||||
|
||||
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||||
|
||||
__IAR_FT uint32_t __get_MSPLIM(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,MSPLIM" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __set_MSPLIM(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR MSPLIM,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __get_PSPLIM(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,PSPLIM" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __set_PSPLIM(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR PSPLIM,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PSP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PSP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PSP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PSP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_MSP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,MSP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_MSP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR MSP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_SP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,SP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
__IAR_FT void __TZ_set_SP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR SP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
|
||||
|
||||
#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
|
||||
|
||||
#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
__STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
|
||||
|
||||
__IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
|
||||
{
|
||||
__ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
|
||||
{
|
||||
__ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
|
||||
{
|
||||
__ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||||
|
||||
|
||||
__IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
|
||||
|
||||
#undef __IAR_FT
|
||||
#undef __IAR_M0_FAMILY
|
||||
#undef __ICCARM_V8
|
||||
|
||||
#pragma diag_default=Pe940
|
||||
#pragma diag_default=Pe177
|
||||
|
||||
#endif /* __CMSIS_ICCARM_H__ */
|
||||
39
CMSIS/cmsis_version.h
Normal file
39
CMSIS/cmsis_version.h
Normal file
@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.3
|
||||
* @date 24. June 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
2124
CMSIS/core_cm4.h
Normal file
2124
CMSIS/core_cm4.h
Normal file
File diff suppressed because it is too large
Load Diff
272
CMSIS/mpu_armv7.h
Normal file
272
CMSIS/mpu_armv7.h
Normal file
@@ -0,0 +1,272 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.1.0
|
||||
* @date 08. March 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(((MPU_RASR_ENABLE_Msk))))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if shareable) or 010b (if non-shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
20
LPC54114/drivers/fsl_power.c
Normal file
20
LPC54114/drivers/fsl_power.c
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016, NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_power.h"
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.power"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/* Empty file since implementation is in header file and power library */
|
||||
235
LPC54114/drivers/fsl_power.h
Normal file
235
LPC54114/drivers/fsl_power.h
Normal file
@@ -0,0 +1,235 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016, NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_POWER_H_
|
||||
#define _FSL_POWER_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*! @addtogroup power */
|
||||
/*! @{ */
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief power driver version 2.0.0. */
|
||||
#define FSL_POWER_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
|
||||
/*@}*/
|
||||
|
||||
#define MAKE_PD_BITS(reg, slot) (((reg) << 8) | (slot))
|
||||
#define PDRCFG0 0x0U
|
||||
#define PDRCFG1 0x1U
|
||||
|
||||
typedef enum pd_bits
|
||||
{
|
||||
kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
|
||||
kPDRUNCFG_PD_FLASH = MAKE_PD_BITS(PDRCFG0, 5U),
|
||||
kPDRUNCFG_PD_TEMPS = MAKE_PD_BITS(PDRCFG0, 6U),
|
||||
kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
|
||||
kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
|
||||
kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
|
||||
kPDRUNCFG_PD_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 11U),
|
||||
kPDRUNCFG_LP_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 12U),
|
||||
kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
|
||||
kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
|
||||
kPDRUNCFG_PD_RAM2 = MAKE_PD_BITS(PDRCFG0, 15U),
|
||||
kPDRUNCFG_PD_RAMX = MAKE_PD_BITS(PDRCFG0, 16U),
|
||||
kPDRUNCFG_PD_ROM = MAKE_PD_BITS(PDRCFG0, 17U),
|
||||
kPDRUNCFG_PD_VDDHV_ENA = MAKE_PD_BITS(PDRCFG0, 18U),
|
||||
kPDRUNCFG_PD_VD7_ENA = MAKE_PD_BITS(PDRCFG0, 19U),
|
||||
kPDRUNCFG_PD_WDT_OSC = MAKE_PD_BITS(PDRCFG0, 20U),
|
||||
kPDRUNCFG_PD_USB0_PHY = MAKE_PD_BITS(PDRCFG0, 21U),
|
||||
kPDRUNCFG_PD_SYS_PLL0 = MAKE_PD_BITS(PDRCFG0, 22U),
|
||||
kPDRUNCFG_PD_VREFP_SW = MAKE_PD_BITS(PDRCFG0, 23U),
|
||||
kPDRUNCFG_PD_FLASH_BG = MAKE_PD_BITS(PDRCFG0, 25U),
|
||||
|
||||
kPDRUNCFG_PD_ALT_FLASH_IBG = MAKE_PD_BITS(PDRCFG1, 28U),
|
||||
kPDRUNCFG_SEL_ALT_FLASH_IBG = MAKE_PD_BITS(PDRCFG1, 29U),
|
||||
|
||||
/*
|
||||
This enum member has no practical meaning,it is used to avoid MISRA issue,
|
||||
user should not trying to use it.
|
||||
*/
|
||||
kPDRUNCFG_ForceUnsigned = (int)0x80000000U
|
||||
} pd_bit_t;
|
||||
|
||||
/* Power mode configuration API parameter */
|
||||
typedef enum _power_mode_config
|
||||
{
|
||||
kPmu_Sleep = 0U,
|
||||
kPmu_Deep_Sleep = 1U,
|
||||
kPmu_Deep_PowerDown = 2U,
|
||||
} power_mode_cfg_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @name Power Configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief API to enable PDRUNCFG bit in the Syscon. Note that enabling the bit powers down the peripheral
|
||||
*
|
||||
* @param en peripheral for which to enable the PDRUNCFG bit
|
||||
* @return none
|
||||
*/
|
||||
static inline void POWER_EnablePD(pd_bit_t en)
|
||||
{
|
||||
/* PDRUNCFGSET */
|
||||
SYSCON->PDRUNCFGSET[((uint32_t)en >> 8UL)] = (1UL << ((uint32_t)en & 0xffU));
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief API to disable PDRUNCFG bit in the Syscon. Note that disabling the bit powers up the peripheral
|
||||
*
|
||||
* @param en peripheral for which to disable the PDRUNCFG bit
|
||||
* @return none
|
||||
*/
|
||||
static inline void POWER_DisablePD(pd_bit_t en)
|
||||
{
|
||||
/* PDRUNCFGCLR */
|
||||
SYSCON->PDRUNCFGCLR[((uint32_t)en >> 8UL)] = (1UL << ((uint32_t)en & 0xffU));
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief API to enable deep sleep bit in the ARM Core.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
static inline void POWER_EnableDeepSleep(void)
|
||||
{
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief API to disable deep sleep bit in the ARM Core.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
static inline void POWER_DisableDeepSleep(void)
|
||||
{
|
||||
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief API to power down flash controller.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
static inline void POWER_PowerDownFlash(void)
|
||||
{
|
||||
/* note, we retain flash trim to make waking back up faster */
|
||||
SYSCON->PDRUNCFGSET[0] =
|
||||
SYSCON_PDRUNCFG_LP_VDDFLASH_MASK | SYSCON_PDRUNCFG_PD_VDDHV_ENA_MASK | SYSCON_PDRUNCFG_PD_FLASH_BG_MASK;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* TURN OFF clock for Flash Controller (only needed for FLASH programming, will be turned on by ROM API) */
|
||||
CLOCK_DisableClock(kCLOCK_Flash);
|
||||
|
||||
/* TURN OFF clock for Flash Accelerator */
|
||||
CLOCK_DisableClock(kCLOCK_Fmc);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief API to power up flash controller.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
static inline void POWER_PowerUpFlash(void)
|
||||
{
|
||||
SYSCON->PDRUNCFGCLR[0] = SYSCON_PDRUNCFG_LP_VDDFLASH_MASK | SYSCON_PDRUNCFG_PD_VDDHV_ENA_MASK;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* TURN ON clock for flash Accelerator */
|
||||
CLOCK_EnableClock(kCLOCK_Fmc);
|
||||
|
||||
/* TURN ON clock for flash Controller */
|
||||
CLOCK_EnableClock(kCLOCK_Flash);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to enter different power mode.
|
||||
*
|
||||
* @param mode Power mode.
|
||||
* @param exclude_from_pd Bit mask of the PDRUNCFG bits that needs to be powered on during deep sleep
|
||||
* @return none
|
||||
*/
|
||||
void POWER_EnterPowerMode(power_mode_cfg_t mode, uint64_t exclude_from_pd);
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to enter sleep mode.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void POWER_EnterSleep(void);
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to enter deep sleep mode.
|
||||
*
|
||||
* @param exclude_from_pd Bit mask of the PDRUNCFG bits that needs to be powered on during deep sleep
|
||||
* @return none
|
||||
*/
|
||||
void POWER_EnterDeepSleep(uint64_t exclude_from_pd);
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to enter deep power down mode.
|
||||
*
|
||||
* @param exclude_from_pd Bit mask of the PDRUNCFG bits that needs to be powered on during deep power down mode,
|
||||
* but this is has no effect as the voltages are cut off.
|
||||
* @return none
|
||||
*/
|
||||
void POWER_EnterDeepPowerDown(uint64_t exclude_from_pd);
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to choose normal regulation and set the voltage for the desired operating frequency.
|
||||
*
|
||||
* @param freq - The desired frequency at which the part would like to operate,
|
||||
* note that the voltage and flash wait states should be set before changing frequency
|
||||
* @return none
|
||||
*/
|
||||
void POWER_SetVoltageForFreq(uint32_t freq);
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to choose low power regulation and set the voltage for the desired operating frequency.
|
||||
*
|
||||
* @param freq - The desired frequency at which the part would like to operate,
|
||||
* note only 12MHz and 48Mhz are supported
|
||||
* @return none
|
||||
*/
|
||||
void POWER_SetLowPowerVoltageForFreq(uint32_t freq);
|
||||
|
||||
/*!
|
||||
* @brief Power Library API to return the library version.
|
||||
*
|
||||
* @return version number of the power library
|
||||
*/
|
||||
uint32_t POWER_GetLibVersion(void);
|
||||
|
||||
/* @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @} */
|
||||
|
||||
#endif /* _FSL_POWER_H_ */
|
||||
BIN
LPC54114/mcuxpresso/libpower_cm4_hardabi.a
Normal file
BIN
LPC54114/mcuxpresso/libpower_cm4_hardabi.a
Normal file
Binary file not shown.
BIN
LPC54114/mcuxpresso/libpower_cm4_softabi.a
Normal file
BIN
LPC54114/mcuxpresso/libpower_cm4_softabi.a
Normal file
Binary file not shown.
131
board/board.c
Normal file
131
board/board.c
Normal file
@@ -0,0 +1,131 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include "fsl_common.h"
|
||||
#include "clock_config.h"
|
||||
#include "board.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
|
||||
#include "fsl_i2c.h"
|
||||
#endif /* SDK_I2C_BASED_COMPONENT_USED */
|
||||
#if defined BOARD_USE_CODEC
|
||||
#include "fsl_wm8904.h"
|
||||
#endif
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/* Clock rate on the CLKIN pin */
|
||||
const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
/* Initialize debug console. */
|
||||
status_t BOARD_InitDebugConsole(void)
|
||||
{
|
||||
#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
|
||||
status_t result;
|
||||
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
|
||||
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
|
||||
RESET_PeripheralReset(BOARD_DEBUG_UART_RST);
|
||||
result = DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE,
|
||||
BOARD_DEBUG_UART_CLK_FREQ);
|
||||
assert(kStatus_Success == result);
|
||||
return result;
|
||||
#else
|
||||
return kStatus_Success;
|
||||
#endif
|
||||
}
|
||||
|
||||
status_t BOARD_InitDebugConsole_Core1(void)
|
||||
{
|
||||
#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
|
||||
status_t result;
|
||||
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
|
||||
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
|
||||
RESET_PeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
|
||||
result = DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1,
|
||||
BOARD_DEBUG_UART_TYPE_CORE1, BOARD_DEBUG_UART_CLK_FREQ_CORE1);
|
||||
assert(kStatus_Success == result);
|
||||
return result;
|
||||
#else
|
||||
return kStatus_Success;
|
||||
#endif
|
||||
}
|
||||
|
||||
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
|
||||
void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
|
||||
{
|
||||
i2c_master_config_t i2cConfig = {0};
|
||||
|
||||
I2C_MasterGetDefaultConfig(&i2cConfig);
|
||||
I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
|
||||
}
|
||||
|
||||
status_t BOARD_I2C_Send(I2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *txBuff,
|
||||
uint8_t txBuffSize)
|
||||
{
|
||||
i2c_master_transfer_t masterXfer;
|
||||
|
||||
/* Prepare transfer structure. */
|
||||
masterXfer.slaveAddress = deviceAddress;
|
||||
masterXfer.direction = kI2C_Write;
|
||||
masterXfer.subaddress = subAddress;
|
||||
masterXfer.subaddressSize = subaddressSize;
|
||||
masterXfer.data = txBuff;
|
||||
masterXfer.dataSize = txBuffSize;
|
||||
masterXfer.flags = kI2C_TransferDefaultFlag;
|
||||
|
||||
return I2C_MasterTransferBlocking(base, &masterXfer);
|
||||
}
|
||||
|
||||
status_t BOARD_I2C_Receive(I2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *rxBuff,
|
||||
uint8_t rxBuffSize)
|
||||
{
|
||||
i2c_master_transfer_t masterXfer;
|
||||
|
||||
/* Prepare transfer structure. */
|
||||
masterXfer.slaveAddress = deviceAddress;
|
||||
masterXfer.subaddress = subAddress;
|
||||
masterXfer.subaddressSize = subaddressSize;
|
||||
masterXfer.data = rxBuff;
|
||||
masterXfer.dataSize = rxBuffSize;
|
||||
masterXfer.direction = kI2C_Read;
|
||||
masterXfer.flags = kI2C_TransferDefaultFlag;
|
||||
|
||||
return I2C_MasterTransferBlocking(base, &masterXfer);
|
||||
}
|
||||
|
||||
void BOARD_Codec_I2C_Init(void)
|
||||
{
|
||||
BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
|
||||
}
|
||||
|
||||
status_t BOARD_Codec_I2C_Send(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
|
||||
{
|
||||
return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
|
||||
txBuffSize);
|
||||
}
|
||||
|
||||
status_t BOARD_Codec_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
|
||||
{
|
||||
return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
|
||||
}
|
||||
#endif /* SDK_I2C_BASED_COMPONENT_USED */
|
||||
198
board/board.h
Normal file
198
board/board.h
Normal file
@@ -0,0 +1,198 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
#include "clock_config.h"
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_gpio.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
/*! @brief The board name */
|
||||
#define BOARD_NAME "LPCXPRESSO54114"
|
||||
|
||||
#define BOARD_EXTCLKINRATE (0)
|
||||
|
||||
/*! @brief The UART to use for debug messages. */
|
||||
#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
|
||||
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) USART0
|
||||
#define BOARD_DEBUG_UART_INSTANCE 0U
|
||||
#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetFlexCommClkFreq(0)
|
||||
#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0
|
||||
#define BOARD_DEBUG_UART_RST kFC0_RST_SHIFT_RSTn
|
||||
#define BOARD_UART_IRQ FLEXCOMM0_IRQn
|
||||
#define BOARD_UART_IRQ_HANDLER FLEXCOMM0_IRQHandler
|
||||
|
||||
#define BOARD_DEBUG_UART_TYPE_CORE1 kSerialPort_Uart
|
||||
#define BOARD_DEBUG_UART_BASEADDR_CORE1 (uint32_t) USART2
|
||||
#define BOARD_DEBUG_UART_INSTANCE_CORE1 2U
|
||||
#define BOARD_DEBUG_UART_CLK_FREQ_CORE1 CLOCK_GetFlexCommClkFreq(2)
|
||||
#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM2
|
||||
#define BOARD_DEBUG_UART_RST_CORE1 kFC2_RST_SHIFT_RSTn
|
||||
#define BOARD_UART_IRQ_CORE1 FLEXCOMM2_IRQn
|
||||
#define BOARD_UART_IRQ_HANDLER_CORE1 FLEXCOMM2_IRQHandler
|
||||
|
||||
#define BOARD_DEBUG_SPI_CLK_FREQ 12000000
|
||||
|
||||
#ifndef BOARD_DEBUG_UART_BAUDRATE
|
||||
#define BOARD_DEBUG_UART_BAUDRATE 115200
|
||||
#endif /* BOARD_DEBUG_UART_BAUDRATE */
|
||||
|
||||
#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
|
||||
#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200
|
||||
#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
|
||||
|
||||
#ifndef BOARD_LED_RED_GPIO
|
||||
#define BOARD_LED_RED_GPIO GPIO
|
||||
#endif
|
||||
#define BOARD_LED_RED_GPIO_PORT 0U
|
||||
#ifndef BOARD_LED_RED_GPIO_PIN
|
||||
#define BOARD_LED_RED_GPIO_PIN 29U
|
||||
#endif
|
||||
#ifndef BOARD_LED_GREEN_GPIO
|
||||
#define BOARD_LED_GREEN_GPIO GPIO
|
||||
#endif
|
||||
#define BOARD_LED_GREEN_GPIO_PORT 1U
|
||||
#ifndef BOARD_LED_GREEN_GPIO_PIN
|
||||
#define BOARD_LED_GREEN_GPIO_PIN 10U
|
||||
#endif
|
||||
#ifndef BOARD_LED_BLUE_GPIO
|
||||
#define BOARD_LED_BLUE_GPIO GPIO
|
||||
#endif
|
||||
#define BOARD_LED_BLUE_GPIO_PORT 1U
|
||||
#ifndef BOARD_LED_BLUE_GPIO_PIN
|
||||
#define BOARD_LED_BLUE_GPIO_PIN 9U
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_SW1_GPIO
|
||||
#define BOARD_SW1_GPIO GPIO
|
||||
#endif
|
||||
#define BOARD_SW1_GPIO_PORT 0U
|
||||
#ifndef BOARD_SW1_GPIO_PIN
|
||||
#define BOARD_SW1_GPIO_PIN 24U
|
||||
#endif
|
||||
#define BOARD_SW1_NAME "SW1"
|
||||
#define BOARD_SW3_IRQ PIN_INT0_IRQn
|
||||
#define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler
|
||||
|
||||
#ifndef BOARD_SW2_GPIO
|
||||
#define BOARD_SW2_GPIO GPIO
|
||||
#endif
|
||||
#define BOARD_SW2_GPIO_PORT 0U
|
||||
#ifndef BOARD_SW2_GPIO_PIN
|
||||
#define BOARD_SW2_GPIO_PIN 31U
|
||||
#endif
|
||||
#define BOARD_SW2_NAME "SW2"
|
||||
#define BOARD_SW3_IRQ PIN_INT0_IRQn
|
||||
#define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler
|
||||
|
||||
#ifndef BOARD_SW3_GPIO
|
||||
#define BOARD_SW3_GPIO GPIO
|
||||
#endif
|
||||
#define BOARD_SW3_GPIO_PORT 0U
|
||||
#ifndef BOARD_SW3_GPIO_PIN
|
||||
#define BOARD_SW3_GPIO_PIN 4U
|
||||
#endif
|
||||
#define BOARD_SW3_NAME "SW3"
|
||||
#define BOARD_SW3_IRQ PIN_INT0_IRQn
|
||||
#define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler
|
||||
#define BOARD_SW3_GPIO_PININT_INDEX 0
|
||||
|
||||
#define BOARD_ARDUINO_INT_IRQ (GINT0_IRQn)
|
||||
#define BOARD_ARDUINO_I2C_IRQ (FLEXCOMM4_IRQn)
|
||||
#define BOARD_ARDUINO_I2C_INDEX (4)
|
||||
/* Board led color mapping */
|
||||
#define LOGIC_LED_ON 0U
|
||||
#define LOGIC_LED_OFF 1U
|
||||
|
||||
#define LED_RED_INIT(output) \
|
||||
GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, \
|
||||
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_RED */
|
||||
#define LED_RED_ON() \
|
||||
GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
|
||||
1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */
|
||||
#define LED_RED_OFF() \
|
||||
GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
|
||||
1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */
|
||||
#define LED_RED_TOGGLE() \
|
||||
GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
|
||||
1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
|
||||
|
||||
#define LED_GREEN_INIT(output) \
|
||||
GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
|
||||
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_GREEN */
|
||||
#define LED_GREEN_ON() \
|
||||
GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
|
||||
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
|
||||
#define LED_GREEN_OFF() \
|
||||
GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
|
||||
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
|
||||
#define LED_GREEN_TOGGLE() \
|
||||
GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
|
||||
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
|
||||
|
||||
#define LED_BLUE_INIT(output) \
|
||||
GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \
|
||||
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_BLUE */
|
||||
#define LED_BLUE_ON() \
|
||||
GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
|
||||
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
|
||||
#define LED_BLUE_OFF() \
|
||||
GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
|
||||
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
|
||||
#define LED_BLUE_TOGGLE() \
|
||||
GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
|
||||
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
|
||||
|
||||
#define BOARD_CODEC_I2C_BASEADDR I2C4
|
||||
#define BOARD_CODEC_I2C_INSTANCE 4U
|
||||
#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
|
||||
|
||||
/* Display. */
|
||||
#define BOARD_LCD_DC_GPIO GPIO
|
||||
#define BOARD_LCD_DC_GPIO_PORT 1U
|
||||
#define BOARD_LCD_DC_GPIO_PIN 15U
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
status_t BOARD_InitDebugConsole(void);
|
||||
status_t BOARD_InitDebugConsole_Core1(void);
|
||||
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
|
||||
void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz);
|
||||
status_t BOARD_I2C_Send(I2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *txBuff,
|
||||
uint8_t txBuffSize);
|
||||
status_t BOARD_I2C_Receive(I2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *rxBuff,
|
||||
uint8_t rxBuffSize);
|
||||
void BOARD_Codec_I2C_Init(void);
|
||||
status_t BOARD_Codec_I2C_Send(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
|
||||
status_t BOARD_Codec_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
|
||||
#endif /* SDK_I2C_BASED_COMPONENT_USED */
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
257
board/clock_config.c
Normal file
257
board/clock_config.c
Normal file
@@ -0,0 +1,257 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
/*
|
||||
* How to set up clock using clock driver functions:
|
||||
*
|
||||
* 1. Setup clock sources.
|
||||
*
|
||||
* 2. Setup voltage for the fastest of the clock outputs
|
||||
*
|
||||
* 3. Set up wait states of the flash.
|
||||
*
|
||||
* 4. Set up all dividers.
|
||||
*
|
||||
* 5. Set up all selectors to provide selected clocks.
|
||||
*/
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Clocks v11.0
|
||||
processor: LPC54114J256
|
||||
package_id: LPC54114J256BD64
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 13.0.1
|
||||
board: LPCXpresso54114
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
#include "fsl_power.h"
|
||||
#include "fsl_clock.h"
|
||||
#include "clock_config.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
************************ BOARD_InitBootClocks function ************************
|
||||
******************************************************************************/
|
||||
void BOARD_InitBootClocks(void)
|
||||
{
|
||||
BOARD_BootClockPLL150M();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
******************** Configuration BOARD_BootClockFRO12M **********************
|
||||
******************************************************************************/
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!Configuration
|
||||
name: BOARD_BootClockFRO12M
|
||||
outputs:
|
||||
- {id: System_clock.outFreq, value: 12 MHz}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables for BOARD_BootClockFRO12M configuration
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Code for BOARD_BootClockFRO12M configuration
|
||||
******************************************************************************/
|
||||
void BOARD_BootClockFRO12M(void)
|
||||
{
|
||||
#ifndef SDK_SECONDARY_CORE
|
||||
/*!< Set up the clock sources */
|
||||
/*!< Set up FRO */
|
||||
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
|
||||
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
|
||||
being below the voltage for current speed */
|
||||
POWER_SetVoltageForFreq(12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
||||
CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
|
||||
|
||||
/*!< Set up dividers */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
|
||||
|
||||
/*!< Set up clock selectors - Attach clocks to the peripheries */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
|
||||
/*!< Set SystemCoreClock variable. */
|
||||
SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
******************* Configuration BOARD_BootClockFROHF48M *********************
|
||||
******************************************************************************/
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!Configuration
|
||||
name: BOARD_BootClockFROHF48M
|
||||
outputs:
|
||||
- {id: System_clock.outFreq, value: 48 MHz}
|
||||
settings:
|
||||
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables for BOARD_BootClockFROHF48M configuration
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Code for BOARD_BootClockFROHF48M configuration
|
||||
******************************************************************************/
|
||||
void BOARD_BootClockFROHF48M(void)
|
||||
{
|
||||
#ifndef SDK_SECONDARY_CORE
|
||||
/*!< Set up the clock sources */
|
||||
/*!< Set up FRO */
|
||||
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
|
||||
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
|
||||
being below the voltage for current speed */
|
||||
POWER_SetVoltageForFreq(48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
||||
CLOCK_SetFLASHAccessCyclesForFreq(48000000U); /*!< Set FLASH wait states for core */
|
||||
|
||||
CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
|
||||
|
||||
/*!< Set up dividers */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
|
||||
|
||||
/*!< Set up clock selectors - Attach clocks to the peripheries */
|
||||
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
|
||||
/*!< Set SystemCoreClock variable. */
|
||||
SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
******************* Configuration BOARD_BootClockFROHF96M *********************
|
||||
******************************************************************************/
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!Configuration
|
||||
name: BOARD_BootClockFROHF96M
|
||||
outputs:
|
||||
- {id: System_clock.outFreq, value: 96 MHz}
|
||||
settings:
|
||||
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
|
||||
sources:
|
||||
- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables for BOARD_BootClockFROHF96M configuration
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Code for BOARD_BootClockFROHF96M configuration
|
||||
******************************************************************************/
|
||||
void BOARD_BootClockFROHF96M(void)
|
||||
{
|
||||
#ifndef SDK_SECONDARY_CORE
|
||||
/*!< Set up the clock sources */
|
||||
/*!< Set up FRO */
|
||||
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
|
||||
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
|
||||
being below the voltage for current speed */
|
||||
POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
||||
CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
|
||||
|
||||
CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
|
||||
|
||||
/*!< Set up dividers */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
|
||||
|
||||
/*!< Set up clock selectors - Attach clocks to the peripheries */
|
||||
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
|
||||
/*!< Set SystemCoreClock variable. */
|
||||
SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
******************** Configuration BOARD_BootClockPLL150M *********************
|
||||
******************************************************************************/
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!Configuration
|
||||
name: BOARD_BootClockPLL150M
|
||||
called_from_default_init: true
|
||||
outputs:
|
||||
- {id: PLL_clock.outFreq, value: 144 MHz}
|
||||
- {id: System_clock.outFreq, value: 144 MHz}
|
||||
settings:
|
||||
- {id: PLL_Mode, value: Normal}
|
||||
- {id: SYSCON.DIRECTO.sel, value: SYSCON.PLL}
|
||||
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.clk_in}
|
||||
- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
|
||||
- {id: SYSCON.M_MULT.scale, value: '48', locked: true}
|
||||
- {id: SYSCON.N_DIV.scale, value: '8', locked: true}
|
||||
- {id: SYSCON.PLL_BYPASS.sel, value: SYSCON.DIRECTO}
|
||||
- {id: SYSCON.SYSPLLCLKSEL.sel, value: SYSCON.clk_in}
|
||||
sources:
|
||||
- {id: SYSCON.clk_in.outFreq, value: 24 MHz, enabled: true}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Code for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
void BOARD_BootClockPLL150M(void)
|
||||
{
|
||||
#ifndef SDK_SECONDARY_CORE
|
||||
/*!< Set up the clock sources */
|
||||
/*!< Set up FRO */
|
||||
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
|
||||
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
|
||||
being below the voltage for current speed */
|
||||
POWER_SetVoltageForFreq(144000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
||||
CLOCK_SetFLASHAccessCyclesForFreq(144000000U); /*!< Set FLASH wait states for core */
|
||||
|
||||
/*!< Set up PLL */
|
||||
CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Switch PLL clock source selector to EXT_CLK */
|
||||
const pll_setup_t pllSetup = {
|
||||
.syspllctrl = SYSCON_SYSPLLCTRL_BANDSEL_MASK | SYSCON_SYSPLLCTRL_SELI(52U) | SYSCON_SYSPLLCTRL_SELP(25U) | SYSCON_SYSPLLCTRL_DIRECTO_MASK,
|
||||
.syspllndec = SYSCON_SYSPLLNDEC_NDEC(44U),
|
||||
.syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
|
||||
.syspllssctrl = {(SYSCON_SYSPLLSSCTRL0_MDEC(32682U) | SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK),0x0U},
|
||||
.pllRate = 144000000U,
|
||||
.flags = PLL_SETUPFLAG_POWERUP
|
||||
};
|
||||
CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */
|
||||
|
||||
/* PLL input more than 20 MHz */
|
||||
/* SYSTICK is used for waiting for PLL stabilization */
|
||||
|
||||
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SysTick divider counter and halt it */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 3U, false); /*!< Set SysTick divider to value 3 */
|
||||
SysTick->LOAD = 27999UL; /*!< Set SysTick count value */
|
||||
SysTick->VAL = 0UL; /*!< Reset current count value */
|
||||
SysTick->CTRL = SysTick_CTRL_ENABLE_Msk; /*!< Enable SYSTICK */
|
||||
while((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != SysTick_CTRL_COUNTFLAG_Msk){} /*!< Waiting for PLL stabilization */
|
||||
SysTick->CTRL = 0UL; /*!< Stop SYSTICK */
|
||||
|
||||
/*!< Set up dividers */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
|
||||
|
||||
/*!< Set up clock selectors - Attach clocks to the peripheries */
|
||||
CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */
|
||||
SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(1U)); /*!< Switch MAINCLKSELA to EXT_CLK even it is not used for MAINCLKSELB */
|
||||
/*!< Set SystemCoreClock variable. */
|
||||
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
|
||||
#endif
|
||||
}
|
||||
|
||||
228
board/clock_config.h
Normal file
228
board/clock_config.h
Normal file
@@ -0,0 +1,228 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _CLOCK_CONFIG_H_
|
||||
#define _CLOCK_CONFIG_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
#define BOARD_XTAL0_CLK_HZ 12000000U /*!< Board xtal0 frequency in Hz */
|
||||
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
|
||||
|
||||
/*******************************************************************************
|
||||
************************ BOARD_InitBootClocks function ************************
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes default configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootClocks(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*******************************************************************************
|
||||
******************** Configuration BOARD_BootClockFRO12M **********************
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Definitions for BOARD_BootClockFRO12M configuration
|
||||
******************************************************************************/
|
||||
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
|
||||
|
||||
|
||||
/* Clock outputs (values are in Hz): */
|
||||
#define BOARD_BOOTCLOCKFRO12M_ADC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_ASYNCAPB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_DMIC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_FXCOMS_CLK32K_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_MASTER_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_PLL_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_SYSTICK_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK 12000000UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_USB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK 0UL
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockFRO12M configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockFRO12M(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*******************************************************************************
|
||||
******************* Configuration BOARD_BootClockFROHF48M *********************
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Definitions for BOARD_BootClockFROHF48M configuration
|
||||
******************************************************************************/
|
||||
#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
|
||||
|
||||
|
||||
/* Clock outputs (values are in Hz): */
|
||||
#define BOARD_BOOTCLOCKFROHF48M_ADC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_ASYNCAPB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_CLKOUT_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_DMIC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM0_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM1_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM2_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM3_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM4_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM5_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM6_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOM7_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_FXCOMS_CLK32K_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_MASTER_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_PLL_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_SYSTICK_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_SYSTEM_CLOCK 48000000UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_TRACE_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_USB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF48M_WDT_CLOCK 0UL
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockFROHF48M configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockFROHF48M(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*******************************************************************************
|
||||
******************* Configuration BOARD_BootClockFROHF96M *********************
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Definitions for BOARD_BootClockFROHF96M configuration
|
||||
******************************************************************************/
|
||||
#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
|
||||
|
||||
|
||||
/* Clock outputs (values are in Hz): */
|
||||
#define BOARD_BOOTCLOCKFROHF96M_ADC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_ASYNCAPB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_DMIC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_FXCOMS_CLK32K_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_MASTER_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_PLL_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_SYSTICK_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK 96000000UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_USB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK 0UL
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockFROHF96M configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockFROHF96M(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*******************************************************************************
|
||||
******************** Configuration BOARD_BootClockPLL150M *********************
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Definitions for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */
|
||||
|
||||
|
||||
/* Clock outputs (values are in Hz): */
|
||||
#define BOARD_BOOTCLOCKPLL150M_ADC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_ASYNCAPB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_DMIC_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_FXCOMS_CLK32K_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_MASTER_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_PLL_CLOCK 144000000UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_SYSTICK_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK 144000000UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_USB_CLOCK 0UL
|
||||
#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK 0UL
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockPLL150M(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
#endif /* _CLOCK_CONFIG_H_ */
|
||||
|
||||
954
board/pin_mux.c
Normal file
954
board/pin_mux.c
Normal file
@@ -0,0 +1,954 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* clang-format off */
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Pins v13.1
|
||||
processor: LPC54114J256
|
||||
package_id: LPC54114J256BD64
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 13.0.1
|
||||
board: LPCXpresso54114
|
||||
pin_labels:
|
||||
- {pin_num: '3', pin_signal: PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1, label: 'J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX', identifier: SFTKY4}
|
||||
- {pin_num: '2', pin_signal: PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0, label: 'J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP', identifier: SFTKY3}
|
||||
- {pin_num: '1', pin_signal: PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1, label: 'J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL', identifier: RST_RF}
|
||||
- {pin_num: '4', pin_signal: PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3, label: 'J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX', identifier: RF_BUSY}
|
||||
- {pin_num: '7', pin_signal: PIO1_16/PDM0_DATA/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1, label: 'J1[19]/P1_16-CT32B0_MAT0-GYRO_INT1', identifier: CTL_PSU}
|
||||
- {pin_num: '10', pin_signal: PIO1_17/MCLK/UTICK_CAP3, label: 'J9[9]/P1_17-IR_LEARN_EN', identifier: E_STOP}
|
||||
- {pin_num: '11', pin_signal: PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0, label: 'J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED', identifier: I_OUT1}
|
||||
- {pin_num: '12', pin_signal: PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1, label: 'J9[2]/P0_30-ADC1', identifier: V_OUT1}
|
||||
- {pin_num: '14', pin_signal: PIO1_0/PDM0_DATA/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3, label: 'J2[3]/P1_0-PDM0_DATA-CT32B3_MAT1', identifier: PSU_MON}
|
||||
- {pin_num: '15', pin_signal: PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4, label: 'J1[15]/P1_1-FC5_SSEL2', identifier: VBAT_MON}
|
||||
- {pin_num: '16', pin_signal: PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5, label: 'J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3', identifier: ID1}
|
||||
- {pin_num: '17', pin_signal: PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6, label: 'J2[20]/P1_3-FC7_SSEL2-CT32B0_CAP1', identifier: ID2}
|
||||
- {pin_num: '18', pin_signal: PIO1_4/PDM1_CLK/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7, label: 'J2[18]/J9[10]/P1_4-ADC7-PDM1_CLK-FC7_RTS-FC3_TXD',
|
||||
identifier: V_CHK}
|
||||
- {pin_num: '19', pin_signal: PIO1_5/PDM1_DATA/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8, label: 'J2[16]/J9[12]/P1_5-ADC8-PDM1_DAT-FC7_CTS', identifier: TEMP}
|
||||
- {pin_num: '27', pin_signal: PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10, label: 'J1[10]/P1_7-FC7_RXD_SDA_MOSI_DATA', identifier: BAT_ID}
|
||||
- {pin_num: '28', pin_signal: PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11, label: 'J1[12]/J9[6]/P1_8-ADC11-FC7_TXD_SCL_MISO_FRAME', identifier: LCD_CD}
|
||||
- {pin_num: '29', pin_signal: PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED, label: 'J9[5]/D2[3]/P1_9-BLUE_LED', identifier: SIG_EN}
|
||||
- {pin_num: '30', pin_signal: PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME, label: 'J9[8]/D2[4]/P1_10-SCT4-LED_GREEN', identifier: SD_EN}
|
||||
- {pin_num: '31', pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3, label: 'U18[4]/TO_MUX_P0_0-ISP_RX', identifier: FC0_MOSI}
|
||||
- {pin_num: '32', pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1, label: 'U6[4]/U22[3]/P0_1-ISP_TX', identifier: FC0_MISO}
|
||||
- {pin_num: '36', pin_signal: PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3/CTIMER2_CAP1, label: 'J9[1]/P0_2-GPIO_SPI_CS', identifier: SFTKY1}
|
||||
- {pin_num: '37', pin_signal: PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3, label: 'J9[3]/P0_3-GPIO_SPI_CS', identifier: SFTKY2}
|
||||
- {pin_num: '39', pin_signal: PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0, label: 'J1[20]/P0_5-FC6_RXD_SDA_MOSI_DATA', identifier: RXD}
|
||||
- {pin_num: '40', pin_signal: PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0, label: 'J1[18]/P0_6-FC6_TXD_SCL_MISO_FRAME', identifier: TXD}
|
||||
- {pin_num: '41', pin_signal: PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2, label: 'J1[16]/P0_7-FC6_SCK', identifier: POT_CS}
|
||||
- {pin_num: '42', pin_signal: PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS, label: 'J2[19]/P1_11-FC6_RTS_SSEL1-MAG_DRDY', identifier: RAMP_EN}
|
||||
- {pin_num: '43', pin_signal: PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3, label: 'J2[15]/P0_8-FC2_RXD_SDA_MOSI', identifier: PWM_BAR}
|
||||
- {pin_num: '44', pin_signal: PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0, label: 'J2[13]/P0_9-FC2_TXD_SCL_MISO', identifier: PWM_CPU}
|
||||
- {pin_num: '45', pin_signal: PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0, label: 'J2[11]/P0_10-FC2_SCK-CT32B3_MAT0', identifier: CS_EEP}
|
||||
- {pin_num: '46', pin_signal: PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1, label: 'J4[4]/U9[13]/BRIDGE_T_SCK', identifier: SCLK}
|
||||
- {pin_num: '47', pin_signal: PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3, label: 'J4[2]/U9[11]/BRIDGE_T_MOSI', identifier: SDATA}
|
||||
- {pin_num: '48', pin_signal: PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0, label: 'J4[3]/U15[4]/BRIDGE_T_MISO', identifier: SDIN}
|
||||
- {pin_num: '49', pin_signal: PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/CTIMER2_MAT1/FC1_SCK, label: 'J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3', identifier: SFTKY0}
|
||||
- {pin_num: '50', pin_signal: PIO0_15/FC3_RTS_SCL_SSEL1/SWO/CTIMER2_MAT2/FC4_SCK, label: 'J2[10]/JS30/U4[12]/TDO-SWO_TRGT-SPIFI_IO2', identifier: LCD_CS}
|
||||
- {pin_num: '51', pin_signal: PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2, label: 'J2[9]/P1_12-CT32B1_MAT0-ACCl_INT1', identifier: SIG_RST}
|
||||
- {pin_num: '54', pin_signal: PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA, label: 'J2[7]/P1_13-CT32B1_MAT1', identifier: SD_RST}
|
||||
- {pin_num: '57', pin_signal: PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS, label: 'J2[1]/P1_14-SCTO7', identifier: RAMP_RST}
|
||||
- {pin_num: '58', pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, label: 'J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO', identifier: WRITE}
|
||||
- {pin_num: '59', pin_signal: PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1, label: 'J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn', identifier: PORT_LE}
|
||||
- {pin_num: '60', pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0, label: 'J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI', identifier: FC0_SCK}
|
||||
- {pin_num: '61', pin_signal: PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0, label: 'J2[2]/P0_21-CLKOUT-SPIFI_CLK', identifier: POT_CS2}
|
||||
- {pin_num: '62', pin_signal: PIO1_15/PDM0_CLK/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0, label: 'J1[17]/P1_15-SCTO5-FC7_CTS', identifier: ON_POLL}
|
||||
- {pin_num: '63', pin_signal: PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3, label: 'J4[8]/P0_22-BRIDGE_GPIO', identifier: SYS_CLK}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
/* clang-format on */
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "fsl_iocon.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitBootPins
|
||||
* Description : Calls initialization functions.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
void BOARD_InitBootPins(void)
|
||||
{
|
||||
BOARD_InitPins();
|
||||
}
|
||||
|
||||
/* clang-format off */
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
BOARD_InitPins:
|
||||
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
|
||||
- pin_list:
|
||||
- {pin_num: '31', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3, mode: inactive, invert: disabled,
|
||||
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
|
||||
- {pin_num: '32', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1, mode: inactive, invert: disabled,
|
||||
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
|
||||
- {pin_num: '46', peripheral: FLEXCOMM3, signal: SCK, pin_signal: PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1, mode: pullUp, invert: disabled, glitch_filter: disabled,
|
||||
slew_rate: standard, open_drain: disabled}
|
||||
- {pin_num: '47', peripheral: FLEXCOMM3, signal: RXD_SDA_MOSI, pin_signal: PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3, mode: pullUp, invert: disabled,
|
||||
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
|
||||
- {pin_num: '48', peripheral: FLEXCOMM3, signal: TXD_SCL_MISO, pin_signal: PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0, mode: pullUp, invert: disabled, glitch_filter: disabled,
|
||||
slew_rate: standard, open_drain: disabled}
|
||||
- {pin_num: '11', peripheral: ADC0, signal: 'CH, 0', pin_signal: PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0}
|
||||
- {pin_num: '12', peripheral: ADC0, signal: 'CH, 1', pin_signal: PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1}
|
||||
- {pin_num: '18', peripheral: ADC0, signal: 'CH, 7', pin_signal: PIO1_4/PDM1_CLK/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7}
|
||||
- {pin_num: '17', peripheral: ADC0, signal: 'CH, 6', pin_signal: PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6}
|
||||
- {pin_num: '16', peripheral: ADC0, signal: 'CH, 5', pin_signal: PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5}
|
||||
- {pin_num: '15', peripheral: ADC0, signal: 'CH, 4', pin_signal: PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4}
|
||||
- {pin_num: '14', peripheral: ADC0, signal: 'CH, 3', pin_signal: PIO1_0/PDM0_DATA/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3}
|
||||
- {pin_num: '51', peripheral: GPIO, signal: 'PIO1, 12', pin_signal: PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2, direction: OUTPUT}
|
||||
- {pin_num: '54', peripheral: GPIO, signal: 'PIO1, 13', pin_signal: PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA, direction: OUTPUT}
|
||||
- {pin_num: '57', peripheral: GPIO, signal: 'PIO1, 14', pin_signal: PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS, direction: OUTPUT}
|
||||
- {pin_num: '62', peripheral: GPIO, signal: 'PIO1, 15', pin_signal: PIO1_15/PDM0_CLK/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0, direction: INPUT}
|
||||
- {pin_num: '7', peripheral: GPIO, signal: 'PIO1, 16', pin_signal: PIO1_16/PDM0_DATA/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1, direction: OUTPUT, mode: pullDown}
|
||||
- {pin_num: '60', peripheral: FLEXCOMM0, signal: SCK, pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0}
|
||||
- {pin_num: '36', peripheral: GPIO, signal: 'PIO0, 2', pin_signal: PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3/CTIMER2_CAP1, direction: INPUT}
|
||||
- {pin_num: '37', peripheral: GPIO, signal: 'PIO0, 3', pin_signal: PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3, direction: INPUT}
|
||||
- {pin_num: '41', peripheral: GPIO, signal: 'PIO0, 7', pin_signal: PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2, direction: OUTPUT, gpio_init_state: 'true'}
|
||||
- {pin_num: '61', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0, direction: OUTPUT, gpio_init_state: 'true'}
|
||||
- {pin_num: '52', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_16/FC3_SSEL2/FC6_CTS_SDA_SSEL0/CTIMER3_MAT1/SWCLK}
|
||||
- {pin_num: '53', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_17/FC3_SSEL3/FC6_RTS_SCL_SSEL1/CTIMER3_MAT2/SWDIO}
|
||||
- {pin_num: '28', peripheral: GPIO, signal: 'PIO1, 8', pin_signal: PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11, direction: OUTPUT}
|
||||
- {pin_num: '59', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1, direction: OUTPUT}
|
||||
- {pin_num: '2', peripheral: GPIO, signal: 'PIO0, 24', pin_signal: PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0, direction: INPUT}
|
||||
- {pin_num: '3', peripheral: GPIO, signal: 'PIO0, 25', pin_signal: PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1, direction: INPUT}
|
||||
- {pin_num: '49', peripheral: GPIO, signal: 'PIO0, 14', pin_signal: PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/CTIMER2_MAT1/FC1_SCK, direction: INPUT, mode: inactive}
|
||||
- {pin_num: '19', peripheral: ADC0, signal: 'CH, 8', pin_signal: PIO1_5/PDM1_DATA/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8}
|
||||
- {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 26', pin_signal: PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3, direction: OUTPUT, i2c_filter: disabled}
|
||||
- {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 17', pin_signal: PIO1_17/MCLK/UTICK_CAP3, direction: OUTPUT}
|
||||
- {pin_num: '27', peripheral: ADC0, signal: 'CH, 10', pin_signal: PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10}
|
||||
- {pin_num: '29', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED, direction: OUTPUT}
|
||||
- {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 10', pin_signal: PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME, direction: OUTPUT}
|
||||
- {pin_num: '39', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0}
|
||||
- {pin_num: '40', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0, identifier: ''}
|
||||
- {pin_num: '42', peripheral: GPIO, signal: 'PIO1, 11', pin_signal: PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS, direction: OUTPUT}
|
||||
- {pin_num: '45', peripheral: GPIO, signal: 'PIO0, 10', pin_signal: PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0, direction: OUTPUT}
|
||||
- {pin_num: '58', peripheral: GPIO, signal: 'PIO0, 18', pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, direction: OUTPUT}
|
||||
- {pin_num: '63', peripheral: SYSCON, signal: CLKIN, pin_signal: PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3}
|
||||
- {pin_num: '50', peripheral: FLEXCOMM3, signal: RTS_SCL_SSEL1, pin_signal: PIO0_15/FC3_RTS_SCL_SSEL1/SWO/CTIMER2_MAT2/FC4_SCK, identifier: ''}
|
||||
- {pin_num: '43', peripheral: SCT0, signal: 'OUT, 1', pin_signal: PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3}
|
||||
- {pin_num: '44', peripheral: SCT0, signal: 'OUT, 2', pin_signal: PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0}
|
||||
- {pin_num: '1', peripheral: SCT0, signal: 'IN, 0', pin_signal: PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1, identifier: ''}
|
||||
- {pin_num: '5', peripheral: USB0, signal: USB_DP, pin_signal: USB0_DP}
|
||||
- {pin_num: '6', peripheral: USB0, signal: USB_DM, pin_signal: USB0_DM}
|
||||
- {pin_num: '26', peripheral: USB0, signal: USB_VBUS, pin_signal: PIO1_6/FC7_SCK/CTIMER1_CAP2/CTIMER1_MAT2/USB0_VBUS/ADC0_9, identifier: ''}
|
||||
- {pin_num: '38', peripheral: GPIO, signal: 'PIO0, 4', pin_signal: PIO0_4/FC0_SCK/FC3_SSEL2/CTIMER0_CAP2, direction: OUTPUT}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
/* clang-format on */
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitPins
|
||||
* Description : Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
/* Function assigned for the Cortex-M4F */
|
||||
void BOARD_InitPins(void)
|
||||
{
|
||||
/* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
|
||||
CLOCK_EnableClock(kCLOCK_Iocon);
|
||||
/* Enables the clock for the GPIO0 module */
|
||||
CLOCK_EnableClock(kCLOCK_Gpio0);
|
||||
/* Enables the clock for the GPIO1 module */
|
||||
CLOCK_EnableClock(kCLOCK_Gpio1);
|
||||
|
||||
gpio_pin_config_t SFTKY1_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_2 (pin 36) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SFTKY1_GPIO, BOARD_INITPINS_SFTKY1_PORT, BOARD_INITPINS_SFTKY1_PIN, &SFTKY1_config);
|
||||
|
||||
gpio_pin_config_t SFTKY2_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_3 (pin 37) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SFTKY2_GPIO, BOARD_INITPINS_SFTKY2_PORT, BOARD_INITPINS_SFTKY2_PIN, &SFTKY2_config);
|
||||
|
||||
gpio_pin_config_t gpio0_pin38_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_4 (pin 38) */
|
||||
GPIO_PinInit(GPIO, 0U, 4U, &gpio0_pin38_config);
|
||||
|
||||
gpio_pin_config_t POT_CS_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 1U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_7 (pin 41) */
|
||||
GPIO_PinInit(BOARD_INITPINS_POT_CS_GPIO, BOARD_INITPINS_POT_CS_PORT, BOARD_INITPINS_POT_CS_PIN, &POT_CS_config);
|
||||
|
||||
gpio_pin_config_t CS_EEP_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_10 (pin 45) */
|
||||
GPIO_PinInit(BOARD_INITPINS_CS_EEP_GPIO, BOARD_INITPINS_CS_EEP_PORT, BOARD_INITPINS_CS_EEP_PIN, &CS_EEP_config);
|
||||
|
||||
gpio_pin_config_t SFTKY0_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_14 (pin 49) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SFTKY0_GPIO, BOARD_INITPINS_SFTKY0_PORT, BOARD_INITPINS_SFTKY0_PIN, &SFTKY0_config);
|
||||
|
||||
gpio_pin_config_t WRITE_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_18 (pin 58) */
|
||||
GPIO_PinInit(BOARD_INITPINS_WRITE_GPIO, BOARD_INITPINS_WRITE_PORT, BOARD_INITPINS_WRITE_PIN, &WRITE_config);
|
||||
|
||||
gpio_pin_config_t PORT_LE_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_19 (pin 59) */
|
||||
GPIO_PinInit(BOARD_INITPINS_PORT_LE_GPIO, BOARD_INITPINS_PORT_LE_PORT, BOARD_INITPINS_PORT_LE_PIN, &PORT_LE_config);
|
||||
|
||||
gpio_pin_config_t POT_CS2_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 1U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_21 (pin 61) */
|
||||
GPIO_PinInit(BOARD_INITPINS_POT_CS2_GPIO, BOARD_INITPINS_POT_CS2_PORT, BOARD_INITPINS_POT_CS2_PIN, &POT_CS2_config);
|
||||
|
||||
gpio_pin_config_t SFTKY3_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_24 (pin 2) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SFTKY3_GPIO, BOARD_INITPINS_SFTKY3_PORT, BOARD_INITPINS_SFTKY3_PIN, &SFTKY3_config);
|
||||
|
||||
gpio_pin_config_t SFTKY4_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_25 (pin 3) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SFTKY4_GPIO, BOARD_INITPINS_SFTKY4_PORT, BOARD_INITPINS_SFTKY4_PIN, &SFTKY4_config);
|
||||
|
||||
gpio_pin_config_t RF_BUSY_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_26 (pin 4) */
|
||||
GPIO_PinInit(BOARD_INITPINS_RF_BUSY_GPIO, BOARD_INITPINS_RF_BUSY_PORT, BOARD_INITPINS_RF_BUSY_PIN, &RF_BUSY_config);
|
||||
|
||||
gpio_pin_config_t LCD_CD_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_8 (pin 28) */
|
||||
GPIO_PinInit(BOARD_INITPINS_LCD_CD_GPIO, BOARD_INITPINS_LCD_CD_PORT, BOARD_INITPINS_LCD_CD_PIN, &LCD_CD_config);
|
||||
|
||||
gpio_pin_config_t SIG_EN_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_9 (pin 29) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SIG_EN_GPIO, BOARD_INITPINS_SIG_EN_PORT, BOARD_INITPINS_SIG_EN_PIN, &SIG_EN_config);
|
||||
|
||||
gpio_pin_config_t SD_EN_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_10 (pin 30) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SD_EN_GPIO, BOARD_INITPINS_SD_EN_PORT, BOARD_INITPINS_SD_EN_PIN, &SD_EN_config);
|
||||
|
||||
gpio_pin_config_t RAMP_EN_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_11 (pin 42) */
|
||||
GPIO_PinInit(BOARD_INITPINS_RAMP_EN_GPIO, BOARD_INITPINS_RAMP_EN_PORT, BOARD_INITPINS_RAMP_EN_PIN, &RAMP_EN_config);
|
||||
|
||||
gpio_pin_config_t SIG_RST_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_12 (pin 51) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SIG_RST_GPIO, BOARD_INITPINS_SIG_RST_PORT, BOARD_INITPINS_SIG_RST_PIN, &SIG_RST_config);
|
||||
|
||||
gpio_pin_config_t SD_RST_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_13 (pin 54) */
|
||||
GPIO_PinInit(BOARD_INITPINS_SD_RST_GPIO, BOARD_INITPINS_SD_RST_PORT, BOARD_INITPINS_SD_RST_PIN, &SD_RST_config);
|
||||
|
||||
gpio_pin_config_t RAMP_RST_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_14 (pin 57) */
|
||||
GPIO_PinInit(BOARD_INITPINS_RAMP_RST_GPIO, BOARD_INITPINS_RAMP_RST_PORT, BOARD_INITPINS_RAMP_RST_PIN, &RAMP_RST_config);
|
||||
|
||||
gpio_pin_config_t ON_POLL_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_15 (pin 62) */
|
||||
GPIO_PinInit(BOARD_INITPINS_ON_POLL_GPIO, BOARD_INITPINS_ON_POLL_PORT, BOARD_INITPINS_ON_POLL_PIN, &ON_POLL_config);
|
||||
|
||||
gpio_pin_config_t CTL_PSU_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_16 (pin 7) */
|
||||
GPIO_PinInit(BOARD_INITPINS_CTL_PSU_GPIO, BOARD_INITPINS_CTL_PSU_PORT, BOARD_INITPINS_CTL_PSU_PIN, &CTL_PSU_config);
|
||||
|
||||
gpio_pin_config_t E_STOP_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO1_17 (pin 10) */
|
||||
GPIO_PinInit(BOARD_INITPINS_E_STOP_GPIO, BOARD_INITPINS_E_STOP_PORT, BOARD_INITPINS_E_STOP_PIN, &E_STOP_config);
|
||||
|
||||
const uint32_t FC0_MOSI = (/* Pin is configured as FC0_RXD_SDA_MOSI */
|
||||
IOCON_PIO_FUNC1 |
|
||||
/* No addition pin function */
|
||||
IOCON_PIO_MODE_INACT |
|
||||
/* Input function is not inverted */
|
||||
IOCON_PIO_INV_DI |
|
||||
/* Enables digital function */
|
||||
IOCON_PIO_DIGITAL_EN |
|
||||
/* Input filter disabled */
|
||||
IOCON_PIO_INPFILT_OFF |
|
||||
/* Standard mode, output slew rate control is enabled */
|
||||
IOCON_PIO_SLEW_STANDARD |
|
||||
/* Open drain is disabled */
|
||||
IOCON_PIO_OPENDRAIN_DI);
|
||||
/* PORT0 PIN0 (coords: 31) is configured as FC0_RXD_SDA_MOSI */
|
||||
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_FC0_MOSI_PORT, BOARD_INITPINS_FC0_MOSI_PIN, FC0_MOSI);
|
||||
|
||||
const uint32_t FC0_MISO = (/* Pin is configured as FC0_TXD_SCL_MISO */
|
||||
IOCON_PIO_FUNC1 |
|
||||
/* No addition pin function */
|
||||
IOCON_PIO_MODE_INACT |
|
||||
/* Input function is not inverted */
|
||||
IOCON_PIO_INV_DI |
|
||||
/* Enables digital function */
|
||||
IOCON_PIO_DIGITAL_EN |
|
||||
/* Input filter disabled */
|
||||
IOCON_PIO_INPFILT_OFF |
|
||||
/* Standard mode, output slew rate control is enabled */
|
||||
IOCON_PIO_SLEW_STANDARD |
|
||||
/* Open drain is disabled */
|
||||
IOCON_PIO_OPENDRAIN_DI);
|
||||
/* PORT0 PIN1 (coords: 32) is configured as FC0_TXD_SCL_MISO */
|
||||
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_FC0_MISO_PORT, BOARD_INITPINS_FC0_MISO_PIN, FC0_MISO);
|
||||
|
||||
IOCON->PIO[0][10] = ((IOCON->PIO[0][10] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT010 (pin 45) is configured as PIO0_10. */
|
||||
| IOCON_PIO_FUNC(PIO010_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO010_DIGIMODE_DIGITAL));
|
||||
|
||||
const uint32_t SCLK = (/* Pin is configured as FC3_SCK */
|
||||
IOCON_PIO_FUNC1 |
|
||||
/* Selects pull-up function */
|
||||
IOCON_PIO_MODE_PULLUP |
|
||||
/* Input function is not inverted */
|
||||
IOCON_PIO_INV_DI |
|
||||
/* Enables digital function */
|
||||
IOCON_PIO_DIGITAL_EN |
|
||||
/* Input filter disabled */
|
||||
IOCON_PIO_INPFILT_OFF |
|
||||
/* Standard mode, output slew rate control is enabled */
|
||||
IOCON_PIO_SLEW_STANDARD |
|
||||
/* Open drain is disabled */
|
||||
IOCON_PIO_OPENDRAIN_DI);
|
||||
/* PORT0 PIN11 (coords: 46) is configured as FC3_SCK */
|
||||
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_SCLK_PORT, BOARD_INITPINS_SCLK_PIN, SCLK);
|
||||
|
||||
const uint32_t SDATA = (/* Pin is configured as FC3_RXD_SDA_MOSI */
|
||||
IOCON_PIO_FUNC1 |
|
||||
/* Selects pull-up function */
|
||||
IOCON_PIO_MODE_PULLUP |
|
||||
/* Input function is not inverted */
|
||||
IOCON_PIO_INV_DI |
|
||||
/* Enables digital function */
|
||||
IOCON_PIO_DIGITAL_EN |
|
||||
/* Input filter disabled */
|
||||
IOCON_PIO_INPFILT_OFF |
|
||||
/* Standard mode, output slew rate control is enabled */
|
||||
IOCON_PIO_SLEW_STANDARD |
|
||||
/* Open drain is disabled */
|
||||
IOCON_PIO_OPENDRAIN_DI);
|
||||
/* PORT0 PIN12 (coords: 47) is configured as FC3_RXD_SDA_MOSI */
|
||||
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_SDATA_PORT, BOARD_INITPINS_SDATA_PIN, SDATA);
|
||||
|
||||
const uint32_t SDIN = (/* Pin is configured as FC3_TXD_SCL_MISO */
|
||||
IOCON_PIO_FUNC1 |
|
||||
/* Selects pull-up function */
|
||||
IOCON_PIO_MODE_PULLUP |
|
||||
/* Input function is not inverted */
|
||||
IOCON_PIO_INV_DI |
|
||||
/* Enables digital function */
|
||||
IOCON_PIO_DIGITAL_EN |
|
||||
/* Input filter disabled */
|
||||
IOCON_PIO_INPFILT_OFF |
|
||||
/* Standard mode, output slew rate control is enabled */
|
||||
IOCON_PIO_SLEW_STANDARD |
|
||||
/* Open drain is disabled */
|
||||
IOCON_PIO_OPENDRAIN_DI);
|
||||
/* PORT0 PIN13 (coords: 48) is configured as FC3_TXD_SCL_MISO */
|
||||
IOCON_PinMuxSet(IOCON, BOARD_INITPINS_SDIN_PORT, BOARD_INITPINS_SDIN_PIN, SDIN);
|
||||
|
||||
IOCON->PIO[0][14] = ((IOCON->PIO[0][14] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT014 (pin 49) is configured as PIO0_14. */
|
||||
| IOCON_PIO_FUNC(PIO014_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO014_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO014_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][15] = ((IOCON->PIO[0][15] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT015 (pin 50) is configured as FC3_RTS_SCL_SSEL1. */
|
||||
| IOCON_PIO_FUNC(PIO015_FUNC_ALT1)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO015_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][16] = ((IOCON->PIO[0][16] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT016 (pin 52) is configured as SWCLK. */
|
||||
| IOCON_PIO_FUNC(PIO016_FUNC_ALT5)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO016_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][17] = ((IOCON->PIO[0][17] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT017 (pin 53) is configured as SWDIO. */
|
||||
| IOCON_PIO_FUNC(PIO017_FUNC_ALT5)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO017_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT018 (pin 58) is configured as PIO0_18. */
|
||||
| IOCON_PIO_FUNC(PIO018_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO018_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][19] = ((IOCON->PIO[0][19] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT019 (pin 59) is configured as PIO0_19. */
|
||||
| IOCON_PIO_FUNC(PIO019_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO019_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][2] = ((IOCON->PIO[0][2] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT02 (pin 36) is configured as PIO0_2. */
|
||||
| IOCON_PIO_FUNC(PIO02_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO02_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][20] = ((IOCON->PIO[0][20] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT020 (pin 60) is configured as FC0_SCK. */
|
||||
| IOCON_PIO_FUNC(PIO020_FUNC_ALT2)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO020_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][21] = ((IOCON->PIO[0][21] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT021 (pin 61) is configured as PIO0_21. */
|
||||
| IOCON_PIO_FUNC(PIO021_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO021_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][22] = ((IOCON->PIO[0][22] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT022 (pin 63) is configured as CLKIN. */
|
||||
| IOCON_PIO_FUNC(PIO022_FUNC_ALT1)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO022_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][24] = ((IOCON->PIO[0][24] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT024 (pin 2) is configured as PIO0_24. */
|
||||
| IOCON_PIO_FUNC(PIO024_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO024_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][25] = ((IOCON->PIO[0][25] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT025 (pin 3) is configured as PIO0_25. */
|
||||
| IOCON_PIO_FUNC(PIO025_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO025_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][26] = ((IOCON->PIO[0][26] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_I2CFILTER_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT026 (pin 4) is configured as PIO0_26. */
|
||||
| IOCON_PIO_FUNC(PIO026_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO026_DIGIMODE_DIGITAL)
|
||||
|
||||
/* Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation.
|
||||
* : Disabled.
|
||||
* I2C 50 ns glitch filter disabled. */
|
||||
| IOCON_PIO_I2CFILTER(PIO026_I2CFILTER_DISABLED));
|
||||
|
||||
IOCON->PIO[0][29] = ((IOCON->PIO[0][29] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT029 (pin 11) is configured as ADC0_0. */
|
||||
| IOCON_PIO_FUNC(PIO029_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO029_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO029_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[0][3] = ((IOCON->PIO[0][3] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT03 (pin 37) is configured as PIO0_3. */
|
||||
| IOCON_PIO_FUNC(PIO03_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO03_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][30] = ((IOCON->PIO[0][30] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT030 (pin 12) is configured as ADC0_1. */
|
||||
| IOCON_PIO_FUNC(PIO030_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO030_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO030_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[0][4] = ((IOCON->PIO[0][4] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT04 (pin 38) is configured as PIO0_4. */
|
||||
| IOCON_PIO_FUNC(PIO04_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO04_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][5] = ((IOCON->PIO[0][5] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT05 (pin 39) is configured as FC6_RXD_SDA_MOSI_DATA. */
|
||||
| IOCON_PIO_FUNC(PIO05_FUNC_ALT1)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO05_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][6] = ((IOCON->PIO[0][6] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT06 (pin 40) is configured as FC6_TXD_SCL_MISO_WS. */
|
||||
| IOCON_PIO_FUNC(PIO06_FUNC_ALT1)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO06_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][7] = ((IOCON->PIO[0][7] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT07 (pin 41) is configured as PIO0_7. */
|
||||
| IOCON_PIO_FUNC(PIO07_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO07_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][8] = ((IOCON->PIO[0][8] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT08 (pin 43) is configured as SCT0_OUT1. */
|
||||
| IOCON_PIO_FUNC(PIO08_FUNC_ALT2)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO08_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][9] = ((IOCON->PIO[0][9] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT09 (pin 44) is configured as SCT0_OUT2. */
|
||||
| IOCON_PIO_FUNC(PIO09_FUNC_ALT2)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO09_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][0] = ((IOCON->PIO[1][0] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT10 (pin 14) is configured as ADC0_3. */
|
||||
| IOCON_PIO_FUNC(PIO10_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO10_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO10_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][1] = ((IOCON->PIO[1][1] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT11 (pin 15) is configured as ADC0_4. */
|
||||
| IOCON_PIO_FUNC(PIO11_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO11_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO11_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][10] = ((IOCON->PIO[1][10] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT110 (pin 30) is configured as PIO1_10. */
|
||||
| IOCON_PIO_FUNC(PIO110_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO110_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][11] = ((IOCON->PIO[1][11] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT111 (pin 42) is configured as PIO1_11. */
|
||||
| IOCON_PIO_FUNC(PIO111_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO111_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT112 (pin 51) is configured as PIO1_12. */
|
||||
| IOCON_PIO_FUNC(PIO112_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO112_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][13] = ((IOCON->PIO[1][13] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT113 (pin 54) is configured as PIO1_13. */
|
||||
| IOCON_PIO_FUNC(PIO113_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO113_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][14] = ((IOCON->PIO[1][14] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT114 (pin 57) is configured as PIO1_14. */
|
||||
| IOCON_PIO_FUNC(PIO114_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO114_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][15] = ((IOCON->PIO[1][15] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT115 (pin 62) is configured as PIO1_15. */
|
||||
| IOCON_PIO_FUNC(PIO115_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO115_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][16] = ((IOCON->PIO[1][16] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT116 (pin 7) is configured as PIO1_16. */
|
||||
| IOCON_PIO_FUNC(PIO116_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Pull-down.
|
||||
* Pull-down resistor enabled. */
|
||||
| IOCON_PIO_MODE(PIO116_MODE_PULL_DOWN)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO116_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][17] = ((IOCON->PIO[1][17] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT117 (pin 10) is configured as PIO1_17. */
|
||||
| IOCON_PIO_FUNC(PIO117_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO117_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][2] = ((IOCON->PIO[1][2] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT12 (pin 16) is configured as ADC0_5. */
|
||||
| IOCON_PIO_FUNC(PIO12_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO12_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO12_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][3] = ((IOCON->PIO[1][3] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT13 (pin 17) is configured as ADC0_6. */
|
||||
| IOCON_PIO_FUNC(PIO13_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO13_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO13_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][4] = ((IOCON->PIO[1][4] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT14 (pin 18) is configured as ADC0_7. */
|
||||
| IOCON_PIO_FUNC(PIO14_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO14_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO14_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][5] = ((IOCON->PIO[1][5] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT15 (pin 19) is configured as ADC0_8. */
|
||||
| IOCON_PIO_FUNC(PIO15_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO15_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO15_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][6] = ((IOCON->PIO[1][6] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT16 (pin 26) is configured as USB0_VBUS. */
|
||||
| IOCON_PIO_FUNC(PIO16_FUNC_ALT7)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO16_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][7] = ((IOCON->PIO[1][7] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT17 (pin 27) is configured as ADC0_10. */
|
||||
| IOCON_PIO_FUNC(PIO17_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO17_MODE_INACTIVE)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Analog mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO17_DIGIMODE_ANALOG));
|
||||
|
||||
IOCON->PIO[1][8] = ((IOCON->PIO[1][8] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT18 (pin 28) is configured as PIO1_8. */
|
||||
| IOCON_PIO_FUNC(PIO18_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO18_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT19 (pin 29) is configured as PIO1_9. */
|
||||
| IOCON_PIO_FUNC(PIO19_FUNC_ALT0)
|
||||
|
||||
/* Select Analog/Digital mode.
|
||||
* : Digital mode. */
|
||||
| IOCON_PIO_DIGIMODE(PIO19_DIGIMODE_DIGITAL));
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
786
board/pin_mux.h
Normal file
786
board/pin_mux.h
Normal file
@@ -0,0 +1,786 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PIN_MUX_H_
|
||||
#define _PIN_MUX_H_
|
||||
|
||||
/*!
|
||||
* @addtogroup pin_mux
|
||||
* @{
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* API
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Calls initialization functions.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootPins(void);
|
||||
|
||||
/*!
|
||||
* @brief Enables digital function */
|
||||
#define IOCON_PIO_DIGITAL_EN 0x80u
|
||||
/*!
|
||||
* @brief Selects pin function 1 */
|
||||
#define IOCON_PIO_FUNC1 0x01u
|
||||
/*!
|
||||
* @brief Input filter disabled */
|
||||
#define IOCON_PIO_INPFILT_OFF 0x0100u
|
||||
/*!
|
||||
* @brief Input function is not inverted */
|
||||
#define IOCON_PIO_INV_DI 0x00u
|
||||
/*!
|
||||
* @brief No addition pin function */
|
||||
#define IOCON_PIO_MODE_INACT 0x00u
|
||||
/*!
|
||||
* @brief Selects pull-up function */
|
||||
#define IOCON_PIO_MODE_PULLUP 0x10u
|
||||
/*!
|
||||
* @brief Open drain is disabled */
|
||||
#define IOCON_PIO_OPENDRAIN_DI 0x00u
|
||||
/*!
|
||||
* @brief Standard mode, output slew rate control is enabled */
|
||||
#define IOCON_PIO_SLEW_STANDARD 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO010_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO010_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO014_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO014_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO014_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO015_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO015_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO016_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 5. */
|
||||
#define PIO016_FUNC_ALT5 0x05u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO017_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 5. */
|
||||
#define PIO017_FUNC_ALT5 0x05u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO018_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO018_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO019_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO019_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO020_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 2. */
|
||||
#define PIO020_FUNC_ALT2 0x02u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO021_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO021_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO022_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO022_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO024_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO024_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO025_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO025_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO026_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO026_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation.
|
||||
* : Disabled.
|
||||
* I2C 50 ns glitch filter disabled.
|
||||
*/
|
||||
#define PIO026_I2CFILTER_DISABLED 0x01u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO029_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO029_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO029_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO02_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO02_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO030_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO030_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO030_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO03_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO03_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO04_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO04_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO05_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO05_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO06_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO06_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO07_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO07_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO08_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 2. */
|
||||
#define PIO08_FUNC_ALT2 0x02u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO09_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 2. */
|
||||
#define PIO09_FUNC_ALT2 0x02u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO10_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO10_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO10_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO110_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO110_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO111_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO111_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO112_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO112_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO113_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO113_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO114_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO114_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO115_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO115_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO116_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO116_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Pull-down.
|
||||
* Pull-down resistor enabled.
|
||||
*/
|
||||
#define PIO116_MODE_PULL_DOWN 0x01u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO117_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO117_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO11_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO11_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO11_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO12_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO12_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO12_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO13_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO13_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO13_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO14_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO14_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO14_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO15_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO15_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO15_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO16_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 7. */
|
||||
#define PIO16_FUNC_ALT7 0x07u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Analog mode. */
|
||||
#define PIO17_DIGIMODE_ANALOG 0x00u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO17_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO17_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO18_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO18_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Analog/Digital mode.: Digital mode. */
|
||||
#define PIO19_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO19_FUNC_ALT0 0x00u
|
||||
|
||||
/*! @name PIO0_0 (number 31), U18[4]/TO_MUX_P0_0-ISP_RX
|
||||
@{ */
|
||||
#define BOARD_INITPINS_FC0_MOSI_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_FC0_MOSI_PIN 0U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_FC0_MOSI_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_1 (number 32), U6[4]/U22[3]/P0_1-ISP_TX
|
||||
@{ */
|
||||
#define BOARD_INITPINS_FC0_MISO_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_FC0_MISO_PIN 1U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_FC0_MISO_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_11 (number 46), J4[4]/U9[13]/BRIDGE_T_SCK
|
||||
@{ */
|
||||
#define BOARD_INITPINS_SCLK_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SCLK_PIN 11U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SCLK_PIN_MASK (1U << 11U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_12 (number 47), J4[2]/U9[11]/BRIDGE_T_MOSI
|
||||
@{ */
|
||||
#define BOARD_INITPINS_SDATA_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SDATA_PIN 12U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SDATA_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_13 (number 48), J4[3]/U15[4]/BRIDGE_T_MISO
|
||||
@{ */
|
||||
#define BOARD_INITPINS_SDIN_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SDIN_PIN 13U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SDIN_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_29 (number 11), J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED
|
||||
@{ */
|
||||
#define BOARD_INITPINS_I_OUT1_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_I_OUT1_PIN 29U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_I_OUT1_PIN_MASK (1U << 29U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_30 (number 12), J9[2]/P0_30-ADC1
|
||||
@{ */
|
||||
#define BOARD_INITPINS_V_OUT1_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_V_OUT1_PIN 30U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_V_OUT1_PIN_MASK (1U << 30U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_4 (number 18), J2[18]/J9[10]/P1_4-ADC7-PDM1_CLK-FC7_RTS-FC3_TXD
|
||||
@{ */
|
||||
#define BOARD_INITPINS_V_CHK_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_V_CHK_PIN 4U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_V_CHK_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_3 (number 17), J2[20]/P1_3-FC7_SSEL2-CT32B0_CAP1
|
||||
@{ */
|
||||
#define BOARD_INITPINS_ID2_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ID2_PIN 3U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_ID2_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_2 (number 16), J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3
|
||||
@{ */
|
||||
#define BOARD_INITPINS_ID1_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ID1_PIN 2U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_ID1_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_1 (number 15), J1[15]/P1_1-FC5_SSEL2
|
||||
@{ */
|
||||
#define BOARD_INITPINS_VBAT_MON_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_VBAT_MON_PIN 1U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_VBAT_MON_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_0 (number 14), J2[3]/P1_0-PDM0_DATA-CT32B3_MAT1
|
||||
@{ */
|
||||
#define BOARD_INITPINS_PSU_MON_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_PSU_MON_PIN 0U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_PSU_MON_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_12 (number 51), J2[9]/P1_12-CT32B1_MAT0-ACCl_INT1
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SIG_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SIG_RST_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SIG_RST_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SIG_RST_PIN 12U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SIG_RST_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_13 (number 54), J2[7]/P1_13-CT32B1_MAT1
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SD_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SD_RST_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SD_RST_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SD_RST_PIN 13U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SD_RST_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_14 (number 57), J2[1]/P1_14-SCTO7
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_RAMP_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_RAMP_RST_GPIO_PIN_MASK (1U << 14U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_RAMP_RST_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_RAMP_RST_PIN 14U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_RAMP_RST_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_15 (number 62), J1[17]/P1_15-SCTO5-FC7_CTS
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ON_POLL_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ON_POLL_GPIO_PIN_MASK (1U << 15U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_ON_POLL_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ON_POLL_PIN 15U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_ON_POLL_PIN_MASK (1U << 15U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_16 (number 7), J1[19]/P1_16-CT32B0_MAT0-GYRO_INT1
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_CTL_PSU_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_CTL_PSU_GPIO_PIN_MASK (1U << 16U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_CTL_PSU_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_CTL_PSU_PIN 16U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_CTL_PSU_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_20 (number 60), J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI
|
||||
@{ */
|
||||
#define BOARD_INITPINS_FC0_SCK_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_FC0_SCK_PIN 20U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_FC0_SCK_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_2 (number 36), J9[1]/P0_2-GPIO_SPI_CS
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SFTKY1_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY1_GPIO_PIN_MASK (1U << 2U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SFTKY1_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY1_PIN 2U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SFTKY1_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_3 (number 37), J9[3]/P0_3-GPIO_SPI_CS
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SFTKY2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY2_GPIO_PIN_MASK (1U << 3U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SFTKY2_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY2_PIN 3U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SFTKY2_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_7 (number 41), J1[16]/P0_7-FC6_SCK
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_POT_CS_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_POT_CS_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_POT_CS_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_POT_CS_PIN 7U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_POT_CS_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_21 (number 61), J2[2]/P0_21-CLKOUT-SPIFI_CLK
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_POT_CS2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_POT_CS2_GPIO_PIN_MASK (1U << 21U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_POT_CS2_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_POT_CS2_PIN 21U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_POT_CS2_PIN_MASK (1U << 21U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_16 (number 52), J2[4]/JS28/U4[4]/TCK-SWDCLK_TRGT-SPIFI_IO1
|
||||
@{ */
|
||||
#define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PIN 16U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_17 (number 53), J2[6]/P1[2]/U2[5]/U14[4]/IF_TMS_SWDIO-SPIFI_IO0
|
||||
@{ */
|
||||
#define BOARD_INITPINS_DEBUG_SWD_SWDIO_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_DEBUG_SWD_SWDIO_PIN 17U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 17U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_8 (number 28), J1[12]/J9[6]/P1_8-ADC11-FC7_TXD_SCL_MISO_FRAME
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_LCD_CD_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_LCD_CD_GPIO_PIN_MASK (1U << 8U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_LCD_CD_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_LCD_CD_PIN 8U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_LCD_CD_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_19 (number 59), J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_PORT_LE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_PORT_LE_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_PORT_LE_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_PORT_LE_PIN 19U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_PORT_LE_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_24 (number 2), J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SFTKY3_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY3_GPIO_PIN_MASK (1U << 24U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SFTKY3_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY3_PIN 24U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SFTKY3_PIN_MASK (1U << 24U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_25 (number 3), J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SFTKY4_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY4_GPIO_PIN_MASK (1U << 25U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SFTKY4_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY4_PIN 25U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SFTKY4_PIN_MASK (1U << 25U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_14 (number 49), J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SFTKY0_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY0_GPIO_PIN_MASK (1U << 14U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SFTKY0_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SFTKY0_PIN 14U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SFTKY0_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_5 (number 19), J2[16]/J9[12]/P1_5-ADC8-PDM1_DAT-FC7_CTS
|
||||
@{ */
|
||||
#define BOARD_INITPINS_TEMP_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_TEMP_PIN 5U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_TEMP_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_26 (number 4), J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_RF_BUSY_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_RF_BUSY_GPIO_PIN_MASK (1U << 26U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_RF_BUSY_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_RF_BUSY_PIN 26U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_RF_BUSY_PIN_MASK (1U << 26U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_17 (number 10), J9[9]/P1_17-IR_LEARN_EN
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_E_STOP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_E_STOP_GPIO_PIN_MASK (1U << 17U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_E_STOP_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_E_STOP_PIN 17U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_E_STOP_PIN_MASK (1U << 17U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_7 (number 27), J1[10]/P1_7-FC7_RXD_SDA_MOSI_DATA
|
||||
@{ */
|
||||
#define BOARD_INITPINS_BAT_ID_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_BAT_ID_PIN 7U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_BAT_ID_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_9 (number 29), J9[5]/D2[3]/P1_9-BLUE_LED
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SIG_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SIG_EN_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SIG_EN_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SIG_EN_PIN 9U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SIG_EN_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_10 (number 30), J9[8]/D2[4]/P1_10-SCT4-LED_GREEN
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_SD_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_SD_EN_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_SD_EN_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SD_EN_PIN 10U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SD_EN_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_5 (number 39), J1[20]/P0_5-FC6_RXD_SDA_MOSI_DATA
|
||||
@{ */
|
||||
#define BOARD_INITPINS_RXD_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_RXD_PIN 5U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_RXD_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO1_11 (number 42), J2[19]/P1_11-FC6_RTS_SSEL1-MAG_DRDY
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_RAMP_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_RAMP_EN_GPIO_PIN_MASK (1U << 11U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_RAMP_EN_PORT 1U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_RAMP_EN_PIN 11U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_RAMP_EN_PIN_MASK (1U << 11U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_10 (number 45), J2[11]/P0_10-FC2_SCK-CT32B3_MAT0
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_CS_EEP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_CS_EEP_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_CS_EEP_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_CS_EEP_PIN 10U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_CS_EEP_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_18 (number 58), J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_WRITE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_WRITE_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
|
||||
#define BOARD_INITPINS_WRITE_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_WRITE_PIN 18U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_WRITE_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_22 (number 63), J4[8]/P0_22-BRIDGE_GPIO
|
||||
@{ */
|
||||
#define BOARD_INITPINS_SYS_CLK_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_SYS_CLK_PIN 22U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_SYS_CLK_PIN_MASK (1U << 22U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_8 (number 43), J2[15]/P0_8-FC2_RXD_SDA_MOSI
|
||||
@{ */
|
||||
#define BOARD_INITPINS_PWM_BAR_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_PWM_BAR_PIN 8U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_PWM_BAR_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_9 (number 44), J2[13]/P0_9-FC2_TXD_SCL_MISO
|
||||
@{ */
|
||||
#define BOARD_INITPINS_PWM_CPU_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_PWM_CPU_PIN 9U /*!<@brief PORT pin number */
|
||||
#define BOARD_INITPINS_PWM_CPU_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name USB0_DP (number 5), J5[3]/U7[2]/USB_DP
|
||||
@{ */
|
||||
/* @} */
|
||||
|
||||
/*! @name USB0_DM (number 6), J5[2]/U7[3]/USB_DM
|
||||
@{ */
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitPins(void); /* Function assigned for the Cortex-M4F */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @}
|
||||
*/
|
||||
#endif /* _PIN_MUX_H_ */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
493
component/lists/fsl_component_generic_list.c
Normal file
493
component/lists/fsl_component_generic_list.c
Normal file
@@ -0,0 +1,493 @@
|
||||
/*
|
||||
* Copyright 2018-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*! *********************************************************************************
|
||||
*************************************************************************************
|
||||
* Include
|
||||
*************************************************************************************
|
||||
********************************************************************************** */
|
||||
#include "fsl_component_generic_list.h"
|
||||
|
||||
#if defined(OSA_USED)
|
||||
#include "fsl_os_abstraction.h"
|
||||
#if (defined(USE_RTOS) && (USE_RTOS > 0U))
|
||||
#define LIST_ENTER_CRITICAL() \
|
||||
OSA_SR_ALLOC(); \
|
||||
OSA_ENTER_CRITICAL()
|
||||
#define LIST_EXIT_CRITICAL() OSA_EXIT_CRITICAL()
|
||||
#else
|
||||
#define LIST_ENTER_CRITICAL()
|
||||
#define LIST_EXIT_CRITICAL()
|
||||
#endif
|
||||
#else
|
||||
#define LIST_ENTER_CRITICAL() uint32_t regPrimask = DisableGlobalIRQ();
|
||||
#define LIST_EXIT_CRITICAL() EnableGlobalIRQ(regPrimask);
|
||||
#endif
|
||||
|
||||
static list_status_t LIST_Error_Check(list_handle_t list, list_element_handle_t newElement)
|
||||
{
|
||||
list_status_t listStatus = kLIST_Ok;
|
||||
#if (defined(GENERIC_LIST_DUPLICATED_CHECKING) && (GENERIC_LIST_DUPLICATED_CHECKING > 0U))
|
||||
list_element_handle_t element = list->head;
|
||||
#endif
|
||||
if ((list->max != 0U) && (list->max == list->size))
|
||||
{
|
||||
listStatus = kLIST_Full; /*List is full*/
|
||||
}
|
||||
#if (defined(GENERIC_LIST_DUPLICATED_CHECKING) && (GENERIC_LIST_DUPLICATED_CHECKING > 0U))
|
||||
else
|
||||
{
|
||||
while (element != NULL) /*Scan list*/
|
||||
{
|
||||
/* Determine if element is duplicated */
|
||||
if (element == newElement)
|
||||
{
|
||||
listStatus = kLIST_DuplicateError;
|
||||
break;
|
||||
}
|
||||
element = element->next;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return listStatus;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
*************************************************************************************
|
||||
* Public functions
|
||||
*************************************************************************************
|
||||
********************************************************************************** */
|
||||
/*! *********************************************************************************
|
||||
* \brief Initialises the list descriptor.
|
||||
*
|
||||
* \param[in] list - LIST_ handle to init.
|
||||
* max - Maximum number of elements in list. 0 for unlimited.
|
||||
*
|
||||
* \return void.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
void LIST_Init(list_handle_t list, uint32_t max)
|
||||
{
|
||||
list->head = NULL;
|
||||
list->tail = NULL;
|
||||
list->max = (uint16_t)max;
|
||||
list->size = 0;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Gets the list that contains the given element.
|
||||
*
|
||||
* \param[in] element - Handle of the element.
|
||||
*
|
||||
* \return NULL if element is orphan.
|
||||
* Handle of the list the element is inserted into.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_handle_t LIST_GetList(list_element_handle_t element)
|
||||
{
|
||||
return element->list;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Links element to the tail of the list.
|
||||
*
|
||||
* \param[in] list - ID of list to insert into.
|
||||
* element - element to add
|
||||
*
|
||||
* \return kLIST_Full if list is full.
|
||||
* kLIST_Ok if insertion was successful.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_status_t LIST_AddTail(list_handle_t list, list_element_handle_t element)
|
||||
{
|
||||
LIST_ENTER_CRITICAL();
|
||||
list_status_t listStatus = kLIST_Ok;
|
||||
|
||||
listStatus = LIST_Error_Check(list, element);
|
||||
if (listStatus == kLIST_Ok) /* Avoiding list status error */
|
||||
{
|
||||
if (list->size == 0U)
|
||||
{
|
||||
list->head = element;
|
||||
}
|
||||
else
|
||||
{
|
||||
list->tail->next = element;
|
||||
}
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
#else
|
||||
element->prev = list->tail;
|
||||
#endif
|
||||
element->list = list;
|
||||
element->next = NULL;
|
||||
list->tail = element;
|
||||
list->size++;
|
||||
}
|
||||
|
||||
LIST_EXIT_CRITICAL();
|
||||
return listStatus;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Links element to the head of the list.
|
||||
*
|
||||
* \param[in] list - ID of list to insert into.
|
||||
* element - element to add
|
||||
*
|
||||
* \return kLIST_Full if list is full.
|
||||
* kLIST_Ok if insertion was successful.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_status_t LIST_AddHead(list_handle_t list, list_element_handle_t element)
|
||||
{
|
||||
LIST_ENTER_CRITICAL();
|
||||
list_status_t listStatus = kLIST_Ok;
|
||||
|
||||
listStatus = LIST_Error_Check(list, element);
|
||||
if (listStatus == kLIST_Ok) /* Avoiding list status error */
|
||||
{
|
||||
/* Links element to the head of the list */
|
||||
if (list->size == 0U)
|
||||
{
|
||||
list->tail = element;
|
||||
}
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
#else
|
||||
else
|
||||
{
|
||||
list->head->prev = element;
|
||||
}
|
||||
element->prev = NULL;
|
||||
#endif
|
||||
element->list = list;
|
||||
element->next = list->head;
|
||||
list->head = element;
|
||||
list->size++;
|
||||
}
|
||||
|
||||
LIST_EXIT_CRITICAL();
|
||||
return listStatus;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Unlinks element from the head of the list.
|
||||
*
|
||||
* \param[in] list - ID of list to remove from.
|
||||
*
|
||||
* \return NULL if list is empty.
|
||||
* ID of removed element(pointer) if removal was successful.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_element_handle_t LIST_RemoveHead(list_handle_t list)
|
||||
{
|
||||
list_element_handle_t element;
|
||||
|
||||
LIST_ENTER_CRITICAL();
|
||||
|
||||
if ((NULL == list) || (list->size == 0U))
|
||||
{
|
||||
element = NULL; /*LIST_ is empty*/
|
||||
}
|
||||
else
|
||||
{
|
||||
element = list->head;
|
||||
list->size--;
|
||||
if (list->size == 0U)
|
||||
{
|
||||
list->tail = NULL;
|
||||
}
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
#else
|
||||
else
|
||||
{
|
||||
element->next->prev = NULL;
|
||||
}
|
||||
#endif
|
||||
element->list = NULL;
|
||||
list->head = element->next; /*Is NULL if element is head*/
|
||||
}
|
||||
|
||||
LIST_EXIT_CRITICAL();
|
||||
return element;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Gets head element ID.
|
||||
*
|
||||
* \param[in] list - ID of list.
|
||||
*
|
||||
* \return NULL if list is empty.
|
||||
* ID of head element if list is not empty.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_element_handle_t LIST_GetHead(list_handle_t list)
|
||||
{
|
||||
return list->head;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Gets next element ID.
|
||||
*
|
||||
* \param[in] element - ID of the element.
|
||||
*
|
||||
* \return NULL if element is tail.
|
||||
* ID of next element if exists.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_element_handle_t LIST_GetNext(list_element_handle_t element)
|
||||
{
|
||||
return element->next;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Gets previous element ID.
|
||||
*
|
||||
* \param[in] element - ID of the element.
|
||||
*
|
||||
* \return NULL if element is head.
|
||||
* ID of previous element if exists.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_element_handle_t LIST_GetPrev(list_element_handle_t element)
|
||||
{
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
return NULL;
|
||||
#else
|
||||
return element->prev;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Unlinks an element from its list.
|
||||
*
|
||||
* \param[in] element - ID of the element to remove.
|
||||
*
|
||||
* \return kLIST_OrphanElement if element is not part of any list.
|
||||
* kLIST_Ok if removal was successful.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_status_t LIST_RemoveElement(list_element_handle_t element)
|
||||
{
|
||||
list_status_t listStatus = kLIST_Ok;
|
||||
LIST_ENTER_CRITICAL();
|
||||
|
||||
if (element->list == NULL)
|
||||
{
|
||||
listStatus = kLIST_OrphanElement; /*Element was previusly removed or never added*/
|
||||
}
|
||||
else
|
||||
{
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
list_element_handle_t element_list = element->list->head;
|
||||
while (NULL != element_list)
|
||||
{
|
||||
if (element->list->head == element)
|
||||
{
|
||||
element->list->head = element_list->next;
|
||||
break;
|
||||
}
|
||||
if (element_list->next == element)
|
||||
{
|
||||
element_list->next = element->next;
|
||||
break;
|
||||
}
|
||||
element_list = element_list->next;
|
||||
}
|
||||
#else
|
||||
if (element->prev == NULL) /*Element is head or solo*/
|
||||
{
|
||||
element->list->head = element->next; /*is null if solo*/
|
||||
}
|
||||
if (element->next == NULL) /*Element is tail or solo*/
|
||||
{
|
||||
element->list->tail = element->prev; /*is null if solo*/
|
||||
}
|
||||
if (element->prev != NULL) /*Element is not head*/
|
||||
{
|
||||
element->prev->next = element->next;
|
||||
}
|
||||
if (element->next != NULL) /*Element is not tail*/
|
||||
{
|
||||
element->next->prev = element->prev;
|
||||
}
|
||||
#endif
|
||||
element->list->size--;
|
||||
element->list = NULL;
|
||||
}
|
||||
|
||||
LIST_EXIT_CRITICAL();
|
||||
return listStatus;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Links an element in the previous position relative to a given member
|
||||
* of a list.
|
||||
*
|
||||
* \param[in] element - ID of a member of a list.
|
||||
* newElement - new element to insert before the given member.
|
||||
*
|
||||
* \return kLIST_OrphanElement if element is not part of any list.
|
||||
* kLIST_Full if list is full.
|
||||
* kLIST_Ok if insertion was successful.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
list_status_t LIST_AddPrevElement(list_element_handle_t element, list_element_handle_t newElement)
|
||||
{
|
||||
list_status_t listStatus = kLIST_Ok;
|
||||
LIST_ENTER_CRITICAL();
|
||||
|
||||
if (element->list == NULL)
|
||||
{
|
||||
listStatus = kLIST_OrphanElement; /*Element was previusly removed or never added*/
|
||||
}
|
||||
else
|
||||
{
|
||||
listStatus = LIST_Error_Check(element->list, newElement);
|
||||
if (listStatus == kLIST_Ok)
|
||||
{
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
list_element_handle_t element_list = element->list->head;
|
||||
while (NULL != element_list)
|
||||
{
|
||||
if ((element_list->next == element) || (element_list == element))
|
||||
{
|
||||
if (element_list == element)
|
||||
{
|
||||
element->list->head = newElement;
|
||||
}
|
||||
else
|
||||
{
|
||||
element_list->next = newElement;
|
||||
}
|
||||
newElement->list = element->list;
|
||||
newElement->next = element;
|
||||
element->list->size++;
|
||||
break;
|
||||
}
|
||||
element_list = element_list->next;
|
||||
}
|
||||
|
||||
#else
|
||||
if (element->prev == NULL) /*Element is list head*/
|
||||
{
|
||||
element->list->head = newElement;
|
||||
}
|
||||
else
|
||||
{
|
||||
element->prev->next = newElement;
|
||||
}
|
||||
newElement->list = element->list;
|
||||
element->list->size++;
|
||||
newElement->next = element;
|
||||
newElement->prev = element->prev;
|
||||
element->prev = newElement;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
LIST_EXIT_CRITICAL();
|
||||
return listStatus;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Gets the current size of a list.
|
||||
*
|
||||
* \param[in] list - ID of the list.
|
||||
*
|
||||
* \return Current size of the list.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
uint32_t LIST_GetSize(list_handle_t list)
|
||||
{
|
||||
return list->size;
|
||||
}
|
||||
|
||||
/*! *********************************************************************************
|
||||
* \brief Gets the number of free places in the list.
|
||||
*
|
||||
* \param[in] list - ID of the list.
|
||||
*
|
||||
* \return Available size of the list.
|
||||
*
|
||||
* \pre
|
||||
*
|
||||
* \post
|
||||
*
|
||||
* \remarks
|
||||
*
|
||||
********************************************************************************** */
|
||||
uint32_t LIST_GetAvailableSize(list_handle_t list)
|
||||
{
|
||||
return ((uint32_t)list->max - (uint32_t)list->size); /*Gets the number of free places in the list*/
|
||||
}
|
||||
201
component/lists/fsl_component_generic_list.h
Normal file
201
component/lists/fsl_component_generic_list.h
Normal file
@@ -0,0 +1,201 @@
|
||||
/*
|
||||
* Copyright 2018-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _GENERIC_LIST_H_
|
||||
#define _GENERIC_LIST_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
/*!
|
||||
* @addtogroup GenericList
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**********************************************************************************
|
||||
* Include
|
||||
***********************************************************************************/
|
||||
|
||||
/**********************************************************************************
|
||||
* Public macro definitions
|
||||
***********************************************************************************/
|
||||
/*! @brief Definition to determine whether use list light. */
|
||||
#ifndef GENERIC_LIST_LIGHT
|
||||
#define GENERIC_LIST_LIGHT (1)
|
||||
#endif
|
||||
|
||||
/*! @brief Definition to determine whether enable list duplicated checking. */
|
||||
#ifndef GENERIC_LIST_DUPLICATED_CHECKING
|
||||
#define GENERIC_LIST_DUPLICATED_CHECKING (0)
|
||||
#endif
|
||||
|
||||
/**********************************************************************************
|
||||
* Public type definitions
|
||||
***********************************************************************************/
|
||||
/*! @brief The list status */
|
||||
typedef enum _list_status
|
||||
{
|
||||
kLIST_Ok = kStatus_Success, /*!< Success */
|
||||
kLIST_DuplicateError = MAKE_STATUS(kStatusGroup_LIST, 1), /*!< Duplicate Error */
|
||||
kLIST_Full = MAKE_STATUS(kStatusGroup_LIST, 2), /*!< FULL */
|
||||
kLIST_Empty = MAKE_STATUS(kStatusGroup_LIST, 3), /*!< Empty */
|
||||
kLIST_OrphanElement = MAKE_STATUS(kStatusGroup_LIST, 4), /*!< Orphan Element */
|
||||
kLIST_NotSupport = MAKE_STATUS(kStatusGroup_LIST, 5), /*!< Not Support */
|
||||
} list_status_t;
|
||||
|
||||
/*! @brief The list structure*/
|
||||
typedef struct list_label
|
||||
{
|
||||
struct list_element_tag *head; /*!< list head */
|
||||
struct list_element_tag *tail; /*!< list tail */
|
||||
uint16_t size; /*!< list size */
|
||||
uint16_t max; /*!< list max number of elements */
|
||||
} list_label_t, *list_handle_t;
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
/*! @brief The list element*/
|
||||
typedef struct list_element_tag
|
||||
{
|
||||
struct list_element_tag *next; /*!< next list element */
|
||||
struct list_label *list; /*!< pointer to the list */
|
||||
} list_element_t, *list_element_handle_t;
|
||||
#else
|
||||
/*! @brief The list element*/
|
||||
typedef struct list_element_tag
|
||||
{
|
||||
struct list_element_tag *next; /*!< next list element */
|
||||
struct list_element_tag *prev; /*!< previous list element */
|
||||
struct list_label *list; /*!< pointer to the list */
|
||||
} list_element_t, *list_element_handle_t;
|
||||
#endif
|
||||
/**********************************************************************************
|
||||
* Public prototypes
|
||||
***********************************************************************************/
|
||||
/**********************************************************************************
|
||||
* API
|
||||
**********************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* _cplusplus */
|
||||
/*!
|
||||
* @brief Initialize the list.
|
||||
*
|
||||
* This function initialize the list.
|
||||
*
|
||||
* @param list - List handle to initialize.
|
||||
* @param max - Maximum number of elements in list. 0 for unlimited.
|
||||
*/
|
||||
void LIST_Init(list_handle_t list, uint32_t max);
|
||||
|
||||
/*!
|
||||
* @brief Gets the list that contains the given element.
|
||||
*
|
||||
*
|
||||
* @param element - Handle of the element.
|
||||
* @retval NULL if element is orphan, Handle of the list the element is inserted into.
|
||||
*/
|
||||
list_handle_t LIST_GetList(list_element_handle_t element);
|
||||
|
||||
/*!
|
||||
* @brief Links element to the head of the list.
|
||||
*
|
||||
* @param list - Handle of the list.
|
||||
* @param element - Handle of the element.
|
||||
* @retval kLIST_Full if list is full, kLIST_Ok if insertion was successful.
|
||||
*/
|
||||
list_status_t LIST_AddHead(list_handle_t list, list_element_handle_t element);
|
||||
|
||||
/*!
|
||||
* @brief Links element to the tail of the list.
|
||||
*
|
||||
* @param list - Handle of the list.
|
||||
* @param element - Handle of the element.
|
||||
* @retval kLIST_Full if list is full, kLIST_Ok if insertion was successful.
|
||||
*/
|
||||
list_status_t LIST_AddTail(list_handle_t list, list_element_handle_t element);
|
||||
|
||||
/*!
|
||||
* @brief Unlinks element from the head of the list.
|
||||
*
|
||||
* @param list - Handle of the list.
|
||||
*
|
||||
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
|
||||
*/
|
||||
list_element_handle_t LIST_RemoveHead(list_handle_t list);
|
||||
|
||||
/*!
|
||||
* @brief Gets head element handle.
|
||||
*
|
||||
* @param list - Handle of the list.
|
||||
*
|
||||
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
|
||||
*/
|
||||
list_element_handle_t LIST_GetHead(list_handle_t list);
|
||||
|
||||
/*!
|
||||
* @brief Gets next element handle for given element handle.
|
||||
*
|
||||
* @param element - Handle of the element.
|
||||
*
|
||||
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
|
||||
*/
|
||||
list_element_handle_t LIST_GetNext(list_element_handle_t element);
|
||||
|
||||
/*!
|
||||
* @brief Gets previous element handle for given element handle.
|
||||
*
|
||||
* @param element - Handle of the element.
|
||||
*
|
||||
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
|
||||
*/
|
||||
list_element_handle_t LIST_GetPrev(list_element_handle_t element);
|
||||
|
||||
/*!
|
||||
* @brief Unlinks an element from its list.
|
||||
*
|
||||
* @param element - Handle of the element.
|
||||
*
|
||||
* @retval kLIST_OrphanElement if element is not part of any list.
|
||||
* @retval kLIST_Ok if removal was successful.
|
||||
*/
|
||||
list_status_t LIST_RemoveElement(list_element_handle_t element);
|
||||
|
||||
/*!
|
||||
* @brief Links an element in the previous position relative to a given member of a list.
|
||||
*
|
||||
* @param element - Handle of the element.
|
||||
* @param newElement - New element to insert before the given member.
|
||||
*
|
||||
* @retval kLIST_OrphanElement if element is not part of any list.
|
||||
* @retval kLIST_Ok if removal was successful.
|
||||
*/
|
||||
list_status_t LIST_AddPrevElement(list_element_handle_t element, list_element_handle_t newElement);
|
||||
|
||||
/*!
|
||||
* @brief Gets the current size of a list.
|
||||
*
|
||||
* @param list - Handle of the list.
|
||||
*
|
||||
* @retval Current size of the list.
|
||||
*/
|
||||
uint32_t LIST_GetSize(list_handle_t list);
|
||||
|
||||
/*!
|
||||
* @brief Gets the number of free places in the list.
|
||||
*
|
||||
* @param list - Handle of the list.
|
||||
*
|
||||
* @retval Available size of the list.
|
||||
*/
|
||||
uint32_t LIST_GetAvailableSize(list_handle_t list);
|
||||
|
||||
/* @} */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
/*! @}*/
|
||||
#endif /*_GENERIC_LIST_H_*/
|
||||
863
component/osa/fsl_os_abstraction.h
Normal file
863
component/osa/fsl_os_abstraction.h
Normal file
@@ -0,0 +1,863 @@
|
||||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_OS_ABSTRACTION_H_
|
||||
#define _FSL_OS_ABSTRACTION_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_os_abstraction_config.h"
|
||||
#include "fsl_component_generic_list.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup osa_adapter
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Type for the Task Priority*/
|
||||
typedef uint16_t osa_task_priority_t;
|
||||
/*! @brief Type for a task handler */
|
||||
typedef void *osa_task_handle_t;
|
||||
/*! @brief Type for the parameter to be passed to the task at its creation */
|
||||
typedef void *osa_task_param_t;
|
||||
/*! @brief Type for task pointer. Task prototype declaration */
|
||||
typedef void (*osa_task_ptr_t)(osa_task_param_t task_param);
|
||||
/*! @brief Type for the semaphore handler */
|
||||
typedef void *osa_semaphore_handle_t;
|
||||
/*! @brief Type for the mutex handler */
|
||||
typedef void *osa_mutex_handle_t;
|
||||
/*! @brief Type for the event handler */
|
||||
typedef void *osa_event_handle_t;
|
||||
/*! @brief Type for an event flags group, bit 32 is reserved. */
|
||||
typedef uint32_t osa_event_flags_t;
|
||||
/*! @brief Message definition. */
|
||||
typedef void *osa_msg_handle_t;
|
||||
/*! @brief Type for the message queue handler */
|
||||
typedef void *osa_msgq_handle_t;
|
||||
/*! @brief Type for the Timer handler */
|
||||
typedef void *osa_timer_handle_t;
|
||||
/*! @brief Type for the Timer callback function pointer. */
|
||||
typedef void (*osa_timer_fct_ptr_t)(void const *argument);
|
||||
/*! @brief Thread Definition structure contains startup information of a thread.*/
|
||||
typedef struct osa_task_def_tag
|
||||
{
|
||||
osa_task_ptr_t pthread; /*!< start address of thread function*/
|
||||
uint32_t tpriority; /*!< initial thread priority*/
|
||||
uint32_t instances; /*!< maximum number of instances of that thread function*/
|
||||
uint32_t stacksize; /*!< stack size requirements in bytes; 0 is default stack size*/
|
||||
uint32_t *tstack; /*!< stack pointer*/
|
||||
void *tlink; /*!< link pointer*/
|
||||
uint8_t *tname; /*!< name pointer*/
|
||||
uint8_t useFloat; /*!< is use float*/
|
||||
} osa_task_def_t;
|
||||
/*! @brief Thread Link Definition structure .*/
|
||||
typedef struct osa_thread_link_tag
|
||||
{
|
||||
uint8_t link[12]; /*!< link*/
|
||||
osa_task_handle_t osThreadId; /*!< thread id*/
|
||||
osa_task_def_t *osThreadDefHandle; /*!< pointer of thread define handle*/
|
||||
uint32_t *osThreadStackHandle; /*!< pointer of thread stack handle*/
|
||||
} osa_thread_link_t, *osa_thread_link_handle_t;
|
||||
|
||||
/*! @brief Definition structure contains timer parameters.*/
|
||||
typedef struct osa_time_def_tag
|
||||
{
|
||||
osa_timer_fct_ptr_t pfCallback; /* < start address of a timer function */
|
||||
void *argument; /* < argument of a timer function */
|
||||
} osa_time_def_t;
|
||||
|
||||
/*! @brief Type for the timer definition*/
|
||||
typedef enum _osa_timer
|
||||
{
|
||||
KOSA_TimerOnce = 0, /*!< one-shot timer*/
|
||||
KOSA_TimerPeriodic = 1 /*!< repeating timer*/
|
||||
} osa_timer_t;
|
||||
|
||||
/*! @brief Defines the return status of OSA's functions */
|
||||
typedef enum _osa_status
|
||||
{
|
||||
KOSA_StatusSuccess = kStatus_Success, /*!< Success */
|
||||
KOSA_StatusError = MAKE_STATUS(kStatusGroup_OSA, 1), /*!< Failed */
|
||||
KOSA_StatusTimeout = MAKE_STATUS(kStatusGroup_OSA, 2), /*!< Timeout occurs while waiting */
|
||||
KOSA_StatusIdle = MAKE_STATUS(kStatusGroup_OSA, 3), /*!< Used for bare metal only, the wait object is not ready
|
||||
and timeout still not occur */
|
||||
} osa_status_t;
|
||||
|
||||
#ifdef USE_RTOS
|
||||
#undef USE_RTOS
|
||||
#endif
|
||||
|
||||
#if defined(FSL_RTOS_MQX)
|
||||
#define USE_RTOS (1)
|
||||
#elif defined(FSL_RTOS_FREE_RTOS)
|
||||
#define USE_RTOS (1)
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
#define OSA_TASK_HANDLE_SIZE (12U)
|
||||
#else
|
||||
#define OSA_TASK_HANDLE_SIZE (16U)
|
||||
#endif
|
||||
#define OSA_EVENT_HANDLE_SIZE (8U)
|
||||
#define OSA_SEM_HANDLE_SIZE (4U)
|
||||
#define OSA_MUTEX_HANDLE_SIZE (4U)
|
||||
#define OSA_MSGQ_HANDLE_SIZE (4U)
|
||||
#define OSA_MSG_HANDLE_SIZE (0U)
|
||||
#elif defined(FSL_RTOS_UCOSII)
|
||||
#define USE_RTOS (1)
|
||||
#elif defined(FSL_RTOS_UCOSIII)
|
||||
#define USE_RTOS (1)
|
||||
#else
|
||||
#define USE_RTOS (0)
|
||||
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
|
||||
#define OSA_TASK_HANDLE_SIZE (24U)
|
||||
#else
|
||||
#define OSA_TASK_HANDLE_SIZE (28U)
|
||||
#endif
|
||||
#if (defined(FSL_OSA_TASK_ENABLE) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
#define OSA_EVENT_HANDLE_SIZE (20U)
|
||||
#else
|
||||
#define OSA_EVENT_HANDLE_SIZE (16U)
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
#define OSA_SEM_HANDLE_SIZE (12U)
|
||||
#define OSA_MUTEX_HANDLE_SIZE (12U)
|
||||
#if (defined(FSL_OSA_TASK_ENABLE) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
#define OSA_MSGQ_HANDLE_SIZE (32U)
|
||||
#else
|
||||
#define OSA_MSGQ_HANDLE_SIZE (28U)
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
#define OSA_MSG_HANDLE_SIZE (4U)
|
||||
#endif
|
||||
|
||||
/*! @brief Priority setting for OSA. */
|
||||
#ifndef OSA_PRIORITY_IDLE
|
||||
#define OSA_PRIORITY_IDLE (6)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_PRIORITY_LOW
|
||||
#define OSA_PRIORITY_LOW (5)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_PRIORITY_BELOW_NORMAL
|
||||
#define OSA_PRIORITY_BELOW_NORMAL (4)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_PRIORITY_NORMAL
|
||||
#define OSA_PRIORITY_NORMAL (3)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_PRIORITY_ABOVE_NORMAL
|
||||
#define OSA_PRIORITY_ABOVE_NORMAL (2)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_PRIORITY_HIGH
|
||||
#define OSA_PRIORITY_HIGH (1)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_PRIORITY_REAL_TIME
|
||||
#define OSA_PRIORITY_REAL_TIME (0)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_TASK_PRIORITY_MAX
|
||||
#define OSA_TASK_PRIORITY_MAX (0)
|
||||
#endif
|
||||
|
||||
#ifndef OSA_TASK_PRIORITY_MIN
|
||||
#define OSA_TASK_PRIORITY_MIN (15)
|
||||
#endif
|
||||
|
||||
#define SIZE_IN_UINT32_UNITS(size) (((size) + sizeof(uint32_t) - 1) / sizeof(uint32_t))
|
||||
|
||||
/*! @brief Constant to pass as timeout value in order to wait indefinitely. */
|
||||
#define osaWaitForever_c ((uint32_t)(-1))
|
||||
#define osaEventFlagsAll_c ((osa_event_flags_t)(0x00FFFFFF))
|
||||
#define osThreadStackArray(name) osThread_##name##_stack
|
||||
#define osThreadStackDef(name, stacksize, instances) \
|
||||
const uint32_t osThreadStackArray(name)[SIZE_IN_UINT32_UNITS(stacksize) * (instances)];
|
||||
|
||||
/* ==== Thread Management ==== */
|
||||
|
||||
/* Create a Thread Definition with function, priority, and stack requirements.
|
||||
* \param name name of the thread function.
|
||||
* \param priority initial priority of the thread function.
|
||||
* \param instances number of possible thread instances.
|
||||
* \param stackSz stack size (in bytes) requirements for the thread function.
|
||||
* \param useFloat
|
||||
*/
|
||||
#if defined(FSL_RTOS_MQX)
|
||||
#define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \
|
||||
osa_thread_link_t osThreadLink_##name[instances] = {0}; \
|
||||
osThreadStackDef(name, stackSz, instances) osa_task_def_t os_thread_def_##name = { \
|
||||
(name), (priority), (instances), (stackSz), osThreadStackArray(name), osThreadLink_##name, \
|
||||
(uint8_t *)#name, (useFloat)}
|
||||
#elif defined(FSL_RTOS_UCOSII)
|
||||
#if gTaskMultipleInstancesManagement_c
|
||||
#define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \
|
||||
osa_thread_link_t osThreadLink_##name[instances] = {0}; \
|
||||
osThreadStackDef(name, stackSz, instances) osa_task_def_t os_thread_def_##name = { \
|
||||
(name), (priority), (instances), (stackSz), osThreadStackArray(name), osThreadLink_##name, \
|
||||
(uint8_t *)#name, (useFloat)}
|
||||
#else
|
||||
#define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \
|
||||
osThreadStackDef(name, stackSz, instances) osa_task_def_t os_thread_def_##name = { \
|
||||
(name), (priority), (instances), (stackSz), osThreadStackArray(name), NULL, (uint8_t *)#name, (useFloat)}
|
||||
#endif
|
||||
#else
|
||||
#define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \
|
||||
const osa_task_def_t os_thread_def_##name = {(name), (priority), (instances), (stackSz), \
|
||||
NULL, NULL, (uint8_t *)#name, (useFloat)}
|
||||
#endif
|
||||
/* Access a Thread defintion.
|
||||
* \param name name of the thread definition object.
|
||||
*/
|
||||
#define OSA_TASK(name) (const osa_task_def_t *)&os_thread_def_##name
|
||||
|
||||
#define OSA_TASK_PROTO(name) externosa_task_def_t os_thread_def_##name
|
||||
/* ==== Timer Management ====
|
||||
* Define a Timer object.
|
||||
* \param name name of the timer object.
|
||||
* \param function name of the timer call back function.
|
||||
*/
|
||||
|
||||
#define OSA_TIMER_DEF(name, function) osa_time_def_t os_timer_def_##name = {(function), NULL}
|
||||
|
||||
/* Access a Timer definition.
|
||||
* \param name name of the timer object.
|
||||
*/
|
||||
#define OSA_TIMER(name) &os_timer_def_##name
|
||||
|
||||
/* ==== Buffer Definition ==== */
|
||||
|
||||
/*!
|
||||
* @brief Defines the semaphore handle
|
||||
*
|
||||
* This macro is used to define a 4 byte aligned semaphore handle.
|
||||
* Then use "(osa_semaphore_handle_t)name" to get the semaphore handle.
|
||||
*
|
||||
* The macro should be global and could be optional. You could also define semaphore handle by yourself.
|
||||
*
|
||||
* This is an example,
|
||||
* @code
|
||||
* OSA_SEMAPHORE_HANDLE_DEFINE(semaphoreHandle);
|
||||
* @endcode
|
||||
*
|
||||
* @param name The name string of the semaphore handle.
|
||||
*/
|
||||
#define OSA_SEMAPHORE_HANDLE_DEFINE(name) \
|
||||
uint32_t name[(OSA_SEM_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t)]
|
||||
|
||||
/*!
|
||||
* @brief Defines the mutex handle
|
||||
*
|
||||
* This macro is used to define a 4 byte aligned mutex handle.
|
||||
* Then use "(osa_mutex_handle_t)name" to get the mutex handle.
|
||||
*
|
||||
* The macro should be global and could be optional. You could also define mutex handle by yourself.
|
||||
*
|
||||
* This is an example,
|
||||
* @code
|
||||
* OSA_MUTEX_HANDLE_DEFINE(mutexHandle);
|
||||
* @endcode
|
||||
*
|
||||
* @param name The name string of the mutex handle.
|
||||
*/
|
||||
#define OSA_MUTEX_HANDLE_DEFINE(name) uint32_t name[(OSA_MUTEX_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t)]
|
||||
|
||||
/*!
|
||||
* @brief Defines the event handle
|
||||
*
|
||||
* This macro is used to define a 4 byte aligned event handle.
|
||||
* Then use "(osa_event_handle_t)name" to get the event handle.
|
||||
*
|
||||
* The macro should be global and could be optional. You could also define event handle by yourself.
|
||||
*
|
||||
* This is an example,
|
||||
* @code
|
||||
* OSA_EVENT_HANDLE_DEFINE(eventHandle);
|
||||
* @endcode
|
||||
*
|
||||
* @param name The name string of the event handle.
|
||||
*/
|
||||
#define OSA_EVENT_HANDLE_DEFINE(name) uint32_t name[(OSA_EVENT_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t)]
|
||||
|
||||
/*!
|
||||
* @brief Defines the message queue handle
|
||||
*
|
||||
* This macro is used to define a 4 byte aligned message queue handle.
|
||||
* Then use "(osa_msgq_handle_t)name" to get the message queue handle.
|
||||
*
|
||||
* The macro should be global and could be optional. You could also define message queue handle by yourself.
|
||||
*
|
||||
* This is an example,
|
||||
* @code
|
||||
* OSA_MSGQ_HANDLE_DEFINE(msgqHandle, 3, sizeof(msgStruct));
|
||||
* @endcode
|
||||
*
|
||||
* @param name The name string of the message queue handle.
|
||||
* @param numberOfMsgs Number of messages.
|
||||
* @param msgSize Message size.
|
||||
*
|
||||
*/
|
||||
#if defined(FSL_RTOS_FREE_RTOS)
|
||||
/*< Macro For FREE_RTOS*/
|
||||
#define OSA_MSGQ_HANDLE_DEFINE(name, numberOfMsgs, msgSize) \
|
||||
uint32_t name[(OSA_MSGQ_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t)]
|
||||
#else
|
||||
/*< Macro For BARE_MATEL*/
|
||||
#define OSA_MSGQ_HANDLE_DEFINE(name, numberOfMsgs, msgSize) \
|
||||
uint32_t name[((OSA_MSGQ_HANDLE_SIZE + numberOfMsgs * msgSize) + sizeof(uint32_t) - 1U) / sizeof(uint32_t)]
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Defines the TASK handle
|
||||
*
|
||||
* This macro is used to define a 4 byte aligned TASK handle.
|
||||
* Then use "(osa_task_handle_t)name" to get the TASK handle.
|
||||
*
|
||||
* The macro should be global and could be optional. You could also define TASK handle by yourself.
|
||||
*
|
||||
* This is an example,
|
||||
* @code
|
||||
* OSA_TASK_HANDLE_DEFINE(taskHandle);
|
||||
* @endcode
|
||||
*
|
||||
* @param name The name string of the TASK handle.
|
||||
*/
|
||||
#define OSA_TASK_HANDLE_DEFINE(name) uint32_t name[(OSA_TASK_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t)]
|
||||
|
||||
#if defined(FSL_RTOS_FREE_RTOS)
|
||||
#include "fsl_os_abstraction_free_rtos.h"
|
||||
#else
|
||||
#include "fsl_os_abstraction_bm.h"
|
||||
#endif
|
||||
|
||||
extern const uint8_t gUseRtos_c;
|
||||
|
||||
/*
|
||||
* alloc the temporary memory to store the status
|
||||
*/
|
||||
#define OSA_SR_ALLOC() uint32_t osaCurrentSr;
|
||||
/*
|
||||
* Enter critical mode
|
||||
*/
|
||||
#define OSA_ENTER_CRITICAL() OSA_EnterCritical(&osaCurrentSr)
|
||||
/*
|
||||
* Exit critical mode and retore the previous mode
|
||||
*/
|
||||
#define OSA_EXIT_CRITICAL() OSA_ExitCritical(osaCurrentSr)
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
/*!
|
||||
* @brief Reserves the requested amount of memory in bytes.
|
||||
*
|
||||
* The function is used to reserve the requested amount of memory in bytes and initializes it to 0.
|
||||
*
|
||||
* @param length Amount of bytes to reserve.
|
||||
*
|
||||
* @return Pointer to the reserved memory. NULL if memory can't be allocated.
|
||||
*/
|
||||
void *OSA_MemoryAllocate(uint32_t length);
|
||||
|
||||
/*!
|
||||
* @brief Frees the memory previously reserved.
|
||||
*
|
||||
* The function is used to free the memory block previously reserved.
|
||||
*
|
||||
* @param p Pointer to the start of the memory block previously reserved.
|
||||
*
|
||||
*/
|
||||
void OSA_MemoryFree(void *p);
|
||||
|
||||
/*!
|
||||
* @brief Enter critical with nesting mode.
|
||||
*
|
||||
* @param sr Store current status and return to caller.
|
||||
*/
|
||||
void OSA_EnterCritical(uint32_t *sr);
|
||||
|
||||
/*!
|
||||
* @brief Exit critical with nesting mode.
|
||||
*
|
||||
* @param sr Previous status to restore.
|
||||
*/
|
||||
void OSA_ExitCritical(uint32_t sr);
|
||||
|
||||
/*!
|
||||
* @name Task management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Creates a task.
|
||||
*
|
||||
* This function is used to create task based on the resources defined
|
||||
* by the macro OSA_TASK_DEFINE.
|
||||
*
|
||||
* Example below shows how to use this API to create the task handle.
|
||||
* @code
|
||||
* OSA_TASK_HANDLE_DEFINE(taskHandle);
|
||||
* OSA_TASK_DEFINE( Job1, OSA_PRIORITY_HIGH, 1, 800, 0);
|
||||
* OSA_TaskCreate((osa_task_handle_t)taskHandle, OSA_TASK(Job1), (osa_task_param_t)NULL);
|
||||
* @endcode
|
||||
*
|
||||
* @param taskHandle Pointer to a memory space of size OSA_TASK_HANDLE_SIZE allocated by the caller, task handle.
|
||||
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
|
||||
* You can define the handle in the following two ways:
|
||||
* #OSA_TASK_HANDLE_DEFINE(taskHandle);
|
||||
* or
|
||||
* uint32_t taskHandle[((OSA_TASK_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* @param thread_def pointer to theosa_task_def_t structure which defines the task.
|
||||
* @param task_param Pointer to be passed to the task when it is created.
|
||||
* @retval KOSA_StatusSuccess The task is successfully created.
|
||||
* @retval KOSA_StatusError The task can not be created.
|
||||
*/
|
||||
#if ((defined(FSL_OSA_TASK_ENABLE)) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
osa_status_t OSA_TaskCreate(osa_task_handle_t taskHandle,
|
||||
const osa_task_def_t *thread_def,
|
||||
osa_task_param_t task_param);
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
|
||||
/*!
|
||||
* @brief Gets the handler of active task.
|
||||
*
|
||||
* @return Handler to current active task.
|
||||
*/
|
||||
#if ((defined(FSL_OSA_TASK_ENABLE)) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
osa_task_handle_t OSA_TaskGetCurrentHandle(void);
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
|
||||
/*!
|
||||
* @brief Puts the active task to the end of scheduler's queue.
|
||||
*
|
||||
* When a task calls this function, it gives up the CPU and puts itself to the
|
||||
* end of a task ready list.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The function is called successfully.
|
||||
* @retval KOSA_StatusError Error occurs with this function.
|
||||
*/
|
||||
#if ((defined(FSL_OSA_TASK_ENABLE)) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
osa_status_t OSA_TaskYield(void);
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
|
||||
/*!
|
||||
* @brief Gets the priority of a task.
|
||||
*
|
||||
* @param taskHandle The handler of the task whose priority is received.
|
||||
*
|
||||
* @return Task's priority.
|
||||
*/
|
||||
#if ((defined(FSL_OSA_TASK_ENABLE)) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
osa_task_priority_t OSA_TaskGetPriority(osa_task_handle_t taskHandle);
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
|
||||
/*!
|
||||
* @brief Sets the priority of a task.
|
||||
*
|
||||
* @param taskHandle The handler of the task whose priority is set.
|
||||
* @param taskPriority The priority to set.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess Task's priority is set successfully.
|
||||
* @retval KOSA_StatusError Task's priority can not be set.
|
||||
*/
|
||||
#if ((defined(FSL_OSA_TASK_ENABLE)) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
osa_status_t OSA_TaskSetPriority(osa_task_handle_t taskHandle, osa_task_priority_t taskPriority);
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
|
||||
/*!
|
||||
* @brief Destroys a previously created task.
|
||||
*
|
||||
* @param taskHandle The handler of the task to destroy.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The task was successfully destroyed.
|
||||
* @retval KOSA_StatusError Task destruction failed or invalid parameter.
|
||||
*/
|
||||
#if ((defined(FSL_OSA_TASK_ENABLE)) && (FSL_OSA_TASK_ENABLE > 0U))
|
||||
osa_status_t OSA_TaskDestroy(osa_task_handle_t taskHandle);
|
||||
#endif /* FSL_OSA_TASK_ENABLE */
|
||||
|
||||
/*!
|
||||
* @brief Creates a semaphore with a given value.
|
||||
*
|
||||
* This function creates a semaphore and sets the value to the parameter
|
||||
* initValue.
|
||||
*
|
||||
* Example below shows how to use this API to create the semaphore handle.
|
||||
* @code
|
||||
* OSA_SEMAPHORE_HANDLE_DEFINE(semaphoreHandle);
|
||||
* OSA_SemaphoreCreate((osa_semaphore_handle_t)semaphoreHandle, 0xff);
|
||||
* @endcode
|
||||
*
|
||||
* @param semaphoreHandle Pointer to a memory space of size OSA_SEM_HANDLE_SIZE allocated by the caller.
|
||||
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
|
||||
* You can define the handle in the following two ways:
|
||||
* #OSA_SEMAPHORE_HANDLE_DEFINE(semaphoreHandle);
|
||||
* or
|
||||
* uint32_t semaphoreHandle[((OSA_SEM_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* @param initValue Initial value the semaphore will be set to.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess the new semaphore if the semaphore is created successfully.
|
||||
* @retval KOSA_StatusError if the semaphore can not be created.
|
||||
*/
|
||||
osa_status_t OSA_SemaphoreCreate(osa_semaphore_handle_t semaphoreHandle, uint32_t initValue);
|
||||
|
||||
/*!
|
||||
* @brief Destroys a previously created semaphore.
|
||||
*
|
||||
* @param semaphoreHandle The semaphore handle.
|
||||
* The macro SEMAPHORE_HANDLE_BUFFER_GET is used to get the semaphore buffer pointer,
|
||||
* and should not be used before the macro SEMAPHORE_HANDLE_BUFFER_DEFINE is used.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The semaphore is successfully destroyed.
|
||||
* @retval KOSA_StatusError The semaphore can not be destroyed.
|
||||
*/
|
||||
osa_status_t OSA_SemaphoreDestroy(osa_semaphore_handle_t semaphoreHandle);
|
||||
|
||||
/*!
|
||||
* @brief Pending a semaphore with timeout.
|
||||
*
|
||||
* This function checks the semaphore's counting value. If it is positive,
|
||||
* decreases it and returns KOSA_StatusSuccess. Otherwise, a timeout is used
|
||||
* to wait.
|
||||
*
|
||||
* @param semaphoreHandle The semaphore handle.
|
||||
* @param millisec The maximum number of milliseconds to wait if semaphore is not
|
||||
* positive. Pass osaWaitForever_c to wait indefinitely, pass 0
|
||||
* will return KOSA_StatusTimeout immediately.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The semaphore is received.
|
||||
* @retval KOSA_StatusTimeout The semaphore is not received within the specified 'timeout'.
|
||||
* @retval KOSA_StatusError An incorrect parameter was passed.
|
||||
*/
|
||||
osa_status_t OSA_SemaphoreWait(osa_semaphore_handle_t semaphoreHandle, uint32_t millisec);
|
||||
|
||||
/*!
|
||||
* @brief Signals for someone waiting on the semaphore to wake up.
|
||||
*
|
||||
* Wakes up one task that is waiting on the semaphore. If no task is waiting, increases
|
||||
* the semaphore's counting value.
|
||||
*
|
||||
* @param semaphoreHandle The semaphore handle to signal.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The semaphore is successfully signaled.
|
||||
* @retval KOSA_StatusError The object can not be signaled or invalid parameter.
|
||||
*
|
||||
*/
|
||||
osa_status_t OSA_SemaphorePost(osa_semaphore_handle_t semaphoreHandle);
|
||||
|
||||
/*!
|
||||
* @brief Create an unlocked mutex.
|
||||
*
|
||||
* This function creates a non-recursive mutex and sets it to unlocked status.
|
||||
*
|
||||
* Example below shows how to use this API to create the mutex handle.
|
||||
* @code
|
||||
* OSA_MUTEX_HANDLE_DEFINE(mutexHandle);
|
||||
* OSA_MutexCreate((osa_mutex_handle_t)mutexHandle);
|
||||
* @endcode
|
||||
*
|
||||
* @param mutexHandle Pointer to a memory space of size OSA_MUTEX_HANDLE_SIZE allocated by the caller.
|
||||
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
|
||||
* You can define the handle in the following two ways:
|
||||
* #OSA_MUTEX_HANDLE_DEFINE(mutexHandle);
|
||||
* or
|
||||
* uint32_t mutexHandle[((OSA_MUTEX_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* @retval KOSA_StatusSuccess the new mutex if the mutex is created successfully.
|
||||
* @retval KOSA_StatusError if the mutex can not be created.
|
||||
*/
|
||||
osa_status_t OSA_MutexCreate(osa_mutex_handle_t mutexHandle);
|
||||
|
||||
/*!
|
||||
* @brief Waits for a mutex and locks it.
|
||||
*
|
||||
* This function checks the mutex's status. If it is unlocked, locks it and returns the
|
||||
* KOSA_StatusSuccess. Otherwise, waits for a timeout in milliseconds to lock.
|
||||
*
|
||||
* @param mutexHandle The mutex handle.
|
||||
* @param millisec The maximum number of milliseconds to wait for the mutex.
|
||||
* If the mutex is locked, Pass the value osaWaitForever_c will
|
||||
* wait indefinitely, pass 0 will return KOSA_StatusTimeout
|
||||
* immediately.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The mutex is locked successfully.
|
||||
* @retval KOSA_StatusTimeout Timeout occurred.
|
||||
* @retval KOSA_StatusError Incorrect parameter was passed.
|
||||
*
|
||||
* @note This is non-recursive mutex, a task can not try to lock the mutex it has locked.
|
||||
*/
|
||||
osa_status_t OSA_MutexLock(osa_mutex_handle_t mutexHandle, uint32_t millisec);
|
||||
|
||||
/*!
|
||||
* @brief Unlocks a previously locked mutex.
|
||||
*
|
||||
* @param mutexHandle The mutex handle.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The mutex is successfully unlocked.
|
||||
* @retval KOSA_StatusError The mutex can not be unlocked or invalid parameter.
|
||||
*/
|
||||
osa_status_t OSA_MutexUnlock(osa_mutex_handle_t mutexHandle);
|
||||
|
||||
/*!
|
||||
* @brief Destroys a previously created mutex.
|
||||
*
|
||||
* @param mutexHandle The mutex handle.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The mutex is successfully destroyed.
|
||||
* @retval KOSA_StatusError The mutex can not be destroyed.
|
||||
*
|
||||
*/
|
||||
osa_status_t OSA_MutexDestroy(osa_mutex_handle_t mutexHandle);
|
||||
|
||||
/*!
|
||||
* @brief Initializes an event object with all flags cleared.
|
||||
*
|
||||
* This function creates an event object and set its clear mode. If autoClear
|
||||
* is 1, when a task gets the event flags, these flags will be
|
||||
* cleared automatically. Otherwise these flags must
|
||||
* be cleared manually.
|
||||
*
|
||||
* Example below shows how to use this API to create the event handle.
|
||||
* @code
|
||||
* OSA_EVENT_HANDLE_DEFINE(eventHandle);
|
||||
* OSA_EventCreate((osa_event_handle_t)eventHandle, 0);
|
||||
* @endcode
|
||||
*
|
||||
* @param eventHandle Pointer to a memory space of size OSA_EVENT_HANDLE_SIZE allocated by the caller.
|
||||
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
|
||||
* You can define the handle in the following two ways:
|
||||
* #OSA_EVENT_HANDLE_DEFINE(eventHandle);
|
||||
* or
|
||||
* uint32_t eventHandle[((OSA_EVENT_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* @param autoClear 1 The event is auto-clear.
|
||||
* 0 The event manual-clear
|
||||
* @retval KOSA_StatusSuccess the new event if the event is created successfully.
|
||||
* @retval KOSA_StatusError if the event can not be created.
|
||||
*/
|
||||
osa_status_t OSA_EventCreate(osa_event_handle_t eventHandle, uint8_t autoClear);
|
||||
|
||||
/*!
|
||||
* @brief Sets one or more event flags.
|
||||
*
|
||||
* Sets specified flags of an event object.
|
||||
*
|
||||
* @param eventHandle The event handle.
|
||||
* @param flagsToSet Flags to be set.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The flags were successfully set.
|
||||
* @retval KOSA_StatusError An incorrect parameter was passed.
|
||||
*/
|
||||
osa_status_t OSA_EventSet(osa_event_handle_t eventHandle, osa_event_flags_t flagsToSet);
|
||||
|
||||
/*!
|
||||
* @brief Clears one or more flags.
|
||||
*
|
||||
* Clears specified flags of an event object.
|
||||
*
|
||||
* @param eventHandle The event handle.
|
||||
* @param flagsToClear Flags to be clear.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The flags were successfully cleared.
|
||||
* @retval KOSA_StatusError An incorrect parameter was passed.
|
||||
*/
|
||||
osa_status_t OSA_EventClear(osa_event_handle_t eventHandle, osa_event_flags_t flagsToClear);
|
||||
|
||||
/*!
|
||||
* @brief Get event's flags.
|
||||
*
|
||||
* Get specified flags of an event object.
|
||||
*
|
||||
* @param eventHandle The event handle.
|
||||
* The macro EVENT_HANDLE_BUFFER_GET is used to get the event buffer pointer,
|
||||
* and should not be used before the macro EVENT_HANDLE_BUFFER_DEFINE is used.
|
||||
* @param flagsMask The flags user want to get are specified by this parameter.
|
||||
* @param pFlagsOfEvent The event flags are obtained by this parameter.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The event flags were successfully got.
|
||||
* @retval KOSA_StatusError An incorrect parameter was passed.
|
||||
*/
|
||||
osa_status_t OSA_EventGet(osa_event_handle_t eventHandle,
|
||||
osa_event_flags_t flagsMask,
|
||||
osa_event_flags_t *pFlagsOfEvent);
|
||||
|
||||
/*!
|
||||
* @brief Waits for specified event flags to be set.
|
||||
*
|
||||
* This function waits for a combination of flags to be set in an event object.
|
||||
* Applications can wait for any/all bits to be set. Also this function could
|
||||
* obtain the flags who wakeup the waiting task.
|
||||
*
|
||||
* @param eventHandle The event handle.
|
||||
* @param flagsToWait Flags that to wait.
|
||||
* @param waitAll Wait all flags or any flag to be set.
|
||||
* @param millisec The maximum number of milliseconds to wait for the event.
|
||||
* If the wait condition is not met, pass osaWaitForever_c will
|
||||
* wait indefinitely, pass 0 will return KOSA_StatusTimeout
|
||||
* immediately.
|
||||
* @param pSetFlags Flags that wakeup the waiting task are obtained by this parameter.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The wait condition met and function returns successfully.
|
||||
* @retval KOSA_StatusTimeout Has not met wait condition within timeout.
|
||||
* @retval KOSA_StatusError An incorrect parameter was passed.
|
||||
|
||||
*
|
||||
* @note Please pay attention to the flags bit width, FreeRTOS uses the most
|
||||
* significant 8 bis as control bits, so do not wait these bits while using
|
||||
* FreeRTOS.
|
||||
*
|
||||
*/
|
||||
osa_status_t OSA_EventWait(osa_event_handle_t eventHandle,
|
||||
osa_event_flags_t flagsToWait,
|
||||
uint8_t waitAll,
|
||||
uint32_t millisec,
|
||||
osa_event_flags_t *pSetFlags);
|
||||
|
||||
/*!
|
||||
* @brief Destroys a previously created event object.
|
||||
*
|
||||
* @param eventHandle The event handle.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The event is successfully destroyed.
|
||||
* @retval KOSA_StatusError Event destruction failed.
|
||||
*/
|
||||
osa_status_t OSA_EventDestroy(osa_event_handle_t eventHandle);
|
||||
|
||||
/*!
|
||||
* @brief Initializes a message queue.
|
||||
*
|
||||
* This function allocates memory for and initializes a message queue. Message queue elements are hardcoded as void*.
|
||||
*
|
||||
* Example below shows how to use this API to create the massage queue handle.
|
||||
* @code
|
||||
* OSA_MSGQ_HANDLE_DEFINE(msgqHandle);
|
||||
* OSA_MsgQCreate((osa_msgq_handle_t)msgqHandle, 5U, sizeof(msg));
|
||||
* @endcode
|
||||
*
|
||||
* @param msgqHandle Pointer to a memory space of size #(OSA_MSGQ_HANDLE_SIZE + msgNo*msgSize) on bare-matel
|
||||
* and #(OSA_MSGQ_HANDLE_SIZE) on FreeRTOS allocated by the caller, message queue handle.
|
||||
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
|
||||
* You can define the handle in the following two ways:
|
||||
* #OSA_MSGQ_HANDLE_DEFINE(msgqHandle);
|
||||
* or
|
||||
* For bm: uint32_t msgqHandle[((OSA_MSGQ_HANDLE_SIZE + msgNo*msgSize + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* For freertos: uint32_t msgqHandle[((OSA_MSGQ_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* @param msgNo :number of messages the message queue should accommodate.
|
||||
* @param msgSize :size of a single message structure.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess Message queue successfully Create.
|
||||
* @retval KOSA_StatusError Message queue create failure.
|
||||
*/
|
||||
osa_status_t OSA_MsgQCreate(osa_msgq_handle_t msgqHandle, uint32_t msgNo, uint32_t msgSize);
|
||||
|
||||
/*!
|
||||
* @brief Puts a message at the end of the queue.
|
||||
*
|
||||
* This function puts a message to the end of the message queue. If the queue
|
||||
* is full, this function returns the KOSA_StatusError;
|
||||
*
|
||||
* @param msgqHandle Message Queue handler.
|
||||
* @param pMessage Pointer to the message to be put into the queue.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess Message successfully put into the queue.
|
||||
* @retval KOSA_StatusError The queue was full or an invalid parameter was passed.
|
||||
*/
|
||||
osa_status_t OSA_MsgQPut(osa_msgq_handle_t msgqHandle, osa_msg_handle_t pMessage);
|
||||
|
||||
/*!
|
||||
* @brief Reads and remove a message at the head of the queue.
|
||||
*
|
||||
* This function gets a message from the head of the message queue. If the
|
||||
* queue is empty, timeout is used to wait.
|
||||
*
|
||||
* @param msgqHandle Message Queue handler.
|
||||
* @param pMessage Pointer to a memory to save the message.
|
||||
* @param millisec The number of milliseconds to wait for a message. If the
|
||||
* queue is empty, pass osaWaitForever_c will wait indefinitely,
|
||||
* pass 0 will return KOSA_StatusTimeout immediately.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess Message successfully obtained from the queue.
|
||||
* @retval KOSA_StatusTimeout The queue remains empty after timeout.
|
||||
* @retval KOSA_StatusError Invalid parameter.
|
||||
*/
|
||||
osa_status_t OSA_MsgQGet(osa_msgq_handle_t msgqHandle, osa_msg_handle_t pMessage, uint32_t millisec);
|
||||
|
||||
/*!
|
||||
* @brief Get the available message
|
||||
*
|
||||
* This function is used to get the available message.
|
||||
*
|
||||
* @param msgqHandle Message Queue handler.
|
||||
*
|
||||
* @return Available message count
|
||||
*/
|
||||
int OSA_MsgQAvailableMsgs(osa_msgq_handle_t msgqHandle);
|
||||
|
||||
/*!
|
||||
* @brief Destroys a previously created queue.
|
||||
*
|
||||
* @param msgqHandle Message Queue handler.
|
||||
*
|
||||
* @retval KOSA_StatusSuccess The queue was successfully destroyed.
|
||||
* @retval KOSA_StatusError Message queue destruction failed.
|
||||
*/
|
||||
osa_status_t OSA_MsgQDestroy(osa_msgq_handle_t msgqHandle);
|
||||
|
||||
/*!
|
||||
* @brief Enable all interrupts.
|
||||
*/
|
||||
void OSA_InterruptEnable(void);
|
||||
|
||||
/*!
|
||||
* @brief Disable all interrupts.
|
||||
*/
|
||||
void OSA_InterruptDisable(void);
|
||||
|
||||
/*!
|
||||
* @brief Enable all interrupts using PRIMASK.
|
||||
*/
|
||||
void OSA_EnableIRQGlobal(void);
|
||||
|
||||
/*!
|
||||
* @brief Disable all interrupts using PRIMASK.
|
||||
*/
|
||||
void OSA_DisableIRQGlobal(void);
|
||||
|
||||
/*!
|
||||
* @brief Delays execution for a number of milliseconds.
|
||||
*
|
||||
* @param millisec The time in milliseconds to wait.
|
||||
*/
|
||||
void OSA_TimeDelay(uint32_t millisec);
|
||||
|
||||
/*!
|
||||
* @brief This function gets current time in milliseconds.
|
||||
*
|
||||
* @retval current time in milliseconds
|
||||
*/
|
||||
uint32_t OSA_TimeGetMsec(void);
|
||||
|
||||
/*!
|
||||
* @brief Installs the interrupt handler.
|
||||
*
|
||||
* @param IRQNumber IRQ number of the interrupt.
|
||||
* @param handler The interrupt handler to install.
|
||||
*/
|
||||
void OSA_InstallIntHandler(uint32_t IRQNumber, void (*handler)(void));
|
||||
|
||||
/*! @}*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/*! @}*/
|
||||
#endif
|
||||
1323
component/osa/fsl_os_abstraction_bm.c
Normal file
1323
component/osa/fsl_os_abstraction_bm.c
Normal file
File diff suppressed because it is too large
Load Diff
72
component/osa/fsl_os_abstraction_bm.h
Normal file
72
component/osa/fsl_os_abstraction_bm.h
Normal file
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#if !defined(__FSL_OS_ABSTRACTION_BM_H__)
|
||||
#define __FSL_OS_ABSTRACTION_BM_H__
|
||||
|
||||
/*!
|
||||
* @addtogroup os_abstraction_bm
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Declarations
|
||||
******************************************************************************/
|
||||
/*! @brief Bare Metal does not use timer. */
|
||||
#ifndef FSL_OSA_BM_TIMER_NONE
|
||||
#define FSL_OSA_BM_TIMER_NONE 0U
|
||||
#endif
|
||||
|
||||
/*! @brief Bare Metal uses SYSTICK as timer. */
|
||||
#ifndef FSL_OSA_BM_TIMER_SYSTICK
|
||||
#define FSL_OSA_BM_TIMER_SYSTICK 1U
|
||||
#endif
|
||||
|
||||
/*! @brief Configure what timer is used in Bare Metal. */
|
||||
#ifndef FSL_OSA_BM_TIMER_CONFIG
|
||||
#define FSL_OSA_BM_TIMER_CONFIG FSL_OSA_BM_TIMER_NONE
|
||||
#endif
|
||||
|
||||
/*! @brief Type for task parameter */
|
||||
typedef void *task_param_t;
|
||||
|
||||
/*! @brief Type for an event flags group, bit 32 is reserved */
|
||||
typedef uint32_t event_flags_t;
|
||||
|
||||
/*! @brief Constant to pass as timeout value in order to wait indefinitely. */
|
||||
#define OSA_WAIT_FOREVER 0xFFFFFFFFU
|
||||
|
||||
/*! @brief How many tasks can the bare metal support. */
|
||||
#ifndef TASK_MAX_NUM
|
||||
#define TASK_MAX_NUM 7
|
||||
#endif
|
||||
|
||||
/*! @brief OSA's time range in millisecond, OSA time wraps if exceeds this value. */
|
||||
#define FSL_OSA_TIME_RANGE 0xFFFFFFFFU
|
||||
|
||||
/*! @brief The default interrupt handler installed in vector table. */
|
||||
#define OSA_DEFAULT_INT_HANDLER ((osa_int_handler_t)(&DefaultISR))
|
||||
|
||||
/*! @brief The default interrupt handler installed in vector table. */
|
||||
extern void DefaultISR(void);
|
||||
|
||||
/*!
|
||||
* @name Thread management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief To provide unified priority for upper layer, OSA layer makes conversation.
|
||||
*/
|
||||
#define PRIORITY_OSA_TO_RTOS(osa_prio) (osa_prio)
|
||||
#define PRIORITY_RTOS_TO_OSA(rtos_prio) (rtos_prio)
|
||||
|
||||
/*! @}*/
|
||||
/*! @}*/
|
||||
#endif /* __FSL_OS_ABSTRACTION_BM_H__ */
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
40
component/osa/fsl_os_abstraction_config.h
Normal file
40
component/osa/fsl_os_abstraction_config.h
Normal file
@@ -0,0 +1,40 @@
|
||||
/*!
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_OS_ABSTRACTION_CONFIG_H_
|
||||
#define _FSL_OS_ABSTRACTION_CONFIG_H_
|
||||
|
||||
#ifndef gMainThreadStackSize_c
|
||||
#define gMainThreadStackSize_c 1024
|
||||
#endif
|
||||
|
||||
#ifndef gMainThreadPriority_c
|
||||
#define gMainThreadPriority_c 7
|
||||
#endif
|
||||
|
||||
#ifndef gTaskMultipleInstancesManagement_c
|
||||
#define gTaskMultipleInstancesManagement_c 0
|
||||
#endif
|
||||
|
||||
/*! @brief Definition to determine whether enable OSA's TASK module. */
|
||||
#ifndef OSA_USED
|
||||
#ifndef FSL_OSA_TASK_ENABLE
|
||||
#define FSL_OSA_TASK_ENABLE 0U
|
||||
#endif
|
||||
#else
|
||||
#if defined(FSL_OSA_TASK_ENABLE)
|
||||
#undef FSL_OSA_TASK_ENABLE
|
||||
#endif
|
||||
#define FSL_OSA_TASK_ENABLE 1U
|
||||
#endif /* OSA_USED */
|
||||
|
||||
#ifndef FSL_OSA_MAIN_FUNC_ENABLE
|
||||
#define FSL_OSA_MAIN_FUNC_ENABLE 1U
|
||||
#endif
|
||||
|
||||
#endif /* _FSL_OS_ABSTRACTION_CONFIG_H_ */
|
||||
558
component/uart/fsl_adapter_uart.h
Normal file
558
component/uart/fsl_adapter_uart.h
Normal file
@@ -0,0 +1,558 @@
|
||||
/*
|
||||
* Copyright 2018-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __HAL_UART_ADAPTER_H__
|
||||
#define __HAL_UART_ADAPTER_H__
|
||||
|
||||
#include "fsl_common.h"
|
||||
#if defined(FSL_RTOS_FREE_RTOS)
|
||||
#include "FreeRTOS.h"
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @addtogroup UART_Adapter
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Enable or disable UART adapter non-blocking mode (1 - enable, 0 - disable) */
|
||||
#ifdef DEBUG_CONSOLE_TRANSFER_NON_BLOCKING
|
||||
#define UART_ADAPTER_NON_BLOCKING_MODE (1U)
|
||||
#else
|
||||
#ifndef SERIAL_MANAGER_NON_BLOCKING_MODE
|
||||
#define UART_ADAPTER_NON_BLOCKING_MODE (0U)
|
||||
#else
|
||||
#define UART_ADAPTER_NON_BLOCKING_MODE SERIAL_MANAGER_NON_BLOCKING_MODE
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(__GIC_PRIO_BITS)
|
||||
#ifndef HAL_UART_ISR_PRIORITY
|
||||
#define HAL_UART_ISR_PRIORITY (25U)
|
||||
#endif
|
||||
#else
|
||||
#if defined(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
|
||||
#ifndef HAL_UART_ISR_PRIORITY
|
||||
#define HAL_UART_ISR_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
|
||||
#endif
|
||||
#else
|
||||
/* The default value 3 is used to support different ARM Core, such as CM0P, CM4, CM7, and CM33, etc.
|
||||
* The minimum number of priority bits implemented in the NVIC is 2 on these SOCs. The value of mininum
|
||||
* priority is 3 (2^2 - 1). So, the default value is 3.
|
||||
*/
|
||||
#ifndef HAL_UART_ISR_PRIORITY
|
||||
#define HAL_UART_ISR_PRIORITY (3U)
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef HAL_UART_ADAPTER_LOWPOWER
|
||||
#define HAL_UART_ADAPTER_LOWPOWER (0U)
|
||||
#endif /* HAL_UART_ADAPTER_LOWPOWER */
|
||||
|
||||
#ifndef HAL_UART_ADAPTER_FIFO
|
||||
#define HAL_UART_ADAPTER_FIFO (0U)
|
||||
#endif /* HAL_UART_ADAPTER_FIFO */
|
||||
|
||||
/*! @brief Definition of uart adapter handle size. */
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
#define HAL_UART_HANDLE_SIZE (92U + HAL_UART_ADAPTER_LOWPOWER * 16U)
|
||||
#define HAL_UART_BLOCK_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U)
|
||||
#else
|
||||
#define HAL_UART_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U)
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Defines the uart handle
|
||||
*
|
||||
* This macro is used to define a 4 byte aligned uart handle.
|
||||
* Then use "(hal_uart_handle_t)name" to get the uart handle.
|
||||
*
|
||||
* The macro should be global and could be optional. You could also define uart handle by yourself.
|
||||
*
|
||||
* This is an example,
|
||||
* @code
|
||||
* UART_HANDLE_DEFINE(uartHandle);
|
||||
* @endcode
|
||||
*
|
||||
* @param name The name string of the uart handle.
|
||||
*/
|
||||
#define UART_HANDLE_DEFINE(name) uint32_t name[((HAL_UART_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
|
||||
|
||||
/*! @brief Whether enable transactional function of the UART. (0 - disable, 1 - enable) */
|
||||
#ifndef HAL_UART_TRANSFER_MODE
|
||||
#define HAL_UART_TRANSFER_MODE (0U)
|
||||
#endif
|
||||
|
||||
/*! @brief The handle of uart adapter. */
|
||||
typedef void *hal_uart_handle_t;
|
||||
|
||||
/*! @brief UART status */
|
||||
typedef enum _hal_uart_status
|
||||
{
|
||||
kStatus_HAL_UartSuccess = kStatus_Success, /*!< Successfully */
|
||||
kStatus_HAL_UartTxBusy = MAKE_STATUS(kStatusGroup_HAL_UART, 1), /*!< TX busy */
|
||||
kStatus_HAL_UartRxBusy = MAKE_STATUS(kStatusGroup_HAL_UART, 2), /*!< RX busy */
|
||||
kStatus_HAL_UartTxIdle = MAKE_STATUS(kStatusGroup_HAL_UART, 3), /*!< HAL UART transmitter is idle. */
|
||||
kStatus_HAL_UartRxIdle = MAKE_STATUS(kStatusGroup_HAL_UART, 4), /*!< HAL UART receiver is idle */
|
||||
kStatus_HAL_UartBaudrateNotSupport =
|
||||
MAKE_STATUS(kStatusGroup_HAL_UART, 5), /*!< Baudrate is not support in current clock source */
|
||||
kStatus_HAL_UartProtocolError = MAKE_STATUS(
|
||||
kStatusGroup_HAL_UART,
|
||||
6), /*!< Error occurs for Noise, Framing, Parity, etc.
|
||||
For transactional transfer, The up layer needs to abort the transfer and then starts again */
|
||||
kStatus_HAL_UartError = MAKE_STATUS(kStatusGroup_HAL_UART, 7), /*!< Error occurs on HAL UART */
|
||||
} hal_uart_status_t;
|
||||
|
||||
/*! @brief UART parity mode. */
|
||||
typedef enum _hal_uart_parity_mode
|
||||
{
|
||||
kHAL_UartParityDisabled = 0x0U, /*!< Parity disabled */
|
||||
kHAL_UartParityEven = 0x2U, /*!< Parity even enabled */
|
||||
kHAL_UartParityOdd = 0x3U, /*!< Parity odd enabled */
|
||||
} hal_uart_parity_mode_t;
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
/*! @brief UART Block Mode. */
|
||||
typedef enum _hal_uart_block_mode
|
||||
{
|
||||
kHAL_UartNonBlockMode = 0x0U, /*!< Uart NonBlock Mode */
|
||||
kHAL_UartBlockMode = 0x1U, /*!< Uart Block Mode */
|
||||
} hal_uart_block_mode_t;
|
||||
#endif /* UART_ADAPTER_NON_BLOCKING_MODE */
|
||||
|
||||
/*! @brief UART stop bit count. */
|
||||
typedef enum _hal_uart_stop_bit_count
|
||||
{
|
||||
kHAL_UartOneStopBit = 0U, /*!< One stop bit */
|
||||
kHAL_UartTwoStopBit = 1U, /*!< Two stop bits */
|
||||
} hal_uart_stop_bit_count_t;
|
||||
|
||||
/*! @brief UART configuration structure. */
|
||||
typedef struct _hal_uart_config
|
||||
{
|
||||
uint32_t srcClock_Hz; /*!< Source clock */
|
||||
uint32_t baudRate_Bps; /*!< Baud rate */
|
||||
hal_uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
|
||||
hal_uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
|
||||
uint8_t enableRx; /*!< Enable RX */
|
||||
uint8_t enableTx; /*!< Enable TX */
|
||||
uint8_t enableRxRTS; /*!< Enable RX RTS */
|
||||
uint8_t enableTxCTS; /*!< Enable TX CTS */
|
||||
uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information please refer to the
|
||||
SOC corresponding RM.
|
||||
Invalid instance value will cause initialization failure. */
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
hal_uart_block_mode_t mode; /*!< Uart block mode */
|
||||
#endif /* UART_ADAPTER_NON_BLOCKING_MODE */
|
||||
#if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u))
|
||||
uint8_t txFifoWatermark;
|
||||
uint8_t rxFifoWatermark;
|
||||
#endif
|
||||
} hal_uart_config_t;
|
||||
|
||||
/*! @brief UART transfer callback function. */
|
||||
typedef void (*hal_uart_transfer_callback_t)(hal_uart_handle_t handle, hal_uart_status_t status, void *callbackParam);
|
||||
|
||||
/*! @brief UART transfer structure. */
|
||||
typedef struct _hal_uart_transfer
|
||||
{
|
||||
uint8_t *data; /*!< The buffer of data to be transfer.*/
|
||||
size_t dataSize; /*!< The byte count to be transfer. */
|
||||
} hal_uart_transfer_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* _cplusplus */
|
||||
|
||||
/*!
|
||||
* @name Initialization and deinitialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Initializes a UART instance with the UART handle and the user configuration structure.
|
||||
*
|
||||
* This function configures the UART module with user-defined settings. The user can configure the configuration
|
||||
* structure. The parameter handle is a pointer to point to a memory space of size #HAL_UART_HANDLE_SIZE allocated by
|
||||
* the caller. Example below shows how to use this API to configure the UART.
|
||||
* @code
|
||||
* UART_HANDLE_DEFINE(g_UartHandle);
|
||||
* hal_uart_config_t config;
|
||||
* config.srcClock_Hz = 48000000;
|
||||
* config.baudRate_Bps = 115200U;
|
||||
* config.parityMode = kHAL_UartParityDisabled;
|
||||
* config.stopBitCount = kHAL_UartOneStopBit;
|
||||
* config.enableRx = 1;
|
||||
* config.enableTx = 1;
|
||||
* config.enableRxRTS = 0;
|
||||
* config.enableTxCTS = 0;
|
||||
* config.instance = 0;
|
||||
* HAL_UartInit((hal_uart_handle_t)g_UartHandle, &config);
|
||||
* @endcode
|
||||
*
|
||||
* @param handle Pointer to point to a memory space of size #HAL_UART_HANDLE_SIZE allocated by the caller.
|
||||
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
|
||||
* You can define the handle in the following two ways:
|
||||
* #UART_HANDLE_DEFINE(handle);
|
||||
* or
|
||||
* uint32_t handle[((HAL_UART_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
|
||||
* @param config Pointer to user-defined configuration structure.
|
||||
* @retval kStatus_HAL_UartBaudrateNotSupport Baudrate is not support in current clock source.
|
||||
* @retval kStatus_HAL_UartSuccess UART initialization succeed
|
||||
*/
|
||||
hal_uart_status_t HAL_UartInit(hal_uart_handle_t handle, const hal_uart_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Deinitializes a UART instance.
|
||||
*
|
||||
* This function waits for TX complete, disables TX and RX, and disables the UART clock.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_HAL_UartSuccess UART de-initialization succeed
|
||||
*/
|
||||
hal_uart_status_t HAL_UartDeinit(hal_uart_handle_t handle);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*!
|
||||
* @name Blocking bus Operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Reads RX data register using a blocking method.
|
||||
*
|
||||
* This function polls the RX register, waits for the RX register to be full or for RX FIFO to
|
||||
* have data, and reads data from the RX register.
|
||||
*
|
||||
* @note The function #HAL_UartReceiveBlocking and the function HAL_UartTransferReceiveNonBlocking
|
||||
* cannot be used at the same time.
|
||||
* And, the function HAL_UartTransferAbortReceive cannot be used to abort the transmission of this function.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param data Start address of the buffer to store the received data.
|
||||
* @param length Size of the buffer.
|
||||
* @retval kStatus_HAL_UartError An error occurred while receiving data.
|
||||
* @retval kStatus_HAL_UartParityError A parity error occurred while receiving data.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully received all data.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartReceiveBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length);
|
||||
|
||||
/*!
|
||||
* @brief Writes to the TX register using a blocking method.
|
||||
*
|
||||
* This function polls the TX register, waits for the TX register to be empty or for the TX FIFO
|
||||
* to have room and writes data to the TX buffer.
|
||||
*
|
||||
* @note The function #HAL_UartSendBlocking and the function HAL_UartTransferSendNonBlocking
|
||||
* cannot be used at the same time.
|
||||
* And, the function HAL_UartTransferAbortSend cannot be used to abort the transmission of this function.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param data Start address of the data to write.
|
||||
* @param length Size of the data to write.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully sent all data.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartSendBlocking(hal_uart_handle_t handle, const uint8_t *data, size_t length);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
* @note The transactional API and the functional API cannot be used at the same time. The macro
|
||||
* #HAL_UART_TRANSFER_MODE is used to set which one will be used. If #HAL_UART_TRANSFER_MODE is zero, the
|
||||
* functional API with non-blocking mode will be used. Otherwise, transactional API will be used.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Installs a callback and callback parameter.
|
||||
*
|
||||
* This function is used to install the callback and callback parameter for UART module.
|
||||
* When any status of the UART changed, the driver will notify the upper layer by the installed callback
|
||||
* function. And the status is also passed as status parameter when the callback is called.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param callback The callback function.
|
||||
* @param callbackParam The parameter of the callback function.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully install the callback.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferInstallCallback(hal_uart_handle_t handle,
|
||||
hal_uart_transfer_callback_t callback,
|
||||
void *callbackParam);
|
||||
|
||||
/*!
|
||||
* @brief Receives a buffer of data using an interrupt method.
|
||||
*
|
||||
* This function receives data using an interrupt method. This is a non-blocking function, which
|
||||
* returns directly without waiting for all data to be received.
|
||||
* The receive request is saved by the UART driver.
|
||||
* When the new data arrives, the receive request is serviced first.
|
||||
* When all data is received, the UART driver notifies the upper layer
|
||||
* through a callback function and passes the status parameter @ref kStatus_UART_RxIdle.
|
||||
*
|
||||
* @note The function #HAL_UartReceiveBlocking and the function #HAL_UartTransferReceiveNonBlocking
|
||||
* cannot be used at the same time.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param transfer UART transfer structure, see #hal_uart_transfer_t.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully queue the transfer into transmit queue.
|
||||
* @retval kStatus_HAL_UartRxBusy Previous receive request is not finished.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferReceiveNonBlocking(hal_uart_handle_t handle, hal_uart_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transmits a buffer of data using the interrupt method.
|
||||
*
|
||||
* This function sends data using an interrupt method. This is a non-blocking function, which
|
||||
* returns directly without waiting for all data to be written to the TX register. When
|
||||
* all data is written to the TX register in the ISR, the UART driver calls the callback
|
||||
* function and passes the @ref kStatus_UART_TxIdle as status parameter.
|
||||
*
|
||||
* @note The function #HAL_UartSendBlocking and the function #HAL_UartTransferSendNonBlocking
|
||||
* cannot be used at the same time.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param transfer UART transfer structure. See #hal_uart_transfer_t.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully start the data transmission.
|
||||
* @retval kStatus_HAL_UartTxBusy Previous transmission still not finished; data not all written to TX register yet.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferSendNonBlocking(hal_uart_handle_t handle, hal_uart_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Gets the number of bytes that have been received.
|
||||
*
|
||||
* This function gets the number of bytes that have been received.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param count Receive bytes count.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
* @retval kStatus_Success Get successfully through the parameter \p count.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferGetReceiveCount(hal_uart_handle_t handle, uint32_t *count);
|
||||
|
||||
/*!
|
||||
* @brief Gets the number of bytes written to the UART TX register.
|
||||
*
|
||||
* This function gets the number of bytes written to the UART TX
|
||||
* register by using the interrupt method.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param count Send bytes count.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
* @retval kStatus_Success Get successfully through the parameter \p count.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferGetSendCount(hal_uart_handle_t handle, uint32_t *count);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the interrupt-driven data receiving.
|
||||
*
|
||||
* This function aborts the interrupt-driven data receiving. The user can get the remainBytes to know
|
||||
* how many bytes are not received yet.
|
||||
*
|
||||
* @note The function #HAL_UartTransferAbortReceive cannot be used to abort the transmission of
|
||||
* the function #HAL_UartReceiveBlocking.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_Success Get successfully abort the receiving.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferAbortReceive(hal_uart_handle_t handle);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the interrupt-driven data sending.
|
||||
*
|
||||
* This function aborts the interrupt-driven data sending. The user can get the remainBytes to find out
|
||||
* how many bytes are not sent out.
|
||||
*
|
||||
* @note The function #HAL_UartTransferAbortSend cannot be used to abort the transmission of
|
||||
* the function #HAL_UartSendBlocking.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_Success Get successfully abort the sending.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartTransferAbortSend(hal_uart_handle_t handle);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#else
|
||||
|
||||
/*!
|
||||
* @name Functional API with non-blocking mode.
|
||||
* @note The functional API and the transactional API cannot be used at the same time. The macro
|
||||
* #HAL_UART_TRANSFER_MODE is used to set which one will be used. If #HAL_UART_TRANSFER_MODE is zero, the
|
||||
* functional API with non-blocking mode will be used. Otherwise, transactional API will be used.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Installs a callback and callback parameter.
|
||||
*
|
||||
* This function is used to install the callback and callback parameter for UART module.
|
||||
* When non-blocking sending or receiving finished, the adapter will notify the upper layer by the installed callback
|
||||
* function. And the status is also passed as status parameter when the callback is called.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param callback The callback function.
|
||||
* @param callbackParam The parameter of the callback function.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully install the callback.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartInstallCallback(hal_uart_handle_t handle,
|
||||
hal_uart_transfer_callback_t callback,
|
||||
void *callbackParam);
|
||||
|
||||
/*!
|
||||
* @brief Receives a buffer of data using an interrupt method.
|
||||
*
|
||||
* This function receives data using an interrupt method. This is a non-blocking function, which
|
||||
* returns directly without waiting for all data to be received.
|
||||
* The receive request is saved by the UART adapter.
|
||||
* When the new data arrives, the receive request is serviced first.
|
||||
* When all data is received, the UART adapter notifies the upper layer
|
||||
* through a callback function and passes the status parameter @ref kStatus_UART_RxIdle.
|
||||
*
|
||||
* @note The function #HAL_UartReceiveBlocking and the function #HAL_UartReceiveNonBlocking
|
||||
* cannot be used at the same time.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param data Start address of the data to write.
|
||||
* @param length Size of the data to write.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully queue the transfer into transmit queue.
|
||||
* @retval kStatus_HAL_UartRxBusy Previous receive request is not finished.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartReceiveNonBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length);
|
||||
|
||||
/*!
|
||||
* @brief Transmits a buffer of data using the interrupt method.
|
||||
*
|
||||
* This function sends data using an interrupt method. This is a non-blocking function, which
|
||||
* returns directly without waiting for all data to be written to the TX register. When
|
||||
* all data is written to the TX register in the ISR, the UART driver calls the callback
|
||||
* function and passes the @ref kStatus_UART_TxIdle as status parameter.
|
||||
*
|
||||
* @note The function #HAL_UartSendBlocking and the function #HAL_UartSendNonBlocking
|
||||
* cannot be used at the same time.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param data Start address of the data to write.
|
||||
* @param length Size of the data to write.
|
||||
* @retval kStatus_HAL_UartSuccess Successfully start the data transmission.
|
||||
* @retval kStatus_HAL_UartTxBusy Previous transmission still not finished; data not all written to TX register yet.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartSendNonBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length);
|
||||
|
||||
/*!
|
||||
* @brief Gets the number of bytes that have been received.
|
||||
*
|
||||
* This function gets the number of bytes that have been received.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param count Receive bytes count.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
* @retval kStatus_Success Get successfully through the parameter \p count.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartGetReceiveCount(hal_uart_handle_t handle, uint32_t *reCount);
|
||||
|
||||
/*!
|
||||
* @brief Gets the number of bytes written to the UART TX register.
|
||||
*
|
||||
* This function gets the number of bytes written to the UART TX
|
||||
* register by using the interrupt method.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @param count Send bytes count.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
* @retval kStatus_Success Get successfully through the parameter \p count.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartGetSendCount(hal_uart_handle_t handle, uint32_t *seCount);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the interrupt-driven data receiving.
|
||||
*
|
||||
* This function aborts the interrupt-driven data receiving. The user can get the remainBytes to know
|
||||
* how many bytes are not received yet.
|
||||
*
|
||||
* @note The function #HAL_UartAbortReceive cannot be used to abort the transmission of
|
||||
* the function #HAL_UartReceiveBlocking.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_Success Get successfully abort the receiving.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartAbortReceive(hal_uart_handle_t handle);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the interrupt-driven data sending.
|
||||
*
|
||||
* This function aborts the interrupt-driven data sending. The user can get the remainBytes to find out
|
||||
* how many bytes are not sent out.
|
||||
*
|
||||
* @note The function #HAL_UartAbortSend cannot be used to abort the transmission of
|
||||
* the function #HAL_UartSendBlocking.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_Success Get successfully abort the sending.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartAbortSend(hal_uart_handle_t handle);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Prepares to enter low power consumption.
|
||||
*
|
||||
* This function is used to prepare to enter low power consumption.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_HAL_UartSuccess Successful operation.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartEnterLowpower(hal_uart_handle_t handle);
|
||||
|
||||
/*!
|
||||
* @brief Restores from low power consumption.
|
||||
*
|
||||
* This function is used to restore from low power consumption.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
* @retval kStatus_HAL_UartSuccess Successful operation.
|
||||
* @retval kStatus_HAL_UartError An error occurred.
|
||||
*/
|
||||
hal_uart_status_t HAL_UartExitLowpower(hal_uart_handle_t handle);
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
/*!
|
||||
* @brief UART IRQ handle function.
|
||||
*
|
||||
* This function handles the UART transmit and receive IRQ request.
|
||||
*
|
||||
* @param handle UART handle pointer.
|
||||
*/
|
||||
void HAL_UartIsrFunction(hal_uart_handle_t handle);
|
||||
#endif
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
/*! @}*/
|
||||
#endif /* __HAL_UART_ADAPTER_H__ */
|
||||
643
component/uart/fsl_adapter_usart.c
Normal file
643
component/uart/fsl_adapter_usart.c
Normal file
@@ -0,0 +1,643 @@
|
||||
/*
|
||||
* Copyright 2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_usart.h"
|
||||
#include "fsl_flexcomm.h"
|
||||
|
||||
#include "fsl_adapter_uart.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
#ifndef NDEBUG
|
||||
#if (defined(DEBUG_CONSOLE_ASSERT_DISABLE) && (DEBUG_CONSOLE_ASSERT_DISABLE > 0U))
|
||||
#undef assert
|
||||
#define assert(n)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
/*! @brief uart RX state structure. */
|
||||
typedef struct _hal_uart_receive_state
|
||||
{
|
||||
volatile uint8_t *buffer;
|
||||
volatile uint32_t bufferLength;
|
||||
volatile uint32_t bufferSofar;
|
||||
} hal_uart_receive_state_t;
|
||||
|
||||
/*! @brief uart TX state structure. */
|
||||
typedef struct _hal_uart_send_state
|
||||
{
|
||||
volatile uint8_t *buffer;
|
||||
volatile uint32_t bufferLength;
|
||||
volatile uint32_t bufferSofar;
|
||||
} hal_uart_send_state_t;
|
||||
#endif
|
||||
/*! @brief uart state structure. */
|
||||
typedef struct _hal_uart_state
|
||||
{
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
hal_uart_transfer_callback_t callback;
|
||||
void *callbackParam;
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
usart_handle_t hardwareHandle;
|
||||
#endif
|
||||
hal_uart_receive_state_t rx;
|
||||
hal_uart_send_state_t tx;
|
||||
#endif
|
||||
uint8_t instance;
|
||||
} hal_uart_state_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
static USART_Type *const s_UsartAdapterBase[] = USART_BASE_PTRS;
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
|
||||
#if !(defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
/* Array of USART IRQ number. */
|
||||
static const IRQn_Type s_UsartIRQ[] = USART_IRQS;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
static hal_uart_status_t HAL_UartGetStatus(status_t status)
|
||||
{
|
||||
hal_uart_status_t uartStatus = kStatus_HAL_UartError;
|
||||
switch (status)
|
||||
{
|
||||
case kStatus_Success:
|
||||
uartStatus = kStatus_HAL_UartSuccess;
|
||||
break;
|
||||
case kStatus_USART_TxBusy:
|
||||
uartStatus = kStatus_HAL_UartTxBusy;
|
||||
break;
|
||||
case kStatus_USART_RxBusy:
|
||||
uartStatus = kStatus_HAL_UartRxBusy;
|
||||
break;
|
||||
case kStatus_USART_TxIdle:
|
||||
uartStatus = kStatus_HAL_UartTxIdle;
|
||||
break;
|
||||
case kStatus_USART_RxIdle:
|
||||
uartStatus = kStatus_HAL_UartRxIdle;
|
||||
break;
|
||||
case kStatus_USART_BaudrateNotSupport:
|
||||
uartStatus = kStatus_HAL_UartBaudrateNotSupport;
|
||||
break;
|
||||
case kStatus_USART_NoiseError:
|
||||
case kStatus_USART_FramingError:
|
||||
case kStatus_USART_ParityError:
|
||||
uartStatus = kStatus_HAL_UartProtocolError;
|
||||
break;
|
||||
default:
|
||||
/* This comments for MISRA C-2012 Rule 16.4 */
|
||||
break;
|
||||
}
|
||||
return uartStatus;
|
||||
}
|
||||
#else
|
||||
static hal_uart_status_t HAL_UartGetStatus(status_t status)
|
||||
{
|
||||
if (kStatus_Success == status)
|
||||
{
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kStatus_HAL_UartError;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
static void HAL_UartCallback(USART_Type *base, usart_handle_t *handle, status_t status, void *callbackParam)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
hal_uart_status_t uartStatus = HAL_UartGetStatus(status);
|
||||
assert(callbackParam);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)callbackParam;
|
||||
|
||||
if (kStatus_HAL_UartProtocolError == uartStatus)
|
||||
{
|
||||
if (0U != uartHandle->hardwareHandle.rxDataSize)
|
||||
{
|
||||
uartStatus = kStatus_HAL_UartError;
|
||||
}
|
||||
}
|
||||
|
||||
if (NULL != uartHandle->callback)
|
||||
{
|
||||
uartHandle->callback(uartHandle, uartStatus, uartHandle->callbackParam);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
static void HAL_UartInterruptHandle(USART_Type *base, void *handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle = (hal_uart_state_t *)handle;
|
||||
uint32_t status;
|
||||
uint8_t instance;
|
||||
|
||||
if (NULL == uartHandle)
|
||||
{
|
||||
return;
|
||||
}
|
||||
instance = uartHandle->instance;
|
||||
|
||||
status = USART_GetStatusFlags(s_UsartAdapterBase[instance]);
|
||||
|
||||
/* Receive data register full */
|
||||
if ((0U != (USART_FIFOSTAT_RXNOTEMPTY_MASK & status)) &&
|
||||
(0U != (USART_GetEnabledInterrupts(s_UsartAdapterBase[instance]) & USART_FIFOINTENSET_RXLVL_MASK)))
|
||||
{
|
||||
if (NULL != uartHandle->rx.buffer)
|
||||
{
|
||||
uartHandle->rx.buffer[uartHandle->rx.bufferSofar++] = USART_ReadByte(s_UsartAdapterBase[instance]);
|
||||
if (uartHandle->rx.bufferSofar >= uartHandle->rx.bufferLength)
|
||||
{
|
||||
USART_DisableInterrupts(s_UsartAdapterBase[instance],
|
||||
USART_FIFOINTENCLR_RXLVL_MASK | USART_FIFOINTENCLR_RXERR_MASK);
|
||||
uartHandle->rx.buffer = NULL;
|
||||
if (NULL != uartHandle->callback)
|
||||
{
|
||||
uartHandle->callback(uartHandle, kStatus_HAL_UartRxIdle, uartHandle->callbackParam);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Send data register empty and the interrupt is enabled. */
|
||||
if ((0U != (USART_FIFOSTAT_TXNOTFULL_MASK & status)) &&
|
||||
(0U != (USART_GetEnabledInterrupts(s_UsartAdapterBase[instance]) & USART_FIFOINTENSET_TXLVL_MASK)))
|
||||
{
|
||||
if (NULL != uartHandle->tx.buffer)
|
||||
{
|
||||
USART_WriteByte(s_UsartAdapterBase[instance], uartHandle->tx.buffer[uartHandle->tx.bufferSofar++]);
|
||||
if (uartHandle->tx.bufferSofar >= uartHandle->tx.bufferLength)
|
||||
{
|
||||
USART_DisableInterrupts(s_UsartAdapterBase[instance], USART_FIFOINTENCLR_TXLVL_MASK);
|
||||
uartHandle->tx.buffer = NULL;
|
||||
if (NULL != uartHandle->callback)
|
||||
{
|
||||
uartHandle->callback(uartHandle, kStatus_HAL_UartTxIdle, uartHandle->callbackParam);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if 1
|
||||
USART_ClearStatusFlags(s_UsartAdapterBase[instance], status);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void HAL_UartInterruptHandle_Wapper(void *base, void *handle)
|
||||
{
|
||||
HAL_UartInterruptHandle((USART_Type *)base, handle);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
hal_uart_status_t HAL_UartInit(hal_uart_handle_t handle, const hal_uart_config_t *config)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
usart_config_t usartConfig;
|
||||
status_t status;
|
||||
assert(handle);
|
||||
assert(config);
|
||||
assert(config->instance < (sizeof(s_UsartAdapterBase) / sizeof(USART_Type *)));
|
||||
assert(s_UsartAdapterBase[config->instance]);
|
||||
assert(HAL_UART_HANDLE_SIZE >= sizeof(hal_uart_state_t));
|
||||
|
||||
USART_GetDefaultConfig(&usartConfig);
|
||||
usartConfig.baudRate_Bps = config->baudRate_Bps;
|
||||
|
||||
if (kHAL_UartParityEven == config->parityMode)
|
||||
{
|
||||
usartConfig.parityMode = kUSART_ParityEven;
|
||||
}
|
||||
else if (kHAL_UartParityOdd == config->parityMode)
|
||||
{
|
||||
usartConfig.parityMode = kUSART_ParityOdd;
|
||||
}
|
||||
else
|
||||
{
|
||||
usartConfig.parityMode = kUSART_ParityDisabled;
|
||||
}
|
||||
|
||||
if (kHAL_UartTwoStopBit == config->stopBitCount)
|
||||
{
|
||||
usartConfig.stopBitCount = kUSART_TwoStopBit;
|
||||
}
|
||||
else
|
||||
{
|
||||
usartConfig.stopBitCount = kUSART_OneStopBit;
|
||||
}
|
||||
usartConfig.enableRx = (bool)config->enableRx;
|
||||
usartConfig.enableTx = (bool)config->enableTx;
|
||||
usartConfig.txWatermark = kUSART_TxFifo0;
|
||||
usartConfig.rxWatermark = kUSART_RxFifo1;
|
||||
|
||||
status = USART_Init(s_UsartAdapterBase[config->instance], &usartConfig, config->srcClock_Hz);
|
||||
|
||||
if (kStatus_Success != status)
|
||||
{
|
||||
return HAL_UartGetStatus(status);
|
||||
}
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
uartHandle->instance = config->instance;
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
USART_TransferCreateHandle(s_UsartAdapterBase[config->instance], &uartHandle->hardwareHandle,
|
||||
(usart_transfer_callback_t)HAL_UartCallback, handle);
|
||||
#else
|
||||
/* Enable interrupt in NVIC. */
|
||||
FLEXCOMM_SetIRQHandler(s_UsartAdapterBase[config->instance], HAL_UartInterruptHandle_Wapper, handle);
|
||||
NVIC_SetPriority((IRQn_Type)s_UsartIRQ[config->instance], HAL_UART_ISR_PRIORITY);
|
||||
(void)EnableIRQ(s_UsartIRQ[config->instance]);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartDeinit(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
|
||||
assert(handle);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
USART_Deinit(s_UsartAdapterBase[uartHandle->instance]);
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartReceiveBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
status_t status;
|
||||
assert(handle);
|
||||
assert(data);
|
||||
assert(length);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
if (NULL != uartHandle->rx.buffer)
|
||||
{
|
||||
return kStatus_HAL_UartRxBusy;
|
||||
}
|
||||
#endif
|
||||
|
||||
status = USART_ReadBlocking(s_UsartAdapterBase[uartHandle->instance], data, length);
|
||||
|
||||
return HAL_UartGetStatus(status);
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartSendBlocking(hal_uart_handle_t handle, const uint8_t *data, size_t length)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(data);
|
||||
assert(length);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
if (NULL != uartHandle->tx.buffer)
|
||||
{
|
||||
return kStatus_HAL_UartTxBusy;
|
||||
}
|
||||
#endif
|
||||
|
||||
(void)USART_WriteBlocking(s_UsartAdapterBase[uartHandle->instance], data, length);
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartEnterLowpower(hal_uart_handle_t handle)
|
||||
{
|
||||
assert(handle);
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartExitLowpower(hal_uart_handle_t handle)
|
||||
{
|
||||
assert(handle);
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
|
||||
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
|
||||
hal_uart_status_t HAL_UartTransferInstallCallback(hal_uart_handle_t handle,
|
||||
hal_uart_transfer_callback_t callback,
|
||||
void *callbackParam)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
|
||||
assert(handle);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
uartHandle->callbackParam = callbackParam;
|
||||
uartHandle->callback = callback;
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartTransferReceiveNonBlocking(hal_uart_handle_t handle, hal_uart_transfer_t *transfer)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
status_t status;
|
||||
assert(handle);
|
||||
assert(transfer);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
status = USART_TransferReceiveNonBlocking(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle,
|
||||
(usart_transfer_t *)transfer, NULL);
|
||||
|
||||
return HAL_UartGetStatus(status);
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartTransferSendNonBlocking(hal_uart_handle_t handle, hal_uart_transfer_t *transfer)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
status_t status;
|
||||
assert(handle);
|
||||
assert(transfer);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
status = USART_TransferSendNonBlocking(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle,
|
||||
(usart_transfer_t *)transfer);
|
||||
|
||||
return HAL_UartGetStatus(status);
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartTransferGetReceiveCount(hal_uart_handle_t handle, uint32_t *count)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
status_t status;
|
||||
assert(handle);
|
||||
assert(count);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
status =
|
||||
USART_TransferGetReceiveCount(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle, count);
|
||||
|
||||
return HAL_UartGetStatus(status);
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartTransferGetSendCount(hal_uart_handle_t handle, uint32_t *count)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
status_t status;
|
||||
assert(handle);
|
||||
assert(count);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
status = USART_TransferGetSendCount(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle, count);
|
||||
|
||||
return HAL_UartGetStatus(status);
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartTransferAbortReceive(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
USART_TransferAbortReceive(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle);
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartTransferAbortSend(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
USART_TransferAbortSend(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle);
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/* None transactional API with non-blocking mode. */
|
||||
hal_uart_status_t HAL_UartInstallCallback(hal_uart_handle_t handle,
|
||||
hal_uart_transfer_callback_t callback,
|
||||
void *callbackParam)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
|
||||
assert(handle);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
uartHandle->callbackParam = callbackParam;
|
||||
uartHandle->callback = callback;
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartReceiveNonBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(data);
|
||||
assert(length);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
if (NULL != uartHandle->rx.buffer)
|
||||
{
|
||||
return kStatus_HAL_UartRxBusy;
|
||||
}
|
||||
|
||||
uartHandle->rx.bufferLength = length;
|
||||
uartHandle->rx.bufferSofar = 0;
|
||||
uartHandle->rx.buffer = data;
|
||||
USART_EnableInterrupts(s_UsartAdapterBase[uartHandle->instance], USART_FIFOINTENSET_RXLVL_MASK);
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartSendNonBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(data);
|
||||
assert(length);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
if (NULL != uartHandle->tx.buffer)
|
||||
{
|
||||
return kStatus_HAL_UartTxBusy;
|
||||
}
|
||||
uartHandle->tx.bufferLength = length;
|
||||
uartHandle->tx.bufferSofar = 0;
|
||||
uartHandle->tx.buffer = (volatile uint8_t *)data;
|
||||
USART_EnableInterrupts(s_UsartAdapterBase[uartHandle->instance], USART_FIFOINTENSET_TXLVL_MASK);
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartGetReceiveCount(hal_uart_handle_t handle, uint32_t *reCount)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(reCount);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
if (NULL != uartHandle->rx.buffer)
|
||||
{
|
||||
*reCount = uartHandle->rx.bufferSofar;
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
return kStatus_HAL_UartError;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartGetSendCount(hal_uart_handle_t handle, uint32_t *seCount)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(seCount);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
if (NULL != uartHandle->tx.buffer)
|
||||
{
|
||||
*seCount = uartHandle->tx.bufferSofar;
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
return kStatus_HAL_UartError;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartAbortReceive(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
if (NULL != uartHandle->rx.buffer)
|
||||
{
|
||||
USART_DisableInterrupts(s_UsartAdapterBase[uartHandle->instance],
|
||||
USART_FIFOINTENCLR_RXLVL_MASK | USART_FIFOINTENCLR_RXERR_MASK);
|
||||
uartHandle->rx.buffer = NULL;
|
||||
}
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
hal_uart_status_t HAL_UartAbortSend(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
if (NULL != uartHandle->tx.buffer)
|
||||
{
|
||||
USART_DisableInterrupts(s_UsartAdapterBase[uartHandle->instance], USART_FIFOINTENCLR_TXLVL_MASK);
|
||||
uartHandle->tx.buffer = NULL;
|
||||
}
|
||||
|
||||
return kStatus_HAL_UartSuccess;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
|
||||
|
||||
void HAL_UartIsrFunction(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(0U != HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
#if 0
|
||||
DisableIRQ(s_UsartIRQ[uartHandle->instance]);
|
||||
#endif
|
||||
USART_TransferHandleIRQ(s_UsartAdapterBase[uartHandle->instance], &uartHandle->hardwareHandle);
|
||||
#if 0
|
||||
NVIC_SetPriority((IRQn_Type)s_UsartIRQ[uartHandle->instance], HAL_UART_ISR_PRIORITY);
|
||||
EnableIRQ(s_UsartIRQ[uartHandle->instance]);
|
||||
#endif
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void HAL_UartIsrFunction(hal_uart_handle_t handle)
|
||||
{
|
||||
hal_uart_state_t *uartHandle;
|
||||
assert(handle);
|
||||
assert(0U == HAL_UART_TRANSFER_MODE);
|
||||
|
||||
uartHandle = (hal_uart_state_t *)handle;
|
||||
|
||||
#if 0
|
||||
DisableIRQ(s_UsartIRQ[uartHandle->instance]);
|
||||
#endif
|
||||
HAL_UartInterruptHandle(s_UsartAdapterBase[uartHandle->instance], (void *)uartHandle);
|
||||
#if 0
|
||||
NVIC_SetPriority((IRQn_Type)s_UsartIRQ[uartHandle->instance], HAL_UART_ISR_PRIORITY);
|
||||
EnableIRQ(s_UsartIRQ[uartHandle->instance]);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
12100
device/LPC54114_cm4.h
Normal file
12100
device/LPC54114_cm4.h
Normal file
File diff suppressed because it is too large
Load Diff
255
device/LPC54114_cm4_features.h
Normal file
255
device/LPC54114_cm4_features.h
Normal file
@@ -0,0 +1,255 @@
|
||||
/*
|
||||
** ###################################################################
|
||||
** Version: rev. 1.0, 2016-05-09
|
||||
** Build: b190225
|
||||
**
|
||||
** Abstract:
|
||||
** Chip specific module features.
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2019 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** Revisions:
|
||||
** - rev. 1.0 (2016-05-09)
|
||||
** Initial version.
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#ifndef _LPC54114_cm4_FEATURES_H_
|
||||
#define _LPC54114_cm4_FEATURES_H_
|
||||
|
||||
/* SOC module features */
|
||||
|
||||
/* @brief ADC availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_ADC_COUNT (1)
|
||||
/* @brief ASYNC_SYSCON availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1)
|
||||
/* @brief CRC availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_CRC_COUNT (1)
|
||||
/* @brief CTIMER availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_CTIMER_COUNT (5)
|
||||
/* @brief DMA availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_DMA_COUNT (1)
|
||||
/* @brief DMIC availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_DMIC_COUNT (1)
|
||||
/* @brief FLEXCOMM availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_FLEXCOMM_COUNT (8)
|
||||
/* @brief GINT availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_GINT_COUNT (2)
|
||||
/* @brief GPIO availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_GPIO_COUNT (1)
|
||||
/* @brief I2C availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_I2C_COUNT (8)
|
||||
/* @brief I2S availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_I2S_COUNT (2)
|
||||
/* @brief INPUTMUX availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_INPUTMUX_COUNT (1)
|
||||
/* @brief IOCON availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_IOCON_COUNT (1)
|
||||
/* @brief MAILBOX availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_MAILBOX_COUNT (1)
|
||||
/* @brief MRT availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_MRT_COUNT (1)
|
||||
/* @brief PINT availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_PINT_COUNT (1)
|
||||
/* @brief RTC availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_RTC_COUNT (1)
|
||||
/* @brief SCT availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_SCT_COUNT (1)
|
||||
/* @brief SPI availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_SPI_COUNT (8)
|
||||
/* @brief SPIFI availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_SPIFI_COUNT (1)
|
||||
/* @brief SYSCON availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_SYSCON_COUNT (1)
|
||||
/* @brief USART availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_USART_COUNT (8)
|
||||
/* @brief USB availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_USB_COUNT (1)
|
||||
/* @brief UTICK availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_UTICK_COUNT (1)
|
||||
/* @brief WWDT availability on the SoC. */
|
||||
#define FSL_FEATURE_SOC_WWDT_COUNT (1)
|
||||
|
||||
/* ADC module features */
|
||||
|
||||
/* @brief Do not has input select (register INSEL). */
|
||||
#define FSL_FEATURE_ADC_HAS_NO_INSEL (0)
|
||||
/* @brief Has ASYNMODE bitfile in CTRL reigster. */
|
||||
#define FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE (1)
|
||||
/* @brief Has ASYNMODE bitfile in CTRL reigster. */
|
||||
#define FSL_FEATURE_ADC_HAS_CTRL_RESOL (1)
|
||||
/* @brief Has ASYNMODE bitfile in CTRL reigster. */
|
||||
#define FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL (1)
|
||||
/* @brief Has ASYNMODE bitfile in CTRL reigster. */
|
||||
#define FSL_FEATURE_ADC_HAS_CTRL_TSAMP (1)
|
||||
/* @brief Has ASYNMODE bitfile in CTRL reigster. */
|
||||
#define FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE (0)
|
||||
/* @brief Has ASYNMODE bitfile in CTRL reigster. */
|
||||
#define FSL_FEATURE_ADC_HAS_CTRL_CALMODE (0)
|
||||
/* @brief Has startup register. */
|
||||
#define FSL_FEATURE_ADC_HAS_STARTUP_REG (1)
|
||||
/* @brief Has ADTrim register */
|
||||
#define FSL_FEATURE_ADC_HAS_TRIM_REG (0)
|
||||
/* @brief Has Calibration register. */
|
||||
#define FSL_FEATURE_ADC_HAS_CALIB_REG (1)
|
||||
|
||||
/* DMA module features */
|
||||
|
||||
/* @brief Number of channels */
|
||||
#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (20)
|
||||
/* @brief Align size of DMA descriptor */
|
||||
#define FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE (512)
|
||||
/* @brief DMA head link descriptor table align size */
|
||||
#define FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE (16U)
|
||||
|
||||
/* FLEXCOMM module features */
|
||||
|
||||
/* @brief FLEXCOMM0 USART INDEX 0 */
|
||||
#define FSL_FEATURE_FLEXCOMM0_USART_INDEX (0)
|
||||
/* @brief FLEXCOMM0 SPI INDEX 0 */
|
||||
#define FSL_FEATURE_FLEXCOMM0_SPI_INDEX (0)
|
||||
/* @brief FLEXCOMM0 I2C INDEX 0 */
|
||||
#define FSL_FEATURE_FLEXCOMM0_I2C_INDEX (0)
|
||||
/* @brief FLEXCOMM1 USART INDEX 1 */
|
||||
#define FSL_FEATURE_FLEXCOMM1_USART_INDEX (1)
|
||||
/* @brief FLEXCOMM1 SPI INDEX 1 */
|
||||
#define FSL_FEATURE_FLEXCOMM1_SPI_INDEX (1)
|
||||
/* @brief FLEXCOMM1 I2C INDEX 1 */
|
||||
#define FSL_FEATURE_FLEXCOMM1_I2C_INDEX (1)
|
||||
/* @brief FLEXCOMM2 USART INDEX 2 */
|
||||
#define FSL_FEATURE_FLEXCOMM2_USART_INDEX (2)
|
||||
/* @brief FLEXCOMM2 SPI INDEX 2 */
|
||||
#define FSL_FEATURE_FLEXCOMM2_SPI_INDEX (2)
|
||||
/* @brief FLEXCOMM2 I2C INDEX 2 */
|
||||
#define FSL_FEATURE_FLEXCOMM2_I2C_INDEX (2)
|
||||
/* @brief FLEXCOMM3 USART INDEX 3 */
|
||||
#define FSL_FEATURE_FLEXCOMM3_USART_INDEX (3)
|
||||
/* @brief FLEXCOMM3 SPI INDEX 3 */
|
||||
#define FSL_FEATURE_FLEXCOMM3_SPI_INDEX (3)
|
||||
/* @brief FLEXCOMM3 I2C INDEX 3 */
|
||||
#define FSL_FEATURE_FLEXCOMM3_I2C_INDEX (3)
|
||||
/* @brief FLEXCOMM4 USART INDEX 4 */
|
||||
#define FSL_FEATURE_FLEXCOMM4_USART_INDEX (4)
|
||||
/* @brief FLEXCOMM4 SPI INDEX 4 */
|
||||
#define FSL_FEATURE_FLEXCOMM4_SPI_INDEX (4)
|
||||
/* @brief FLEXCOMM4 I2C INDEX 4 */
|
||||
#define FSL_FEATURE_FLEXCOMM4_I2C_INDEX (4)
|
||||
/* @brief FLEXCOMM5 USART INDEX 5 */
|
||||
#define FSL_FEATURE_FLEXCOMM5_USART_INDEX (5)
|
||||
/* @brief FLEXCOMM5 SPI INDEX 5 */
|
||||
#define FSL_FEATURE_FLEXCOMM5_SPI_INDEX (5)
|
||||
/* @brief FLEXCOMM5 I2C INDEX 5 */
|
||||
#define FSL_FEATURE_FLEXCOMM5_I2C_INDEX (5)
|
||||
/* @brief FLEXCOMM6 USART INDEX 6 */
|
||||
#define FSL_FEATURE_FLEXCOMM6_USART_INDEX (6)
|
||||
/* @brief FLEXCOMM6 SPI INDEX 6 */
|
||||
#define FSL_FEATURE_FLEXCOMM6_SPI_INDEX (6)
|
||||
/* @brief FLEXCOMM6 I2C INDEX 6 */
|
||||
#define FSL_FEATURE_FLEXCOMM6_I2C_INDEX (6)
|
||||
/* @brief FLEXCOMM7 I2S INDEX 0 */
|
||||
#define FSL_FEATURE_FLEXCOMM6_I2S_INDEX (0)
|
||||
/* @brief FLEXCOMM7 USART INDEX 7 */
|
||||
#define FSL_FEATURE_FLEXCOMM7_USART_INDEX (7)
|
||||
/* @brief FLEXCOMM7 SPI INDEX 7 */
|
||||
#define FSL_FEATURE_FLEXCOMM7_SPI_INDEX (7)
|
||||
/* @brief FLEXCOMM7 I2C INDEX 7 */
|
||||
#define FSL_FEATURE_FLEXCOMM7_I2C_INDEX (7)
|
||||
/* @brief FLEXCOMM7 I2S INDEX 1 */
|
||||
#define FSL_FEATURE_FLEXCOMM7_I2S_INDEX (1)
|
||||
/* @brief I2S has DMIC interconnection */
|
||||
#define FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_HAS_DMIC_INTERCONNECTIONn(x) \
|
||||
(((x) == FLEXCOMM0) ? (0) : \
|
||||
(((x) == FLEXCOMM1) ? (0) : \
|
||||
(((x) == FLEXCOMM2) ? (0) : \
|
||||
(((x) == FLEXCOMM3) ? (0) : \
|
||||
(((x) == FLEXCOMM4) ? (0) : \
|
||||
(((x) == FLEXCOMM5) ? (0) : \
|
||||
(((x) == FLEXCOMM6) ? (0) : \
|
||||
(((x) == FLEXCOMM7) ? (1) : (-1)))))))))
|
||||
|
||||
/* I2S module features */
|
||||
|
||||
/* @brief I2S support dual channel transfer */
|
||||
#define FSL_FEATURE_I2S_SUPPORT_SECONDARY_CHANNEL (0)
|
||||
/* @brief I2S has DMIC interconnection */
|
||||
#define FSL_FEATURE_FLEXCOMM_I2S_HAS_DMIC_INTERCONNECTION (1)
|
||||
|
||||
/* MAILBOX module features */
|
||||
|
||||
/* @brief Mailbox side for current core */
|
||||
#define FSL_FEATURE_MAILBOX_SIDE_A (1)
|
||||
/* @brief Mailbox has no reset control */
|
||||
#define FSL_FEATURE_MAILBOX_HAS_NO_RESET (1)
|
||||
|
||||
/* MRT module features */
|
||||
|
||||
/* @brief number of channels. */
|
||||
#define FSL_FEATURE_MRT_NUMBER_OF_CHANNELS (4)
|
||||
|
||||
/* interrupt module features */
|
||||
|
||||
/* @brief Lowest interrupt request number. */
|
||||
#define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
|
||||
/* @brief Highest interrupt request number. */
|
||||
#define FSL_FEATURE_INTERRUPT_IRQ_MAX (105)
|
||||
|
||||
/* PINT module features */
|
||||
|
||||
/* @brief Number of connected outputs */
|
||||
#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8)
|
||||
|
||||
/* RTC module features */
|
||||
|
||||
/* @brief RTC has no reset control */
|
||||
#define FSL_FEATURE_RTC_HAS_NO_RESET (1)
|
||||
|
||||
/* SCT module features */
|
||||
|
||||
/* @brief Number of events */
|
||||
#define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10)
|
||||
/* @brief Number of states */
|
||||
#define FSL_FEATURE_SCT_NUMBER_OF_STATES (10)
|
||||
/* @brief Number of match capture */
|
||||
#define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10)
|
||||
/* @brief Number of outputs */
|
||||
#define FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS (8)
|
||||
|
||||
/* SYSCON module features */
|
||||
|
||||
/* @brief Pointer to ROM IAP entry functions */
|
||||
#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205)
|
||||
/* @brief Flash page size in bytes */
|
||||
#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256)
|
||||
/* @brief Flash sector size in bytes */
|
||||
#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
|
||||
/* @brief Flash size in bytes */
|
||||
#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (262144)
|
||||
/* @brief IAP has Flash read & write function */
|
||||
#define FSL_FEATURE_IAP_HAS_FLASH_FUNCTION (1)
|
||||
/* @brief IAP has read Flash signature function */
|
||||
#define FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ (1)
|
||||
/* @brief IAP has read extended Flash signature function */
|
||||
#define FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ (0)
|
||||
|
||||
/* SysTick module features */
|
||||
|
||||
/* @brief Systick has external reference clock. */
|
||||
#define FSL_FEATURE_SYSTICK_HAS_EXT_REF (0)
|
||||
/* @brief Systick external reference clock is core clock divided by this value. */
|
||||
#define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (0)
|
||||
|
||||
/* USB module features */
|
||||
|
||||
/* @brief Number of the endpoint in USB FS */
|
||||
#define FSL_FEATURE_USB_EP_NUM (5)
|
||||
|
||||
#endif /* _LPC54114_cm4_FEATURES_H_ */
|
||||
|
||||
43
device/fsl_device_registers.h
Normal file
43
device/fsl_device_registers.h
Normal file
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright 2014-2016 Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __FSL_DEVICE_REGISTERS_H__
|
||||
#define __FSL_DEVICE_REGISTERS_H__
|
||||
|
||||
/*
|
||||
* Include the cpu specific register header files.
|
||||
*
|
||||
* The CPU macro should be declared in the project or makefile.
|
||||
*/
|
||||
#if (defined(CPU_LPC54114J256BD64_cm4) || defined(CPU_LPC54114J256UK49_cm4))
|
||||
|
||||
#define LPC54114_cm4_SERIES
|
||||
|
||||
/* CMSIS-style register definitions */
|
||||
#include "LPC54114_cm4.h"
|
||||
/* CPU specific feature definitions */
|
||||
#include "LPC54114_cm4_features.h"
|
||||
|
||||
#elif (defined(CPU_LPC54114J256BD64_cm0plus) || defined(CPU_LPC54114J256UK49_cm0plus))
|
||||
|
||||
#define LPC54114_cm0plus_SERIES
|
||||
|
||||
/* CMSIS-style register definitions */
|
||||
#include "LPC54114_cm0plus.h"
|
||||
/* CPU specific feature definitions */
|
||||
#include "LPC54114_cm0plus_features.h"
|
||||
|
||||
#else
|
||||
#error "No valid CPU defined!"
|
||||
#endif
|
||||
|
||||
#endif /* __FSL_DEVICE_REGISTERS_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
355
device/system_LPC54114_cm4.c
Normal file
355
device/system_LPC54114_cm4.c
Normal file
@@ -0,0 +1,355 @@
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC54114J256BD64_cm4
|
||||
** LPC54114J256UK49_cm4
|
||||
**
|
||||
** Compilers: Keil ARM C/C++ Compiler
|
||||
** GNU C Compiler
|
||||
** IAR ANSI C/C++ Compiler for ARM
|
||||
** MCUXpresso Compiler
|
||||
**
|
||||
** Reference manual: LPC5411x User manual Rev. 1.1 25 May 2016
|
||||
** Version: rev. 1.0, 2016-04-29
|
||||
** Build: b180802
|
||||
**
|
||||
** Abstract:
|
||||
** Provides a system configuration function and a global variable that
|
||||
** contains the system frequency. It configures the device and initializes
|
||||
** the oscillator (PLL) that is part of the microcontroller device.
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2018 NXP
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** Revisions:
|
||||
** - rev. 1.0 (2016-04-29)
|
||||
** Initial version.
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @file LPC54114_cm4
|
||||
* @version 1.0
|
||||
* @date 2016-04-29
|
||||
* @brief Device specific configuration file for LPC54114_cm4 (implementation
|
||||
* file)
|
||||
*
|
||||
* Provides a system configuration function and a global variable that contains
|
||||
* the system frequency. It configures the device and initializes the oscillator
|
||||
* (PLL) that is part of the microcontroller device.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include "fsl_device_registers.h"
|
||||
|
||||
#define NVALMAX (0x100U)
|
||||
#define PVALMAX (0x20U)
|
||||
#define MVALMAX (0x8000U)
|
||||
#define PLL_SSCG0_MDEC_VAL_P (0U) /* MDEC is in bits 16 downto 0 */
|
||||
#define PLL_SSCG0_MDEC_VAL_M (0x1FFFFUL << PLL_SSCG0_MDEC_VAL_P) /* NDEC is in bits 9 downto 0 */
|
||||
#define PLL_NDEC_VAL_P (0U) /* NDEC is in bits 9:0 */
|
||||
#define PLL_NDEC_VAL_M (0x3FFUL << PLL_NDEC_VAL_P)
|
||||
#define PLL_PDEC_VAL_P (0U) /* PDEC is in bits 6:0 */
|
||||
#define PLL_PDEC_VAL_M (0x3FFUL << PLL_PDEC_VAL_P)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Core clock
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
|
||||
|
||||
static const uint8_t wdtFreqLookup[32] = {0, 8, 12, 15, 18, 20, 24, 26, 28, 30, 32, 34, 36, 38, 40, 41,
|
||||
42, 44, 45, 46, 48, 49, 50, 52, 53, 54, 56, 57, 58, 59, 60, 61};
|
||||
|
||||
static uint32_t GetWdtOscFreq(void)
|
||||
{
|
||||
uint8_t freq_sel;
|
||||
uint32_t div_sel;
|
||||
div_sel = ((SYSCON->WDTOSCCTRL & SYSCON_WDTOSCCTRL_DIVSEL_MASK) + 1U) << 1U;
|
||||
freq_sel =
|
||||
wdtFreqLookup[((SYSCON->WDTOSCCTRL & SYSCON_WDTOSCCTRL_FREQSEL_MASK) >> SYSCON_WDTOSCCTRL_FREQSEL_SHIFT)];
|
||||
return ((uint32_t)freq_sel * 50000U) / div_sel;
|
||||
}
|
||||
|
||||
/* Find decoded N value for raw NDEC value */
|
||||
static uint32_t pllDecodeN(uint32_t NDEC)
|
||||
{
|
||||
uint32_t n, x, i;
|
||||
|
||||
/* Find NDec */
|
||||
switch (NDEC)
|
||||
{
|
||||
case 0xFFFU:
|
||||
n = 0U;
|
||||
break;
|
||||
case 0x302U:
|
||||
n = 1U;
|
||||
break;
|
||||
case 0x202U:
|
||||
n = 2U;
|
||||
break;
|
||||
default:
|
||||
x = 0x080U;
|
||||
n = 0xFFFFFFFFU;
|
||||
for (i = NVALMAX; i >= 3U; i--)
|
||||
{
|
||||
x = (((x ^ (x >> 2U) ^ (x >> 3U) ^ (x >> 4U)) & 1U) << 7U) | ((x >> 1U) & 0x7FU);
|
||||
if ((x & (PLL_NDEC_VAL_M >> PLL_NDEC_VAL_P)) == NDEC)
|
||||
{
|
||||
/* Decoded value of NDEC */
|
||||
n = i;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
||||
/* Find decoded P value for raw PDEC value */
|
||||
static uint32_t pllDecodeP(uint32_t PDEC)
|
||||
{
|
||||
uint32_t p, x, i;
|
||||
/* Find PDec */
|
||||
switch (PDEC)
|
||||
{
|
||||
case 0xFFU:
|
||||
p = 0U;
|
||||
break;
|
||||
case 0x62U:
|
||||
p = 1U;
|
||||
break;
|
||||
case 0x42U:
|
||||
p = 2U;
|
||||
break;
|
||||
default:
|
||||
x = 0x10U;
|
||||
p = 0xFFFFFFFFU;
|
||||
for (i = PVALMAX; i >= 3U; i--)
|
||||
{
|
||||
x = (((x ^ (x >> 2U)) & 1U) << 4U) | ((x >> 1U) & 0xFU);
|
||||
if ((x & (PLL_PDEC_VAL_M >> PLL_PDEC_VAL_P)) == PDEC)
|
||||
{
|
||||
/* Decoded value of PDEC */
|
||||
p = i;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
return p;
|
||||
}
|
||||
|
||||
/* Find decoded M value for raw MDEC value */
|
||||
static uint32_t pllDecodeM(uint32_t MDEC)
|
||||
{
|
||||
uint32_t m, i, x;
|
||||
|
||||
/* Find MDec */
|
||||
switch (MDEC)
|
||||
{
|
||||
case 0xFFFFFU:
|
||||
m = 0U;
|
||||
break;
|
||||
case 0x18003U:
|
||||
m = 1U;
|
||||
break;
|
||||
case 0x10003U:
|
||||
m = 2U;
|
||||
break;
|
||||
default:
|
||||
x = 0x04000U;
|
||||
m = 0xFFFFFFFFU;
|
||||
for (i = MVALMAX; i >= 3U; i--)
|
||||
{
|
||||
x = (((x ^ (x >> 1U)) & 1U) << 14U) | ((x >> 1U) & 0x3FFFU);
|
||||
if ((x & (PLL_SSCG0_MDEC_VAL_M >> PLL_SSCG0_MDEC_VAL_P)) == MDEC)
|
||||
{
|
||||
/* Decoded value of MDEC */
|
||||
m = i;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
return m;
|
||||
}
|
||||
|
||||
/* Get predivider (N) from PLL NDEC setting */
|
||||
static uint32_t findPllPreDiv(uint32_t ctrlReg, uint32_t nDecReg)
|
||||
{
|
||||
uint32_t preDiv = 1U;
|
||||
|
||||
/* Direct input is not used? */
|
||||
if ((ctrlReg & SYSCON_SYSPLLCTRL_DIRECTI_MASK) == 0U)
|
||||
{
|
||||
/* Decode NDEC value to get (N) pre divider */
|
||||
preDiv = pllDecodeN(nDecReg & 0x3FFU);
|
||||
if (preDiv == 0U)
|
||||
{
|
||||
preDiv = 1U;
|
||||
}
|
||||
}
|
||||
/* Adjusted by 1, directi is used to bypass */
|
||||
return preDiv;
|
||||
}
|
||||
|
||||
/* Get postdivider (P) from PLL PDEC setting */
|
||||
static uint32_t findPllPostDiv(uint32_t ctrlReg, uint32_t pDecReg)
|
||||
{
|
||||
uint32_t postDiv = 1U;
|
||||
|
||||
/* Direct input is not used? */
|
||||
if ((ctrlReg & SYSCON_SYSPLLCTRL_DIRECTO_MASK) == 0U)
|
||||
{
|
||||
/* Decode PDEC value to get (P) post divider */
|
||||
postDiv = 2U * pllDecodeP(pDecReg & 0x7FU);
|
||||
if (postDiv == 0U)
|
||||
{
|
||||
postDiv = 2U;
|
||||
}
|
||||
}
|
||||
/* Adjusted by 1, directo is used to bypass */
|
||||
return postDiv;
|
||||
}
|
||||
|
||||
/* Get multiplier (M) from PLL MDEC and BYPASS_FBDIV2 settings */
|
||||
static uint32_t findPllMMult(uint32_t ctrlReg, uint32_t mDecReg)
|
||||
{
|
||||
uint32_t mMult = 1U;
|
||||
|
||||
/* Decode MDEC value to get (M) multiplier */
|
||||
mMult = pllDecodeM(mDecReg & 0x1FFFFU);
|
||||
/* Extra multiply by 2 needed? */
|
||||
if ((ctrlReg & SYSCON_SYSPLLCTRL_BYPASSCCODIV2_MASK) == 0U)
|
||||
{
|
||||
mMult = mMult << 1U;
|
||||
}
|
||||
if (mMult == 0U)
|
||||
{
|
||||
mMult = 1U;
|
||||
}
|
||||
return mMult;
|
||||
}
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SystemInit()
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) || (defined(__VFP_FP__) && !defined(__SOFTFP__))
|
||||
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access */
|
||||
#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
|
||||
extern void *__Vectors;
|
||||
SCB->VTOR = (uint32_t)&__Vectors;
|
||||
/* Optionally enable RAM banks that may be off by default at reset */
|
||||
#if !defined(DONT_ENABLE_DISABLED_RAMBANKS)
|
||||
SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM2_MASK;
|
||||
#endif
|
||||
|
||||
SystemInitHook();
|
||||
}
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SystemCoreClockUpdate()
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t clkRate = 0U;
|
||||
uint32_t prediv, postdiv;
|
||||
uint32_t bypassccodiv2;
|
||||
uint64_t workRate;
|
||||
|
||||
switch (SYSCON->MAINCLKSELB & SYSCON_MAINCLKSELB_SEL_MASK)
|
||||
{
|
||||
case 0x00U: /* MAINCLKSELA clock (main_clk_a)*/
|
||||
switch (SYSCON->MAINCLKSELA & SYSCON_MAINCLKSELA_SEL_MASK)
|
||||
{
|
||||
case 0x00U: /* FRO 12 MHz (fro_12m) */
|
||||
clkRate = CLK_FRO_12MHZ;
|
||||
break;
|
||||
case 0x01U: /* CLKIN (clk_in) */
|
||||
clkRate = CLK_CLK_IN;
|
||||
break;
|
||||
case 0x02U: /* Watchdog oscillator (wdt_clk) */
|
||||
clkRate = GetWdtOscFreq();
|
||||
break;
|
||||
default: /* = 0x03 = FRO 96 or 48 MHz (fro_hf) */
|
||||
if ((SYSCON->FROCTRL & SYSCON_FROCTRL_SEL_MASK) == SYSCON_FROCTRL_SEL_MASK)
|
||||
{
|
||||
clkRate = CLK_FRO_96MHZ;
|
||||
}
|
||||
else
|
||||
{
|
||||
clkRate = CLK_FRO_48MHZ;
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 0x02U: /* System PLL clock (pll_clk)*/
|
||||
switch (SYSCON->SYSPLLCLKSEL & SYSCON_SYSPLLCLKSEL_SEL_MASK)
|
||||
{
|
||||
case 0x00U: /* FRO 12 MHz (fro_12m) */
|
||||
clkRate = CLK_FRO_12MHZ;
|
||||
break;
|
||||
case 0x01U: /* CLKIN (clk_in) */
|
||||
clkRate = CLK_CLK_IN;
|
||||
break;
|
||||
case 0x02U: /* Watchdog oscillator (wdt_clk) */
|
||||
clkRate = GetWdtOscFreq();
|
||||
break;
|
||||
case 0x03U: /* RTC oscillator 32 kHz output (32k_clk) */
|
||||
clkRate = CLK_RTC_32K_CLK;
|
||||
break;
|
||||
default:
|
||||
clkRate = 0U;
|
||||
break;
|
||||
}
|
||||
if ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_BYPASS_MASK) == 0U)
|
||||
{
|
||||
/* PLL is not in bypass mode, get pre-divider, post-divider, and M divider */
|
||||
prediv = findPllPreDiv(SYSCON->SYSPLLCTRL, SYSCON->SYSPLLNDEC);
|
||||
postdiv = findPllPostDiv(SYSCON->SYSPLLCTRL, SYSCON->SYSPLLPDEC);
|
||||
/* Adjust input clock */
|
||||
clkRate = clkRate / prediv;
|
||||
/* If using the SS, use the multiplier */
|
||||
if ((SYSCON->SYSPLLSSCTRL0 & SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK) == SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK)
|
||||
{
|
||||
/* MDEC used for rate */
|
||||
workRate = (uint64_t)clkRate * (uint64_t)findPllMMult(SYSCON->SYSPLLCTRL, SYSCON->SYSPLLSSCTRL0);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SS multipler used for rate */
|
||||
workRate = 0UL;
|
||||
/* Adjust by fractional */
|
||||
bypassccodiv2 = (uint32_t)((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_BYPASSCCODIV2_MASK) >>
|
||||
SYSCON_SYSPLLCTRL_BYPASSCCODIV2_SHIFT);
|
||||
workRate = (2UL - bypassccodiv2) * (uint64_t)(clkRate) *
|
||||
((SYSCON->SYSPLLSSCTRL1 & 0x7FFFFUL) >> 11UL);
|
||||
}
|
||||
clkRate = (uint32_t)workRate / postdiv;
|
||||
}
|
||||
break;
|
||||
case 0x03U: /* RTC oscillator 32 kHz output (32k_clk) */
|
||||
clkRate = CLK_RTC_32K_CLK;
|
||||
break;
|
||||
default:
|
||||
clkRate = 0U;
|
||||
break;
|
||||
}
|
||||
SystemCoreClock = (uint32_t)(clkRate / ((uint64_t)(SYSCON->AHBCLKDIV & 0xFFUL) + 1UL));
|
||||
}
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SystemInitHook()
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
__attribute__((weak)) void SystemInitHook(void)
|
||||
{
|
||||
/* Void implementation of the weak function. */
|
||||
}
|
||||
109
device/system_LPC54114_cm4.h
Normal file
109
device/system_LPC54114_cm4.h
Normal file
@@ -0,0 +1,109 @@
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC54114J256BD64_cm4
|
||||
** LPC54114J256UK49_cm4
|
||||
**
|
||||
** Compilers: Keil ARM C/C++ Compiler
|
||||
** GNU C Compiler
|
||||
** IAR ANSI C/C++ Compiler for ARM
|
||||
** MCUXpresso Compiler
|
||||
**
|
||||
** Reference manual: LPC5411x User manual Rev. 1.1 25 May 2016
|
||||
** Version: rev. 1.0, 2016-04-29
|
||||
** Build: b180802
|
||||
**
|
||||
** Abstract:
|
||||
** Provides a system configuration function and a global variable that
|
||||
** contains the system frequency. It configures the device and initializes
|
||||
** the oscillator (PLL) that is part of the microcontroller device.
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2018 NXP
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** Revisions:
|
||||
** - rev. 1.0 (2016-04-29)
|
||||
** Initial version.
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @file LPC54114_cm4
|
||||
* @version 1.0
|
||||
* @date 2016-04-29
|
||||
* @brief Device specific configuration file for LPC54114_cm4 (header file)
|
||||
*
|
||||
* Provides a system configuration function and a global variable that contains
|
||||
* the system frequency. It configures the device and initializes the oscillator
|
||||
* (PLL) that is part of the microcontroller device.
|
||||
*/
|
||||
|
||||
#ifndef _SYSTEM_LPC54114_cm4_H_
|
||||
#define _SYSTEM_LPC54114_cm4_H_ /**< Symbol preventing repeated inclusion */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
#define DEFAULT_SYSTEM_CLOCK 12000000u /* Default System clock value */
|
||||
#define CLK_RTC_32K_CLK 32768u /* RTC oscillator 32 kHz output (32k_clk */
|
||||
#define CLK_FRO_12MHZ 12000000u /* FRO 12 MHz (fro_12m) */
|
||||
#define CLK_FRO_48MHZ 48000000u /* FRO 48 MHz (fro_48m) */
|
||||
#define CLK_FRO_96MHZ 96000000u /* FRO 96 MHz (fro_96m) */
|
||||
#define CLK_CLK_IN 0u /* Default CLK_IN pin clock */
|
||||
|
||||
|
||||
/**
|
||||
* @brief System clock frequency (core clock)
|
||||
*
|
||||
* The system clock frequency supplied to the SysTick timer and the processor
|
||||
* core clock. This variable can be used by the user application to setup the
|
||||
* SysTick timer or configure other parameters. It may also be used by debugger to
|
||||
* query the frequency of the debug timer or configure the trace clock speed
|
||||
* SystemCoreClock is initialized with a correct predefined value.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
*
|
||||
* Typically this function configures the oscillator (PLL) that is part of the
|
||||
* microcontroller device. For systems with variable clock speed it also updates
|
||||
* the variable SystemCoreClock. SystemInit is called from startup_device file.
|
||||
*/
|
||||
void SystemInit (void);
|
||||
|
||||
/**
|
||||
* @brief Updates the SystemCoreClock variable.
|
||||
*
|
||||
* It must be called whenever the core clock is changed during program
|
||||
* execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
|
||||
* the current core clock.
|
||||
*/
|
||||
void SystemCoreClockUpdate (void);
|
||||
|
||||
/**
|
||||
* @brief SystemInit function hook.
|
||||
*
|
||||
* This weak function allows to call specific initialization code during the
|
||||
* SystemInit() execution.This can be used when an application specific code needs
|
||||
* to be called as close to the reset entry as possible (for example the Multicore
|
||||
* Manager MCMGR_EarlyInit() function call).
|
||||
* NOTE: No global r/w variables can be used in this hook function because the
|
||||
* initialization of these variables happens after this function.
|
||||
*/
|
||||
void SystemInitHook (void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SYSTEM_LPC54114_cm4_H_ */
|
||||
55
doc/readme.txt
Normal file
55
doc/readme.txt
Normal file
@@ -0,0 +1,55 @@
|
||||
Overview
|
||||
========
|
||||
The spi_polling_board2board_master example shows how to use spi driver as master to do board to board transfer with
|
||||
polling:
|
||||
|
||||
In this example, one spi instance as master and another spi instance on othereboard as slave. Master sends a piece of
|
||||
data to slave, and receive a piece of data from slave. This example checks if the data received from slave is correct.
|
||||
|
||||
Toolchain supported
|
||||
===================
|
||||
- IAR embedded Workbench 8.50.9
|
||||
- Keil MDK 5.33
|
||||
- MCUXpresso 11.3.0
|
||||
- GCC ARM Embedded 9.3.1
|
||||
|
||||
Hardware requirements
|
||||
=====================
|
||||
- Micro USB cable
|
||||
- LPCXpresso54114 board
|
||||
- Personal Computer
|
||||
|
||||
Board settings
|
||||
==============
|
||||
Populate jumper JP6.
|
||||
Connect SPI master on board to SPI slave on other board
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Master - SPI3
|
||||
Pin Name Board Location
|
||||
MISO J4 pin 3
|
||||
MOSI J4 pin 2
|
||||
SCK J4 pin 4
|
||||
PCS2 J4 pin 7
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Prepare the Demo
|
||||
================
|
||||
1. Connect a micro USB cable between the PC host and the CMSIS DAP USB port (J7) on the board
|
||||
2. Open a serial terminal with the following settings (See Appendix A in Getting started guide for description how to determine serial port number):
|
||||
- 115200 baud rate
|
||||
- 8 data bits
|
||||
- No parity
|
||||
- One stop bit
|
||||
- No flow control
|
||||
3. Download the program to the target board.
|
||||
4. Reset the SoC and run the project.
|
||||
|
||||
Running the demo
|
||||
================
|
||||
When the demo runs successfully, the log would be seen on the CMSIS DAP terminal like:
|
||||
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Master Start...!
|
||||
|
||||
Succeed!
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
619
drivers/fsl_adc.c
Normal file
619
drivers/fsl_adc.c
Normal file
@@ -0,0 +1,619 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_adc.h"
|
||||
#include "fsl_clock.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.lpc_adc"
|
||||
#endif
|
||||
|
||||
static ADC_Type *const s_adcBases[] = ADC_BASE_PTRS;
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
static const clock_ip_name_t s_adcClocks[] = ADC_CLOCKS;
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#define FREQUENCY_1MHZ (1000000UL)
|
||||
|
||||
static uint32_t ADC_GetInstance(ADC_Type *base)
|
||||
{
|
||||
uint32_t instance;
|
||||
|
||||
/* Find the instance index from base address mappings. */
|
||||
for (instance = 0; instance < ARRAY_SIZE(s_adcBases); instance++)
|
||||
{
|
||||
if (s_adcBases[instance] == base)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
assert(instance < ARRAY_SIZE(s_adcBases));
|
||||
|
||||
return instance;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Initialize the ADC module.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param config Pointer to configuration structure, see to #adc_config_t.
|
||||
*/
|
||||
void ADC_Init(ADC_Type *base, const adc_config_t *config)
|
||||
{
|
||||
assert(config != NULL);
|
||||
|
||||
uint32_t tmp32 = 0U;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Enable clock. */
|
||||
CLOCK_EnableClock(s_adcClocks[ADC_GetInstance(base)]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
/* Disable the interrupts. */
|
||||
base->INTEN = 0U; /* Quickly disable all the interrupts. */
|
||||
|
||||
/* Configure the ADC block. */
|
||||
tmp32 = ADC_CTRL_CLKDIV(config->clockDividerNumber);
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE) & FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE
|
||||
/* Async or Sync clock mode. */
|
||||
switch (config->clockMode)
|
||||
{
|
||||
case kADC_ClockAsynchronousMode:
|
||||
tmp32 |= ADC_CTRL_ASYNMODE_MASK;
|
||||
break;
|
||||
default: /* kADC_ClockSynchronousMode */
|
||||
break;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE. */
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_RESOL) & FSL_FEATURE_ADC_HAS_CTRL_RESOL
|
||||
/* Resolution. */
|
||||
|
||||
tmp32 |= ADC_CTRL_RESOL(config->resolution);
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_RESOL. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL) & FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL
|
||||
/* Bypass calibration. */
|
||||
if (config->enableBypassCalibration)
|
||||
{
|
||||
tmp32 |= ADC_CTRL_BYPASSCAL_MASK;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL. */
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_TSAMP) & FSL_FEATURE_ADC_HAS_CTRL_TSAMP
|
||||
/* Sample time clock count. */
|
||||
#if (defined(FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL) && FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL)
|
||||
if (config->clockMode == kADC_ClockAsynchronousMode)
|
||||
{
|
||||
#endif /* FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL */
|
||||
tmp32 |= ADC_CTRL_TSAMP(config->sampleTimeNumber);
|
||||
#if (defined(FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL) && FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL)
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_TSAMP. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE) & FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE
|
||||
if (config->enableLowPowerMode)
|
||||
{
|
||||
tmp32 |= ADC_CTRL_LPWRMODE_MASK;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE. */
|
||||
|
||||
base->CTRL = tmp32;
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_GPADC_CTRL0_LDO_POWER_EN) && FSL_FEATURE_ADC_HAS_GPADC_CTRL0_LDO_POWER_EN
|
||||
base->GPADC_CTRL0 |= ADC_GPADC_CTRL0_LDO_POWER_EN_MASK;
|
||||
if (config->clockMode == kADC_ClockSynchronousMode)
|
||||
{
|
||||
base->GPADC_CTRL0 |= ADC_GPADC_CTRL0_PASS_ENABLE(config->sampleTimeNumber);
|
||||
}
|
||||
SDK_DelayAtLeastUs(300, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
#endif /* FSL_FEATURE_ADC_HAS_GPADC_CTRL0_LDO_POWER_EN */
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_GPADC_CTRL1_OFFSET_CAL) && FSL_FEATURE_ADC_HAS_GPADC_CTRL1_OFFSET_CAL
|
||||
tmp32 = *(uint32_t *)FSL_FEATURE_FLASH_ADDR_OF_TEMP_CAL;
|
||||
if (tmp32 & FSL_FEATURE_FLASH_ADDR_OF_TEMP_CAL_VALID)
|
||||
{
|
||||
base->GPADC_CTRL1 = (tmp32 >> 1);
|
||||
}
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_STARTUP_ADC_INIT) && FSL_FEATURE_ADC_HAS_STARTUP_ADC_INIT)
|
||||
base->STARTUP = ADC_STARTUP_ADC_ENA_MASK; /* Set the ADC Start bit */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_GPADC_CTRL1_OFFSET_CAL */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_GPADC_CTRL1_OFFSET_CAL */
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_TRIM_REG) & FSL_FEATURE_ADC_HAS_TRIM_REG
|
||||
base->TRM &= ~ADC_TRM_VRANGE_MASK;
|
||||
base->TRM |= ADC_TRM_VRANGE(config->voltageRange);
|
||||
#endif /* FSL_FEATURE_ADC_HAS_TRIM_REG. */
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Gets an available pre-defined settings for initial configuration.
|
||||
*
|
||||
* This function initializes the initial configuration structure with an available settings. The default values are:
|
||||
* code
|
||||
* config->clockMode = kADC_ClockSynchronousMode;
|
||||
* config->clockDividerNumber = 0U;
|
||||
* config->resolution = kADC_Resolution12bit;
|
||||
* config->enableBypassCalibration = false;
|
||||
* config->sampleTimeNumber = 0U;
|
||||
* endcode
|
||||
* param config Pointer to configuration structure.
|
||||
*/
|
||||
void ADC_GetDefaultConfig(adc_config_t *config)
|
||||
{
|
||||
/* Initializes the configure structure to zero. */
|
||||
(void)memset(config, 0, sizeof(*config));
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE) & FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE
|
||||
|
||||
config->clockMode = kADC_ClockSynchronousMode;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE. */
|
||||
|
||||
config->clockDividerNumber = 0U;
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_RESOL) & FSL_FEATURE_ADC_HAS_CTRL_RESOL
|
||||
config->resolution = kADC_Resolution12bit;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_RESOL. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL) & FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL
|
||||
config->enableBypassCalibration = false;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_TSAMP) & FSL_FEATURE_ADC_HAS_CTRL_TSAMP
|
||||
config->sampleTimeNumber = 0U;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_TSAMP. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE) & FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE
|
||||
config->enableLowPowerMode = false;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_TRIM_REG) & FSL_FEATURE_ADC_HAS_TRIM_REG
|
||||
config->voltageRange = kADC_HighVoltageRange;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_TRIM_REG. */
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Deinitialize the ADC module.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
*/
|
||||
void ADC_Deinit(ADC_Type *base)
|
||||
{
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Disable the clock. */
|
||||
CLOCK_DisableClock(s_adcClocks[ADC_GetInstance(base)]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC) && FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC)
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CALIB_REG) && FSL_FEATURE_ADC_HAS_CALIB_REG
|
||||
/*!
|
||||
* brief Do the hardware self-calibration.
|
||||
* deprecated Do not use this function. It has been superceded by @ref ADC_DoOffsetCalibration.
|
||||
*
|
||||
* To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D
|
||||
* converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* retval true Calibration succeed.
|
||||
* retval false Calibration failed.
|
||||
*/
|
||||
bool ADC_DoSelfCalibration(ADC_Type *base)
|
||||
{
|
||||
uint32_t frequency = 0U;
|
||||
uint32_t delayUs = 0U;
|
||||
bool ret = true;
|
||||
|
||||
/* Enable the converter. */
|
||||
/* This bit can only be set 1 by software. It is cleared automatically whenever the ADC is powered down.
|
||||
This bit should be set after at least 10 ms after the ADC is powered on. */
|
||||
base->STARTUP = ADC_STARTUP_ADC_ENA_MASK;
|
||||
SDK_DelayAtLeastUs(1U, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
if (0UL == (base->STARTUP & ADC_STARTUP_ADC_ENA_MASK))
|
||||
{
|
||||
ret = false; /* ADC is not powered up. */
|
||||
}
|
||||
|
||||
/* Get the ADC clock frequency in synchronous mode. */
|
||||
frequency = CLOCK_GetFreq(kCLOCK_BusClk) / (((base->CTRL & ADC_CTRL_CLKDIV_MASK) >> ADC_CTRL_CLKDIV_SHIFT) + 1UL);
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE) && FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE
|
||||
/* Get the ADC clock frequency in asynchronous mode. */
|
||||
if (ADC_CTRL_ASYNMODE_MASK == (base->CTRL & ADC_CTRL_ASYNMODE_MASK))
|
||||
{
|
||||
frequency = CLOCK_GetAdcClkFreq();
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE */
|
||||
assert(0U != frequency);
|
||||
|
||||
/* If not in by-pass mode, do the calibration. */
|
||||
if ((ADC_CALIB_CALREQD_MASK == (base->CALIB & ADC_CALIB_CALREQD_MASK)) &&
|
||||
(0U == (base->CTRL & ADC_CTRL_BYPASSCAL_MASK)))
|
||||
{
|
||||
/* A calibration cycle requires approximately 81 ADC clocks to complete. */
|
||||
delayUs = (120UL * FREQUENCY_1MHZ) / frequency + 1UL;
|
||||
/* Calibration is needed, do it now. */
|
||||
base->CALIB = ADC_CALIB_CALIB_MASK;
|
||||
SDK_DelayAtLeastUs(delayUs, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
if (ADC_CALIB_CALIB_MASK == (base->CALIB & ADC_CALIB_CALIB_MASK))
|
||||
{
|
||||
ret = false; /* Calibration timeout. */
|
||||
}
|
||||
}
|
||||
|
||||
/* A “dummy” conversion cycle requires approximately 6 ADC clocks */
|
||||
delayUs = (10UL * FREQUENCY_1MHZ) / frequency + 1UL;
|
||||
base->STARTUP |= ADC_STARTUP_ADC_INIT_MASK;
|
||||
SDK_DelayAtLeastUs(delayUs, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
if (ADC_STARTUP_ADC_INIT_MASK == (base->STARTUP & ADC_STARTUP_ADC_INIT_MASK))
|
||||
{
|
||||
ret = false;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Do the hardware offset-calibration.
|
||||
*
|
||||
* To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D
|
||||
* converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param frequency The clock frequency that ADC operates at.
|
||||
* retval true Calibration succeed.
|
||||
* retval false Calibration failed.
|
||||
*/
|
||||
bool ADC_DoOffsetCalibration(ADC_Type *base, uint32_t frequency)
|
||||
{
|
||||
assert(frequency != 0U);
|
||||
|
||||
uint32_t delayUs = 0U;
|
||||
uint32_t tmp32 = base->CTRL;
|
||||
/* The maximum ADC clock frequency during calibration is 30 MHz. */
|
||||
const uint32_t maxCalibrationFrequency = 30000000UL;
|
||||
bool ret = true;
|
||||
|
||||
/* Enable the converter. */
|
||||
/* This bit should be set after at least 10 us after the ADC is powered on. */
|
||||
SDK_DelayAtLeastUs(10U, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
/* This bit can only be set 1 by software. It is cleared automatically whenever the ADC is powered down. */
|
||||
base->STARTUP = ADC_STARTUP_ADC_ENA_MASK;
|
||||
|
||||
if (0UL == (base->STARTUP & ADC_STARTUP_ADC_ENA_MASK))
|
||||
{
|
||||
ret = false; /* ADC is not powered up. */
|
||||
}
|
||||
|
||||
if (frequency >= maxCalibrationFrequency)
|
||||
{
|
||||
/* The divider should round up to ensure the frequency be lower than the maximum frequency. */
|
||||
uint8_t divider = (frequency % maxCalibrationFrequency > 0UL) ?
|
||||
(uint8_t)(frequency / maxCalibrationFrequency + 1UL) :
|
||||
(uint8_t)(frequency / maxCalibrationFrequency);
|
||||
/* Divide the system clock to yield an ADC clock of about 30 MHz. */
|
||||
base->CTRL &= ~ADC_CTRL_CLKDIV_MASK;
|
||||
base->CTRL |= ADC_CTRL_CLKDIV(divider - 1UL);
|
||||
frequency /= divider;
|
||||
}
|
||||
|
||||
/* Launch the calibration cycle or "dummy" conversions. */
|
||||
if (ADC_CALIB_CALREQD_MASK == (base->CALIB & ADC_CALIB_CALREQD_MASK))
|
||||
{
|
||||
/* Calibration is required, do it now. */
|
||||
base->CALIB = ADC_CALIB_CALIB_MASK;
|
||||
|
||||
/* A calibration cycle requires approximately 81 ADC clocks to complete. */
|
||||
delayUs = (120UL * FREQUENCY_1MHZ) / frequency + 1UL;
|
||||
SDK_DelayAtLeastUs(delayUs, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
if (ADC_CALIB_CALIB_MASK == (base->CALIB & ADC_CALIB_CALIB_MASK))
|
||||
{
|
||||
base->CTRL = tmp32;
|
||||
ret = false; /* Calibration timeout. */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If a calibration is not performed, launch the conversion cycle. */
|
||||
base->STARTUP |= ADC_STARTUP_ADC_INIT_MASK;
|
||||
|
||||
/* A “dummy” conversion cycle requires approximately 6 ADC clocks */
|
||||
delayUs = (10UL * FREQUENCY_1MHZ) / frequency + 1UL;
|
||||
SDK_DelayAtLeastUs(delayUs, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
if (ADC_STARTUP_ADC_INIT_MASK == (base->STARTUP & ADC_STARTUP_ADC_INIT_MASK))
|
||||
{
|
||||
base->CTRL = tmp32;
|
||||
ret = false; /* Initialization timeout. */
|
||||
}
|
||||
}
|
||||
|
||||
base->CTRL = tmp32;
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
/*!
|
||||
* brief Do the hardware self-calibration.
|
||||
*
|
||||
* To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D
|
||||
* converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param frequency The clock frequency that ADC operates at.
|
||||
* retval true Calibration succeed.
|
||||
* retval false Calibration failed.
|
||||
*/
|
||||
bool ADC_DoSelfCalibration(ADC_Type *base, uint32_t frequency)
|
||||
{
|
||||
assert(frequency != 0U);
|
||||
|
||||
uint32_t tmp32 = 0U;
|
||||
|
||||
/* Store the current contents of the ADC CTRL register. */
|
||||
tmp32 = base->CTRL;
|
||||
|
||||
/* Divide the system clock to yield an ADC clock of about 500 kHz. */
|
||||
base->CTRL &= ~ADC_CTRL_CLKDIV_MASK;
|
||||
base->CTRL |= ADC_CTRL_CLKDIV((frequency / 500000U) - 1U);
|
||||
|
||||
/* Clear the LPWR bit. */
|
||||
base->CTRL &= ~ADC_CTRL_LPWRMODE_MASK;
|
||||
|
||||
/* Start ADC self-calibration. */
|
||||
base->CTRL |= ADC_CTRL_CALMODE_MASK;
|
||||
/* Delay for 300 uSec @ 500KHz ADC clock */
|
||||
SDK_DelayAtLeastUs(300U, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
|
||||
|
||||
/* Check the completion of calibration. */
|
||||
if (ADC_CTRL_CALMODE_MASK == (base->CTRL & ADC_CTRL_CALMODE_MASK))
|
||||
{
|
||||
/* Restore the contents of the ADC CTRL register. */
|
||||
base->CTRL = tmp32;
|
||||
return false; /* Calibration timeout. */
|
||||
}
|
||||
/* Restore the contents of the ADC CTRL register. */
|
||||
base->CTRL = tmp32;
|
||||
|
||||
return true;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CALIB_REG */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC*/
|
||||
|
||||
/*!
|
||||
* brief Configure the conversion sequence A.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param config Pointer to configuration structure, see to #adc_conv_seq_config_t.
|
||||
*/
|
||||
void ADC_SetConvSeqAConfig(ADC_Type *base, const adc_conv_seq_config_t *config)
|
||||
{
|
||||
assert(config != NULL);
|
||||
|
||||
uint32_t tmp32;
|
||||
|
||||
tmp32 = ADC_SEQ_CTRL_CHANNELS(config->channelMask) /* Channel mask. */
|
||||
| ADC_SEQ_CTRL_TRIGGER(config->triggerMask); /* Trigger mask. */
|
||||
|
||||
/* Polarity for tirgger signal. */
|
||||
switch (config->triggerPolarity)
|
||||
{
|
||||
case kADC_TriggerPolarityPositiveEdge:
|
||||
tmp32 |= ADC_SEQ_CTRL_TRIGPOL_MASK;
|
||||
break;
|
||||
default: /* kADC_TriggerPolarityNegativeEdge */
|
||||
break;
|
||||
}
|
||||
|
||||
/* Bypass the clock Sync. */
|
||||
if (config->enableSyncBypass)
|
||||
{
|
||||
tmp32 |= ADC_SEQ_CTRL_SYNCBYPASS_MASK;
|
||||
}
|
||||
|
||||
/* Interrupt point. */
|
||||
switch (config->interruptMode)
|
||||
{
|
||||
case kADC_InterruptForEachSequence:
|
||||
tmp32 |= ADC_SEQ_CTRL_MODE_MASK;
|
||||
break;
|
||||
default: /* kADC_InterruptForEachConversion */
|
||||
break;
|
||||
}
|
||||
|
||||
/* One trigger for a conversion, or for a sequence. */
|
||||
if (config->enableSingleStep)
|
||||
{
|
||||
tmp32 |= ADC_SEQ_CTRL_SINGLESTEP_MASK;
|
||||
}
|
||||
|
||||
base->SEQ_CTRL[0] = tmp32;
|
||||
}
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_SINGLE_SEQ) && FSL_FEATURE_ADC_HAS_SINGLE_SEQ)
|
||||
/*!
|
||||
* brief Configure the conversion sequence B.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param config Pointer to configuration structure, see to #adc_conv_seq_config_t.
|
||||
*/
|
||||
void ADC_SetConvSeqBConfig(ADC_Type *base, const adc_conv_seq_config_t *config)
|
||||
{
|
||||
assert(config != NULL);
|
||||
|
||||
uint32_t tmp32;
|
||||
|
||||
tmp32 = ADC_SEQ_CTRL_CHANNELS(config->channelMask) /* Channel mask. */
|
||||
| ADC_SEQ_CTRL_TRIGGER(config->triggerMask); /* Trigger mask. */
|
||||
|
||||
/* Polarity for tirgger signal. */
|
||||
switch (config->triggerPolarity)
|
||||
{
|
||||
case kADC_TriggerPolarityPositiveEdge:
|
||||
tmp32 |= ADC_SEQ_CTRL_TRIGPOL_MASK;
|
||||
break;
|
||||
default: /* kADC_TriggerPolarityPositiveEdge */
|
||||
break;
|
||||
}
|
||||
|
||||
/* Bypass the clock Sync. */
|
||||
if (config->enableSyncBypass)
|
||||
{
|
||||
tmp32 |= ADC_SEQ_CTRL_SYNCBYPASS_MASK;
|
||||
}
|
||||
|
||||
/* Interrupt point. */
|
||||
switch (config->interruptMode)
|
||||
{
|
||||
case kADC_InterruptForEachSequence:
|
||||
tmp32 |= ADC_SEQ_CTRL_MODE_MASK;
|
||||
break;
|
||||
default: /* kADC_InterruptForEachConversion */
|
||||
break;
|
||||
}
|
||||
|
||||
/* One trigger for a conversion, or for a sequence. */
|
||||
if (config->enableSingleStep)
|
||||
{
|
||||
tmp32 |= ADC_SEQ_CTRL_SINGLESTEP_MASK;
|
||||
}
|
||||
|
||||
base->SEQ_CTRL[1] = tmp32;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_SINGLE_SEQ */
|
||||
|
||||
/*!
|
||||
* brief Get the global ADC conversion infomation of sequence A.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param info Pointer to information structure, see to #adc_result_info_t;
|
||||
* retval true The conversion result is ready.
|
||||
* retval false The conversion result is not ready yet.
|
||||
*/
|
||||
bool ADC_GetConvSeqAGlobalConversionResult(ADC_Type *base, adc_result_info_t *info)
|
||||
{
|
||||
assert(info != NULL);
|
||||
|
||||
uint32_t tmp32 = base->SEQ_GDAT[0]; /* Read to clear the status. */
|
||||
bool ret = true;
|
||||
|
||||
if (0U == (ADC_SEQ_GDAT_DATAVALID_MASK & tmp32))
|
||||
{
|
||||
ret = false;
|
||||
}
|
||||
|
||||
info->result = (tmp32 & ADC_SEQ_GDAT_RESULT_MASK) >> ADC_SEQ_GDAT_RESULT_SHIFT;
|
||||
info->thresholdCompareStatus = (adc_threshold_compare_status_t)(uint32_t)((tmp32 & ADC_SEQ_GDAT_THCMPRANGE_MASK) >>
|
||||
ADC_SEQ_GDAT_THCMPRANGE_SHIFT);
|
||||
info->thresholdCorssingStatus = (adc_threshold_crossing_status_t)(uint32_t)(
|
||||
(tmp32 & ADC_SEQ_GDAT_THCMPCROSS_MASK) >> ADC_SEQ_GDAT_THCMPCROSS_SHIFT);
|
||||
info->channelNumber = (tmp32 & ADC_SEQ_GDAT_CHN_MASK) >> ADC_SEQ_GDAT_CHN_SHIFT;
|
||||
info->overrunFlag = ((tmp32 & ADC_SEQ_GDAT_OVERRUN_MASK) == ADC_SEQ_GDAT_OVERRUN_MASK);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_SINGLE_SEQ) && FSL_FEATURE_ADC_HAS_SINGLE_SEQ)
|
||||
/*!
|
||||
* brief Get the global ADC conversion infomation of sequence B.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param info Pointer to information structure, see to #adc_result_info_t;
|
||||
* retval true The conversion result is ready.
|
||||
* retval false The conversion result is not ready yet.
|
||||
*/
|
||||
bool ADC_GetConvSeqBGlobalConversionResult(ADC_Type *base, adc_result_info_t *info)
|
||||
{
|
||||
assert(info != NULL);
|
||||
|
||||
uint32_t tmp32 = base->SEQ_GDAT[1]; /* Read to clear the status. */
|
||||
bool ret = true;
|
||||
|
||||
if (0U == (ADC_SEQ_GDAT_DATAVALID_MASK & tmp32))
|
||||
{
|
||||
ret = false;
|
||||
}
|
||||
|
||||
info->result = (tmp32 & ADC_SEQ_GDAT_RESULT_MASK) >> ADC_SEQ_GDAT_RESULT_SHIFT;
|
||||
info->thresholdCompareStatus = (adc_threshold_compare_status_t)(uint32_t)((tmp32 & ADC_SEQ_GDAT_THCMPRANGE_MASK) >>
|
||||
ADC_SEQ_GDAT_THCMPRANGE_SHIFT);
|
||||
info->thresholdCorssingStatus = (adc_threshold_crossing_status_t)(uint32_t)(
|
||||
(tmp32 & ADC_SEQ_GDAT_THCMPCROSS_MASK) >> ADC_SEQ_GDAT_THCMPCROSS_SHIFT);
|
||||
info->channelNumber = (tmp32 & ADC_SEQ_GDAT_CHN_MASK) >> ADC_SEQ_GDAT_CHN_SHIFT;
|
||||
info->overrunFlag = ((tmp32 & ADC_SEQ_GDAT_OVERRUN_MASK) == ADC_SEQ_GDAT_OVERRUN_MASK);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_SINGLE_SEQ */
|
||||
|
||||
/*!
|
||||
* brief Get the channel's ADC conversion completed under each conversion sequence.
|
||||
*
|
||||
* param base ADC peripheral base address.
|
||||
* param channel The indicated channel number.
|
||||
* param info Pointer to information structure, see to #adc_result_info_t;
|
||||
* retval true The conversion result is ready.
|
||||
* retval false The conversion result is not ready yet.
|
||||
*/
|
||||
bool ADC_GetChannelConversionResult(ADC_Type *base, uint32_t channel, adc_result_info_t *info)
|
||||
{
|
||||
assert(info != NULL);
|
||||
assert(channel < ADC_DAT_COUNT);
|
||||
|
||||
uint32_t tmp32 = base->DAT[channel]; /* Read to clear the status. */
|
||||
bool ret = true;
|
||||
|
||||
if (0U == (ADC_DAT_DATAVALID_MASK & tmp32))
|
||||
{
|
||||
ret = false;
|
||||
}
|
||||
|
||||
info->result = (tmp32 & ADC_DAT_RESULT_MASK) >> ADC_DAT_RESULT_SHIFT;
|
||||
#if (defined(FSL_FEATURE_ADC_DAT_OF_HIGH_ALIGNMENT) && FSL_FEATURE_ADC_DAT_OF_HIGH_ALIGNMENT)
|
||||
switch ((base->CTRL & ADC_CTRL_RESOL_MASK) >> ADC_CTRL_RESOL_SHIFT)
|
||||
{
|
||||
case kADC_Resolution10bit:
|
||||
info->result >>= kADC_Resolution10bitInfoResultShift;
|
||||
break;
|
||||
case kADC_Resolution8bit:
|
||||
info->result >>= kADC_Resolution8bitInfoResultShift;
|
||||
break;
|
||||
case kADC_Resolution6bit:
|
||||
info->result >>= kADC_Resolution6bitInfoResultShift;
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
info->thresholdCompareStatus =
|
||||
(adc_threshold_compare_status_t)(uint32_t)((tmp32 & ADC_DAT_THCMPRANGE_MASK) >> ADC_DAT_THCMPRANGE_SHIFT);
|
||||
info->thresholdCorssingStatus =
|
||||
(adc_threshold_crossing_status_t)(uint32_t)((tmp32 & ADC_DAT_THCMPCROSS_MASK) >> ADC_DAT_THCMPCROSS_SHIFT);
|
||||
info->channelNumber = (tmp32 & ADC_DAT_CHANNEL_MASK) >> ADC_DAT_CHANNEL_SHIFT;
|
||||
info->overrunFlag = ((tmp32 & ADC_DAT_OVERRUN_MASK) == ADC_DAT_OVERRUN_MASK);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#if defined(FSL_FEATURE_ADC_ASYNC_SYSCON_TEMP) && (FSL_FEATURE_ADC_ASYNC_SYSCON_TEMP)
|
||||
void ADC_EnableTemperatureSensor(ADC_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
SYSCON->ASYNCAPBCTRL = SYSCON_ASYNCAPBCTRL_ENABLE_MASK;
|
||||
ASYNC_SYSCON->TEMPSENSORCTRL = kADC_NoOffsetAdded;
|
||||
ASYNC_SYSCON->TEMPSENSORCTRL |= ASYNC_SYSCON_TEMPSENSORCTRL_ENABLE_MASK;
|
||||
base->GPADC_CTRL0 |= (kADC_ADCInUnityGainMode | kADC_Impedance87kOhm);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* if the temperature sensor is not turned on then ASYNCAPBCTRL is likely to be zero
|
||||
* and accessing the registers will cause a memory access error. Test for this */
|
||||
if (SYSCON->ASYNCAPBCTRL == SYSCON_ASYNCAPBCTRL_ENABLE_MASK)
|
||||
{
|
||||
ASYNC_SYSCON->TEMPSENSORCTRL = 0x0;
|
||||
base->GPADC_CTRL0 &= ~(kADC_ADCInUnityGainMode | kADC_Impedance87kOhm);
|
||||
base->GPADC_CTRL0 |= kADC_Impedance55kOhm;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
775
drivers/fsl_adc.h
Normal file
775
drivers/fsl_adc.h
Normal file
@@ -0,0 +1,775 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __FSL_ADC_H__
|
||||
#define __FSL_ADC_H__
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup lpc_adc
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief ADC driver version 2.5.0. */
|
||||
#define FSL_ADC_DRIVER_VERSION (MAKE_VERSION(2, 5, 0))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Flags
|
||||
*/
|
||||
|
||||
enum _adc_status_flags
|
||||
{
|
||||
kADC_ThresholdCompareFlagOnChn0 = 1U << 0U, /*!< Threshold comparison event on Channel 0. */
|
||||
kADC_ThresholdCompareFlagOnChn1 = 1U << 1U, /*!< Threshold comparison event on Channel 1. */
|
||||
kADC_ThresholdCompareFlagOnChn2 = 1U << 2U, /*!< Threshold comparison event on Channel 2. */
|
||||
kADC_ThresholdCompareFlagOnChn3 = 1U << 3U, /*!< Threshold comparison event on Channel 3. */
|
||||
kADC_ThresholdCompareFlagOnChn4 = 1U << 4U, /*!< Threshold comparison event on Channel 4. */
|
||||
kADC_ThresholdCompareFlagOnChn5 = 1U << 5U, /*!< Threshold comparison event on Channel 5. */
|
||||
kADC_ThresholdCompareFlagOnChn6 = 1U << 6U, /*!< Threshold comparison event on Channel 6. */
|
||||
kADC_ThresholdCompareFlagOnChn7 = 1U << 7U, /*!< Threshold comparison event on Channel 7. */
|
||||
kADC_ThresholdCompareFlagOnChn8 = 1U << 8U, /*!< Threshold comparison event on Channel 8. */
|
||||
kADC_ThresholdCompareFlagOnChn9 = 1U << 9U, /*!< Threshold comparison event on Channel 9. */
|
||||
kADC_ThresholdCompareFlagOnChn10 = 1U << 10U, /*!< Threshold comparison event on Channel 10. */
|
||||
kADC_ThresholdCompareFlagOnChn11 = 1U << 11U, /*!< Threshold comparison event on Channel 11. */
|
||||
kADC_OverrunFlagForChn0 =
|
||||
1U << 12U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 0. */
|
||||
kADC_OverrunFlagForChn1 =
|
||||
1U << 13U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 1. */
|
||||
kADC_OverrunFlagForChn2 =
|
||||
1U << 14U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 2. */
|
||||
kADC_OverrunFlagForChn3 =
|
||||
1U << 15U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 3. */
|
||||
kADC_OverrunFlagForChn4 =
|
||||
1U << 16U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 4. */
|
||||
kADC_OverrunFlagForChn5 =
|
||||
1U << 17U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 5. */
|
||||
kADC_OverrunFlagForChn6 =
|
||||
1U << 18U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 6. */
|
||||
kADC_OverrunFlagForChn7 =
|
||||
1U << 19U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 7. */
|
||||
kADC_OverrunFlagForChn8 =
|
||||
1U << 20U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 8. */
|
||||
kADC_OverrunFlagForChn9 =
|
||||
1U << 21U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 9. */
|
||||
kADC_OverrunFlagForChn10 =
|
||||
1U << 22U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 10. */
|
||||
kADC_OverrunFlagForChn11 =
|
||||
1U << 23U, /*!< Mirror the OVERRUN status flag from the result register for ADC channel 11. */
|
||||
kADC_GlobalOverrunFlagForSeqA = 1U << 24U, /*!< Mirror the glabal OVERRUN status flag for conversion sequence A. */
|
||||
kADC_GlobalOverrunFlagForSeqB = 1U << 25U, /*!< Mirror the global OVERRUN status flag for conversion sequence B. */
|
||||
kADC_ConvSeqAInterruptFlag = 1U << 28U, /*!< Sequence A interrupt/DMA trigger. */
|
||||
kADC_ConvSeqBInterruptFlag = 1U << 29U, /*!< Sequence B interrupt/DMA trigger. */
|
||||
kADC_ThresholdCompareInterruptFlag = 1U << 30U, /*!< Threshold comparision interrupt flag. */
|
||||
kADC_OverrunInterruptFlag = (int)(1U << 31U), /*!< Overrun interrupt flag. */
|
||||
};
|
||||
|
||||
/*!
|
||||
* @brief Interrupts
|
||||
* @note Not all the interrupt options are listed here
|
||||
*/
|
||||
enum _adc_interrupt_enable
|
||||
{
|
||||
kADC_ConvSeqAInterruptEnable = ADC_INTEN_SEQA_INTEN_MASK, /*!< Enable interrupt upon completion of each individual
|
||||
conversion in sequence A, or entire sequence. */
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_SINGLE_SEQ) && FSL_FEATURE_ADC_HAS_SINGLE_SEQ)
|
||||
kADC_ConvSeqBInterruptEnable = ADC_INTEN_SEQB_INTEN_MASK, /*!< Enable interrupt upon completion of each individual
|
||||
conversion in sequence B, or entire sequence. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_SINGLE_SEQ */
|
||||
kADC_OverrunInterruptEnable = ADC_INTEN_OVR_INTEN_MASK, /*!< Enable the detection of an overrun condition on any of
|
||||
the channel data registers will cause an overrun
|
||||
interrupt/DMA trigger. */
|
||||
};
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE) & FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE
|
||||
/*!
|
||||
* @brief Define selection of clock mode.
|
||||
*/
|
||||
typedef enum _adc_clock_mode
|
||||
{
|
||||
kADC_ClockSynchronousMode =
|
||||
0U, /*!< The ADC clock would be derived from the system clock based on "clockDividerNumber". */
|
||||
kADC_ClockAsynchronousMode = 1U, /*!< The ADC clock would be based on the SYSCON block's divider. */
|
||||
} adc_clock_mode_t;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE. */
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_DAT_OF_HIGH_ALIGNMENT) && (FSL_FEATURE_ADC_DAT_OF_HIGH_ALIGNMENT)
|
||||
/*!
|
||||
* @brief Define selection of resolution.
|
||||
*/
|
||||
typedef enum _adc_resolution
|
||||
{
|
||||
kADC_Resolution6bit = 3U,
|
||||
/*!< 6-bit resolution. */ /* This is a HW issue that the ADC resolution enum configure not align with HW implement,
|
||||
ES2 chip already fixed the issue, Currently, update ADC enum define as a workaround */
|
||||
kADC_Resolution8bit = 2U, /*!< 8-bit resolution. */
|
||||
kADC_Resolution10bit = 1U, /*!< 10-bit resolution. */
|
||||
kADC_Resolution12bit = 0U, /*!< 12-bit resolution. */
|
||||
} adc_resolution_t;
|
||||
#elif defined(FSL_FEATURE_ADC_HAS_CTRL_RESOL) & FSL_FEATURE_ADC_HAS_CTRL_RESOL
|
||||
/*!
|
||||
* @brief Define selection of resolution.
|
||||
*/
|
||||
typedef enum _adc_resolution
|
||||
{
|
||||
kADC_Resolution6bit = 0U, /*!< 6-bit resolution. */
|
||||
kADC_Resolution8bit = 1U, /*!< 8-bit resolution. */
|
||||
kADC_Resolution10bit = 2U, /*!< 10-bit resolution. */
|
||||
kADC_Resolution12bit = 3U, /*!< 12-bit resolution. */
|
||||
} adc_resolution_t;
|
||||
#endif
|
||||
|
||||
#if defined(FSL_FEATURE_ADC_HAS_TRIM_REG) & FSL_FEATURE_ADC_HAS_TRIM_REG
|
||||
/*!
|
||||
* @brief Definfe range of the analog supply voltage VDDA.
|
||||
*/
|
||||
typedef enum _adc_voltage_range
|
||||
{
|
||||
kADC_HighVoltageRange = 0U, /* High voltage. VDD = 2.7 V to 3.6 V. */
|
||||
kADC_LowVoltageRange = 1U, /* Low voltage. VDD = 2.4 V to 2.7 V. */
|
||||
} adc_vdda_range_t;
|
||||
#endif /* FSL_FEATURE_ADC_HAS_TRIM_REG. */
|
||||
|
||||
/*!
|
||||
* @brief Define selection of polarity of selected input trigger for conversion sequence.
|
||||
*/
|
||||
typedef enum _adc_trigger_polarity
|
||||
{
|
||||
kADC_TriggerPolarityNegativeEdge = 0U, /*!< A negative edge launches the conversion sequence on the trigger(s). */
|
||||
kADC_TriggerPolarityPositiveEdge = 1U, /*!< A positive edge launches the conversion sequence on the trigger(s). */
|
||||
} adc_trigger_polarity_t;
|
||||
|
||||
/*!
|
||||
* @brief Define selection of conversion sequence's priority.
|
||||
*/
|
||||
typedef enum _adc_priority
|
||||
{
|
||||
kADC_PriorityLow = 0U, /*!< This sequence would be preempted when another sequence is started. */
|
||||
kADC_PriorityHigh = 1U, /*!< This sequence would preempt other sequence even when it is started. */
|
||||
} adc_priority_t;
|
||||
|
||||
/*!
|
||||
* @brief Define selection of conversion sequence's interrupt.
|
||||
*/
|
||||
typedef enum _adc_seq_interrupt_mode
|
||||
{
|
||||
kADC_InterruptForEachConversion = 0U, /*!< The sequence interrupt/DMA trigger will be set at the end of each
|
||||
individual ADC conversion inside this conversion sequence. */
|
||||
kADC_InterruptForEachSequence = 1U, /*!< The sequence interrupt/DMA trigger will be set when the entire set of
|
||||
this sequence conversions completes. */
|
||||
} adc_seq_interrupt_mode_t;
|
||||
|
||||
/*!
|
||||
* @brief Define status of threshold compare result.
|
||||
*/
|
||||
typedef enum _adc_threshold_compare_status
|
||||
{
|
||||
kADC_ThresholdCompareInRange = 0U, /*!< LOW threshold <= conversion value <= HIGH threshold. */
|
||||
kADC_ThresholdCompareBelowRange = 1U, /*!< conversion value < LOW threshold. */
|
||||
kADC_ThresholdCompareAboveRange = 2U, /*!< conversion value > HIGH threshold. */
|
||||
} adc_threshold_compare_status_t;
|
||||
|
||||
/*!
|
||||
* @brief Define status of threshold crossing detection result.
|
||||
*/
|
||||
typedef enum _adc_threshold_crossing_status
|
||||
{
|
||||
/* The conversion on this channel had the same relationship (above or below) to the threshold value established by
|
||||
* the designated LOW threshold value as did the previous conversion on this channel. */
|
||||
kADC_ThresholdCrossingNoDetected = 0U, /*!< No threshold Crossing detected. */
|
||||
|
||||
/* Indicates that a threshold crossing in the downward direction has occurred - i.e. the previous sample on this
|
||||
* channel was above the threshold value established by the designated LOW threshold value and the current sample is
|
||||
* below that threshold. */
|
||||
kADC_ThresholdCrossingDownward = 2U, /*!< Downward Threshold Crossing detected. */
|
||||
|
||||
/* Indicates that a thre shold crossing in the upward direction has occurred - i.e. the previous sample on this
|
||||
* channel was below the threshold value established by the designated LOW threshold value and the current sample is
|
||||
* above that threshold. */
|
||||
kADC_ThresholdCrossingUpward = 3U, /*!< Upward Threshold Crossing Detected. */
|
||||
} adc_threshold_crossing_status_t;
|
||||
|
||||
/*!
|
||||
* @brief Define interrupt mode for threshold compare event.
|
||||
*/
|
||||
typedef enum _adc_threshold_interrupt_mode
|
||||
{
|
||||
kADC_ThresholdInterruptDisabled = 0U, /*!< Threshold comparison interrupt is disabled. */
|
||||
kADC_ThresholdInterruptOnOutside = 1U, /*!< Threshold comparison interrupt is enabled on outside threshold. */
|
||||
kADC_ThresholdInterruptOnCrossing = 2U, /*!< Threshold comparison interrupt is enabled on crossing threshold. */
|
||||
} adc_threshold_interrupt_mode_t;
|
||||
|
||||
/*!
|
||||
* @brief Define the info result mode of different resolution.
|
||||
*/
|
||||
typedef enum _adc_inforesultshift
|
||||
{
|
||||
kADC_Resolution12bitInfoResultShift = 0U, /*!< Info result shift of Resolution12bit. */
|
||||
kADC_Resolution10bitInfoResultShift = 2U, /*!< Info result shift of Resolution10bit. */
|
||||
kADC_Resolution8bitInfoResultShift = 4U, /*!< Info result shift of Resolution8bit. */
|
||||
kADC_Resolution6bitInfoResultShift = 6U, /*!< Info result shift of Resolution6bit. */
|
||||
} adc_inforesult_t;
|
||||
|
||||
/*!
|
||||
* @brief Define common modes for Temerature sensor.
|
||||
*/
|
||||
typedef enum _adc_tempsensor_common_mode
|
||||
{
|
||||
kADC_HighNegativeOffsetAdded = 0x0U, /*!< Temperature sensor common mode: high negative offset added. */
|
||||
kADC_IntermediateNegativeOffsetAdded =
|
||||
0x4U, /*!< Temperature sensor common mode: intermediate negative offset added. */
|
||||
kADC_NoOffsetAdded = 0x8U, /*!< Temperature sensor common mode: no offset added. */
|
||||
kADC_LowPositiveOffsetAdded = 0xcU, /*!< Temperature sensor common mode: low positive offset added. */
|
||||
} adc_tempsensor_common_mode_t;
|
||||
|
||||
/*!
|
||||
* @brief Define source impedance modes for GPADC control.
|
||||
*/
|
||||
typedef enum _adc_second_control
|
||||
{
|
||||
kADC_Impedance621Ohm = 0x1U << 9U, /*!< Extand ADC sampling time according to source impedance 1: 0.621 kOhm. */
|
||||
kADC_Impedance55kOhm =
|
||||
0x14U << 9U, /*!< Extand ADC sampling time according to source impedance 20 (default): 55 kOhm. */
|
||||
kADC_Impedance87kOhm = 0x1fU << 9U, /*!< Extand ADC sampling time according to source impedance 31: 87 kOhm. */
|
||||
|
||||
kADC_NormalFunctionalMode = 0x0U << 14U, /*!< TEST mode: Normal functional mode. */
|
||||
kADC_MultiplexeTestMode = 0x1U << 14U, /*!< TEST mode: Multiplexer test mode. */
|
||||
kADC_ADCInUnityGainMode = 0x2U << 14U, /*!< TEST mode: ADC in unity gain mode. */
|
||||
} adc_second_control_t;
|
||||
|
||||
/*!
|
||||
* @brief Define structure for configuring the block.
|
||||
*/
|
||||
typedef struct _adc_config
|
||||
{
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE) & FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE
|
||||
adc_clock_mode_t clockMode; /*!< Select the clock mode for ADC converter. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE. */
|
||||
uint32_t clockDividerNumber; /*!< This field is only available when using kADC_ClockSynchronousMode for "clockMode"
|
||||
field. The divider would be plused by 1 based on the value in this field. The
|
||||
available range is in 8 bits. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_RESOL) & FSL_FEATURE_ADC_HAS_CTRL_RESOL
|
||||
adc_resolution_t resolution; /*!< Select the conversion bits. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_RESOL. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL) & FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL
|
||||
bool enableBypassCalibration; /*!< By default, a calibration cycle must be performed each time the chip is
|
||||
powered-up. Re-calibration may be warranted periodically - especially if
|
||||
operating conditions have changed. To enable this option would avoid the need to
|
||||
calibrate if offset error is not a concern in the application. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_TSAMP) & FSL_FEATURE_ADC_HAS_CTRL_TSAMP
|
||||
uint32_t sampleTimeNumber; /*!< By default, with value as "0U", the sample period would be 2.5 ADC clocks. Then,
|
||||
to plus the "sampleTimeNumber" value here. The available value range is in 3 bits.*/
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_TSAMP. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE) & FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE
|
||||
bool enableLowPowerMode; /*!< If disable low-power mode, ADC remains activated even when no conversions are
|
||||
requested.
|
||||
If enable low-power mode, The ADC is automatically powered-down when no conversions are
|
||||
taking place. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE. */
|
||||
#if defined(FSL_FEATURE_ADC_HAS_TRIM_REG) & FSL_FEATURE_ADC_HAS_TRIM_REG
|
||||
adc_vdda_range_t
|
||||
voltageRange; /*!< Configure the ADC for the appropriate operating range of the analog supply voltage VDDA.
|
||||
Failure to set the area correctly causes the ADC to return incorrect conversion results. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_TRIM_REG. */
|
||||
} adc_config_t;
|
||||
|
||||
/*!
|
||||
* @brief Define structure for configuring conversion sequence.
|
||||
*/
|
||||
typedef struct _adc_conv_seq_config
|
||||
{
|
||||
uint32_t channelMask; /*!< Selects which one or more of the ADC channels will be sampled and converted when this
|
||||
sequence is launched. The masked channels would be involved in current conversion
|
||||
sequence, beginning with the lowest-order. The available range is in 12-bit. */
|
||||
uint32_t triggerMask; /*!< Selects which one or more of the available hardware trigger sources will cause this
|
||||
conversion sequence to be initiated. The available range is 6-bit.*/
|
||||
adc_trigger_polarity_t triggerPolarity; /*!< Select the trigger to launch conversion sequence. */
|
||||
bool enableSyncBypass; /*!< To enable this feature allows the hardware trigger input to bypass synchronization
|
||||
flip-flop stages and therefore shorten the time between the trigger input signal and the
|
||||
start of a conversion. */
|
||||
bool enableSingleStep; /*!< When enabling this feature, a trigger will launch a single conversion on the next
|
||||
channel in the sequence instead of the default response of launching an entire sequence
|
||||
of conversions. */
|
||||
adc_seq_interrupt_mode_t interruptMode; /*!< Select the interrpt/DMA trigger mode. */
|
||||
} adc_conv_seq_config_t;
|
||||
|
||||
/*!
|
||||
* @brief Define structure of keeping conversion result information.
|
||||
*/
|
||||
typedef struct _adc_result_info
|
||||
{
|
||||
uint32_t result; /*!< Keep the conversion data value. */
|
||||
adc_threshold_compare_status_t thresholdCompareStatus; /*!< Keep the threshold compare status. */
|
||||
adc_threshold_crossing_status_t thresholdCorssingStatus; /*!< Keep the threshold crossing status. */
|
||||
uint32_t channelNumber; /*!< Keep the channel number for this conversion. */
|
||||
bool overrunFlag; /*!< Keep the status whether the conversion is overrun or not. */
|
||||
/* The data available flag would be returned by the reading result API. */
|
||||
} adc_result_info_t;
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
/*!
|
||||
* @name Initialization and Deinitialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Initialize the ADC module.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param config Pointer to configuration structure, see to #adc_config_t.
|
||||
*/
|
||||
void ADC_Init(ADC_Type *base, const adc_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Deinitialize the ADC module.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
*/
|
||||
void ADC_Deinit(ADC_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Gets an available pre-defined settings for initial configuration.
|
||||
*
|
||||
* This function initializes the initial configuration structure with an available settings. The default values are:
|
||||
* @code
|
||||
* config->clockMode = kADC_ClockSynchronousMode;
|
||||
* config->clockDividerNumber = 0U;
|
||||
* config->resolution = kADC_Resolution12bit;
|
||||
* config->enableBypassCalibration = false;
|
||||
* config->sampleTimeNumber = 0U;
|
||||
* @endcode
|
||||
* @param config Pointer to configuration structure.
|
||||
*/
|
||||
void ADC_GetDefaultConfig(adc_config_t *config);
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC) && FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC)
|
||||
#if defined(FSL_FEATURE_ADC_HAS_CALIB_REG) && FSL_FEATURE_ADC_HAS_CALIB_REG
|
||||
/*!
|
||||
* @brief Do the hardware self-calibration.
|
||||
* @deprecated Do not use this function. It has been superceded by @ref ADC_DoOffsetCalibration.
|
||||
*
|
||||
* To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D
|
||||
* converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @retval true Calibration succeed.
|
||||
* @retval false Calibration failed.
|
||||
*/
|
||||
bool ADC_DoSelfCalibration(ADC_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Do the hardware offset-calibration.
|
||||
*
|
||||
* To calibrate the ADC, set the ADC clock to no more then 30 MHz. In order to achieve the specified ADC accuracy, the
|
||||
* A/D converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param frequency The clock frequency that ADC operates at.
|
||||
* @retval true Calibration succeed.
|
||||
* @retval false Calibration failed.
|
||||
*/
|
||||
bool ADC_DoOffsetCalibration(ADC_Type *base, uint32_t frequency);
|
||||
#else
|
||||
/*!
|
||||
* @brief Do the hardware self-calibration.
|
||||
*
|
||||
* To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D
|
||||
* converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param frequency The clock frequency that ADC operates at.
|
||||
* @retval true Calibration succeed.
|
||||
* @retval false Calibration failed.
|
||||
*/
|
||||
bool ADC_DoSelfCalibration(ADC_Type *base, uint32_t frequency);
|
||||
#endif /* FSL_FEATURE_ADC_HAS_CALIB_REG */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC */
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_NO_INSEL) && FSL_FEATURE_ADC_HAS_NO_INSEL)
|
||||
/*!
|
||||
* @brief Enable the internal temperature sensor measurement.
|
||||
*
|
||||
* When enabling the internal temperature sensor measurement, the channel 0 would be connected to internal sensor
|
||||
* instead of external pin.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param enable Switcher to enable the feature or not.
|
||||
*/
|
||||
#if defined(FSL_FEATURE_ADC_ASYNC_SYSCON_TEMP) && (FSL_FEATURE_ADC_ASYNC_SYSCON_TEMP)
|
||||
void ADC_EnableTemperatureSensor(ADC_Type *base, bool enable);
|
||||
#else
|
||||
static inline void ADC_EnableTemperatureSensor(ADC_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->INSEL = (base->INSEL & ~ADC_INSEL_SEL_MASK) | ADC_INSEL_SEL(0x3);
|
||||
}
|
||||
else
|
||||
{
|
||||
base->INSEL = (base->INSEL & ~ADC_INSEL_SEL_MASK) | ADC_INSEL_SEL(0);
|
||||
}
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_ASYNC_SYSCON_TEMP. */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_NO_INSEL. */
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Control conversion sequence A.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enable the conversion sequence A.
|
||||
*
|
||||
* In order to avoid spuriously triggering the sequence, the trigger to conversion sequence should be ready before the
|
||||
* sequence is ready. when the sequence is disabled, the trigger would be ignored. Also, it is suggested to disable the
|
||||
* sequence during changing the sequence's setting.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param enable Switcher to enable the feature or not.
|
||||
*/
|
||||
static inline void ADC_EnableConvSeqA(ADC_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->SEQ_CTRL[0] |= ADC_SEQ_CTRL_SEQ_ENA_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->SEQ_CTRL[0] &= ~ADC_SEQ_CTRL_SEQ_ENA_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Configure the conversion sequence A.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param config Pointer to configuration structure, see to #adc_conv_seq_config_t.
|
||||
*/
|
||||
void ADC_SetConvSeqAConfig(ADC_Type *base, const adc_conv_seq_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Do trigger the sequence's conversion by software.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
*/
|
||||
static inline void ADC_DoSoftwareTriggerConvSeqA(ADC_Type *base)
|
||||
{
|
||||
base->SEQ_CTRL[0] |= ADC_SEQ_CTRL_START_MASK;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable the burst conversion of sequence A.
|
||||
*
|
||||
* Enable the burst mode would cause the conversion sequence to be cntinuously cycled through. Other triggers would be
|
||||
* ignored while this mode is enabled. Repeated conversions could be halted by disabling this mode. And the sequence
|
||||
* currently in process will be completed before cnversions are terminated.
|
||||
* Note that a new sequence could begin just before the burst mode is disabled.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param enable Switcher to enable this feature.
|
||||
*/
|
||||
static inline void ADC_EnableConvSeqABurstMode(ADC_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->SEQ_CTRL[0] |= ADC_SEQ_CTRL_BURST_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->SEQ_CTRL[0] &= ~ADC_SEQ_CTRL_BURST_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_SINGLE_SEQ) && FSL_FEATURE_ADC_HAS_SINGLE_SEQ)
|
||||
/*!
|
||||
* @brief Set the high priority for conversion sequence A.
|
||||
*
|
||||
* @param base ADC peripheral bass address.
|
||||
*/
|
||||
static inline void ADC_SetConvSeqAHighPriority(ADC_Type *base)
|
||||
{
|
||||
base->SEQ_CTRL[0] |= ADC_SEQ_CTRL_LOWPRIO_MASK;
|
||||
}
|
||||
#endif /* FSL_FEATURE_ADC_HAS_SINGLE_SEQ */
|
||||
|
||||
/* @} */
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_SINGLE_SEQ) && FSL_FEATURE_ADC_HAS_SINGLE_SEQ)
|
||||
/*!
|
||||
* @name Control conversion sequence B.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enable the conversion sequence B.
|
||||
*
|
||||
* In order to avoid spuriously triggering the sequence, the trigger to conversion sequence should be ready before the
|
||||
* sequence is ready. when the sequence is disabled, the trigger would be ignored. Also, it is suggested to disable the
|
||||
* sequence during changing the sequence's setting.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param enable Switcher to enable the feature or not.
|
||||
*/
|
||||
static inline void ADC_EnableConvSeqB(ADC_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->SEQ_CTRL[1] |= ADC_SEQ_CTRL_SEQ_ENA_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->SEQ_CTRL[1] &= ~ADC_SEQ_CTRL_SEQ_ENA_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Configure the conversion sequence B.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param config Pointer to configuration structure, see to #adc_conv_seq_config_t.
|
||||
*/
|
||||
void ADC_SetConvSeqBConfig(ADC_Type *base, const adc_conv_seq_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Do trigger the sequence's conversion by software.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
*/
|
||||
static inline void ADC_DoSoftwareTriggerConvSeqB(ADC_Type *base)
|
||||
{
|
||||
base->SEQ_CTRL[1] |= ADC_SEQ_CTRL_START_MASK;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable the burst conversion of sequence B.
|
||||
*
|
||||
* Enable the burst mode would cause the conversion sequence to be continuously cycled through. Other triggers would be
|
||||
* ignored while this mode is enabled. Repeated conversions could be halted by disabling this mode. And the sequence
|
||||
* currently in process will be completed before cnversions are terminated.
|
||||
* Note that a new sequence could begin just before the burst mode is disabled.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param enable Switcher to enable this feature.
|
||||
*/
|
||||
static inline void ADC_EnableConvSeqBBurstMode(ADC_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->SEQ_CTRL[1] |= ADC_SEQ_CTRL_BURST_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->SEQ_CTRL[1] &= ~ADC_SEQ_CTRL_BURST_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set the high priority for conversion sequence B.
|
||||
*
|
||||
* @param base ADC peripheral bass address.
|
||||
*/
|
||||
static inline void ADC_SetConvSeqBHighPriority(ADC_Type *base)
|
||||
{
|
||||
base->SEQ_CTRL[0] &= ~ADC_SEQ_CTRL_LOWPRIO_MASK;
|
||||
}
|
||||
|
||||
/* @} */
|
||||
#endif /* FSL_FEATURE_ADC_HAS_SINGLE_SEQ */
|
||||
|
||||
/*!
|
||||
* @name Data result.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Get the global ADC conversion infomation of sequence A.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param info Pointer to information structure, see to #adc_result_info_t;
|
||||
* @retval true The conversion result is ready.
|
||||
* @retval false The conversion result is not ready yet.
|
||||
*/
|
||||
bool ADC_GetConvSeqAGlobalConversionResult(ADC_Type *base, adc_result_info_t *info);
|
||||
|
||||
#if !(defined(FSL_FEATURE_ADC_HAS_SINGLE_SEQ) && FSL_FEATURE_ADC_HAS_SINGLE_SEQ)
|
||||
/*!
|
||||
* @brief Get the global ADC conversion infomation of sequence B.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param info Pointer to information structure, see to #adc_result_info_t;
|
||||
* @retval true The conversion result is ready.
|
||||
* @retval false The conversion result is not ready yet.
|
||||
*/
|
||||
bool ADC_GetConvSeqBGlobalConversionResult(ADC_Type *base, adc_result_info_t *info);
|
||||
#endif /* FSL_FEATURE_ADC_HAS_SINGLE_SEQ */
|
||||
|
||||
/*!
|
||||
* @brief Get the channel's ADC conversion completed under each conversion sequence.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param channel The indicated channel number.
|
||||
* @param info Pointer to information structure, see to #adc_result_info_t;
|
||||
* @retval true The conversion result is ready.
|
||||
* @retval false The conversion result is not ready yet.
|
||||
*/
|
||||
bool ADC_GetChannelConversionResult(ADC_Type *base, uint32_t channel, adc_result_info_t *info);
|
||||
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Threshold function.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Set the threshhold pair 0 with low and high value.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param lowValue LOW threshold value.
|
||||
* @param highValue HIGH threshold value.
|
||||
*/
|
||||
static inline void ADC_SetThresholdPair0(ADC_Type *base, uint32_t lowValue, uint32_t highValue)
|
||||
{
|
||||
base->THR0_LOW = ADC_THR0_LOW_THRLOW(lowValue);
|
||||
base->THR0_HIGH = ADC_THR0_HIGH_THRHIGH(highValue);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set the threshhold pair 1 with low and high value.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param lowValue LOW threshold value. The available value is with 12-bit.
|
||||
* @param highValue HIGH threshold value. The available value is with 12-bit.
|
||||
*/
|
||||
static inline void ADC_SetThresholdPair1(ADC_Type *base, uint32_t lowValue, uint32_t highValue)
|
||||
{
|
||||
base->THR1_LOW = ADC_THR1_LOW_THRLOW(lowValue);
|
||||
base->THR1_HIGH = ADC_THR1_HIGH_THRHIGH(highValue);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set given channels to apply the threshold pare 0.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param channelMask Indicated channels' mask.
|
||||
*/
|
||||
static inline void ADC_SetChannelWithThresholdPair0(ADC_Type *base, uint32_t channelMask)
|
||||
{
|
||||
base->CHAN_THRSEL &= ~(channelMask);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set given channels to apply the threshold pare 1.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param channelMask Indicated channels' mask.
|
||||
*/
|
||||
static inline void ADC_SetChannelWithThresholdPair1(ADC_Type *base, uint32_t channelMask)
|
||||
{
|
||||
base->CHAN_THRSEL |= channelMask;
|
||||
}
|
||||
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Interrupts.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enable interrupts for conversion sequences.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param mask Mask of interrupt mask value for global block except each channal, see to #_adc_interrupt_enable.
|
||||
*/
|
||||
static inline void ADC_EnableInterrupts(ADC_Type *base, uint32_t mask)
|
||||
{
|
||||
base->INTEN |= (0x7UL & mask);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disable interrupts for conversion sequence.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param mask Mask of interrupt mask value for global block except each channel, see to #_adc_interrupt_enable.
|
||||
*/
|
||||
static inline void ADC_DisableInterrupts(ADC_Type *base, uint32_t mask)
|
||||
{
|
||||
base->INTEN &= ~(0x7UL & mask);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable the interrupt of threshold compare event for each channel.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param channel Channel number.
|
||||
* @param mode Interrupt mode for threshold compare event, see to #adc_threshold_interrupt_mode_t.
|
||||
*/
|
||||
static inline void ADC_EnableThresholdCompareInterrupt(ADC_Type *base,
|
||||
uint32_t channel,
|
||||
adc_threshold_interrupt_mode_t mode)
|
||||
{
|
||||
base->INTEN = (base->INTEN & ~(0x3UL << ((channel << 1UL) + 3UL))) | ((uint32_t)(mode) << ((channel << 1UL) + 3UL));
|
||||
}
|
||||
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Status.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Get status flags of ADC module.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @return Mask of status flags of module, see to #_adc_status_flags.
|
||||
*/
|
||||
static inline uint32_t ADC_GetStatusFlags(ADC_Type *base)
|
||||
{
|
||||
return base->FLAGS;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Clear status flags of ADC module.
|
||||
*
|
||||
* @param base ADC peripheral base address.
|
||||
* @param mask Mask of status flags of module, see to #_adc_status_flags.
|
||||
*/
|
||||
static inline void ADC_ClearStatusFlags(ADC_Type *base, uint32_t mask)
|
||||
{
|
||||
base->FLAGS = mask; /* Write 1 to clear. */
|
||||
}
|
||||
|
||||
/* @} */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/* @} */
|
||||
|
||||
#endif /* __FSL_ADC_H__ */
|
||||
1777
drivers/fsl_clock.c
Normal file
1777
drivers/fsl_clock.c
Normal file
File diff suppressed because it is too large
Load Diff
876
drivers/fsl_clock.h
Normal file
876
drivers/fsl_clock.h
Normal file
@@ -0,0 +1,876 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016 - 2019 , NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_CLOCK_H_
|
||||
#define _FSL_CLOCK_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*! @addtogroup clock */
|
||||
/*! @{ */
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
*****************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief CLOCK driver version 2.5.1. */
|
||||
#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 5, 1))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief User-defined the size of cache for CLOCK_PllGetConfig() function.
|
||||
*
|
||||
* Once define this MACRO to be non-zero value, CLOCK_PllGetConfig() function
|
||||
* would cache the recent calulation and accelerate the execution to get the
|
||||
* right settings.
|
||||
*/
|
||||
#ifndef CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT
|
||||
#define CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT 2U
|
||||
#endif
|
||||
|
||||
/* Definition for delay API in clock driver, users can redefine it to the real application. */
|
||||
#ifndef SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY
|
||||
#define SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY (150000000UL)
|
||||
#endif
|
||||
|
||||
/*! @brief Clock ip name array for FLEXCOMM. */
|
||||
#define FLEXCOMM_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_FlexComm0, kCLOCK_FlexComm1, kCLOCK_FlexComm2, kCLOCK_FlexComm3, kCLOCK_FlexComm4, kCLOCK_FlexComm5, \
|
||||
kCLOCK_FlexComm6, kCLOCK_FlexComm7 \
|
||||
}
|
||||
/*! @brief Clock ip name array for LPUART. */
|
||||
#define LPUART_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_MinUart0, kCLOCK_MinUart1, kCLOCK_MinUart2, kCLOCK_MinUart3, kCLOCK_MinUart4, kCLOCK_MinUart5, \
|
||||
kCLOCK_MinUart6, kCLOCK_MinUart7 \
|
||||
}
|
||||
|
||||
/*! @brief Clock ip name array for BI2C. */
|
||||
#define BI2C_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_BI2c0, kCLOCK_BI2c1, kCLOCK_BI2c2, kCLOCK_BI2c3, kCLOCK_BI2c4, kCLOCK_BI2c5, kCLOCK_BI2c6, kCLOCK_BI2c7 \
|
||||
}
|
||||
/*! @brief Clock ip name array for LSPI. */
|
||||
#define LPSI_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_LSpi0, kCLOCK_LSpi1, kCLOCK_LSpi2, kCLOCK_LSpi3, kCLOCK_LSpi4, kCLOCK_LSpi5, kCLOCK_LSpi6, kCLOCK_LSpi7 \
|
||||
}
|
||||
/*! @brief Clock ip name array for FLEXI2S. */
|
||||
#define FLEXI2S_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_FlexI2s0, kCLOCK_FlexI2s1, kCLOCK_FlexI2s2, kCLOCK_FlexI2s3, kCLOCK_FlexI2s4, kCLOCK_FlexI2s5, \
|
||||
kCLOCK_FlexI2s6, kCLOCK_FlexI2s7 \
|
||||
}
|
||||
/*! @brief Clock ip name array for UTICK. */
|
||||
#define UTICK_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Utick \
|
||||
}
|
||||
/*! @brief Clock ip name array for DMIC. */
|
||||
#define DMIC_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_DMic \
|
||||
}
|
||||
/*! @brief Clock ip name array for DMA. */
|
||||
#define DMA_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Dma \
|
||||
}
|
||||
/*! @brief Clock ip name array for CT32B. */
|
||||
#define CTIMER_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Ct32b0, kCLOCK_Ct32b1, kCLOCK_Ct32b2, kCLOCK_Ct32b3, kCLOCK_Ct32b4 \
|
||||
}
|
||||
|
||||
/*! @brief Clock ip name array for GPIO. */
|
||||
#define GPIO_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Gpio0, kCLOCK_Gpio1 \
|
||||
}
|
||||
/*! @brief Clock ip name array for ADC. */
|
||||
#define ADC_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Adc0 \
|
||||
}
|
||||
/*! @brief Clock ip name array for MRT. */
|
||||
#define MRT_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Mrt \
|
||||
}
|
||||
/*! @brief Clock ip name array for MRT. */
|
||||
#define SCT_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Sct0 \
|
||||
}
|
||||
/*! @brief Clock ip name array for RTC. */
|
||||
#define RTC_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Rtc \
|
||||
}
|
||||
/*! @brief Clock ip name array for WWDT. */
|
||||
#define WWDT_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Wwdt \
|
||||
}
|
||||
/*! @brief Clock ip name array for CRC. */
|
||||
#define CRC_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Crc \
|
||||
}
|
||||
/*! @brief Clock ip name array for USBD. */
|
||||
#define USBD_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Usbd0 \
|
||||
}
|
||||
|
||||
/*! @brief Clock ip name array for GINT. GINT0 & GINT1 share same slot */
|
||||
#define GINT_CLOCKS \
|
||||
{ \
|
||||
kCLOCK_Gint, kCLOCK_Gint \
|
||||
}
|
||||
|
||||
/*! @brief Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. */
|
||||
/*------------------------------------------------------------------------------
|
||||
clock_ip_name_t definition:
|
||||
------------------------------------------------------------------------------*/
|
||||
|
||||
#define CLK_GATE_REG_OFFSET_SHIFT 8U
|
||||
#define CLK_GATE_REG_OFFSET_MASK 0xFFFFFF00U
|
||||
#define CLK_GATE_BIT_SHIFT_SHIFT 0U
|
||||
#define CLK_GATE_BIT_SHIFT_MASK 0x000000FFU
|
||||
|
||||
#define CLK_GATE_DEFINE(reg_offset, bit_shift) \
|
||||
((((reg_offset) << CLK_GATE_REG_OFFSET_SHIFT) & CLK_GATE_REG_OFFSET_MASK) | \
|
||||
(((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
|
||||
|
||||
#define CLK_GATE_ABSTRACT_REG_OFFSET(x) (((uint32_t)(x)&CLK_GATE_REG_OFFSET_MASK) >> CLK_GATE_REG_OFFSET_SHIFT)
|
||||
#define CLK_GATE_ABSTRACT_BITS_SHIFT(x) (((uint32_t)(x)&CLK_GATE_BIT_SHIFT_MASK) >> CLK_GATE_BIT_SHIFT_SHIFT)
|
||||
|
||||
#define AHB_CLK_CTRL0 0
|
||||
#define AHB_CLK_CTRL1 1
|
||||
#define ASYNC_CLK_CTRL0 2
|
||||
|
||||
/*! @brief Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. */
|
||||
typedef enum _clock_ip_name
|
||||
{
|
||||
kCLOCK_IpInvalid = 0U,
|
||||
kCLOCK_Rom = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 1),
|
||||
kCLOCK_Sram1 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 3),
|
||||
kCLOCK_Sram2 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 4),
|
||||
kCLOCK_Regfile = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 6),
|
||||
kCLOCK_Flash = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 7),
|
||||
kCLOCK_Fmc = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 8),
|
||||
kCLOCK_InputMux = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 11),
|
||||
kCLOCK_Iocon = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 13),
|
||||
kCLOCK_Gpio0 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 14),
|
||||
kCLOCK_Gpio1 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 15),
|
||||
kCLOCK_Gpio2 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 16),
|
||||
kCLOCK_Gpio3 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 17),
|
||||
kCLOCK_Pint = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 18),
|
||||
kCLOCK_Gint = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 19), /* GPIO_GLOBALINT0 and GPIO_GLOBALINT1 share the same slot */
|
||||
kCLOCK_Dma = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 20),
|
||||
kCLOCK_Crc = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 21),
|
||||
kCLOCK_Wwdt = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 22),
|
||||
kCLOCK_Rtc = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 23),
|
||||
kCLOCK_Mailbox = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 26),
|
||||
kCLOCK_Adc0 = CLK_GATE_DEFINE(AHB_CLK_CTRL0, 27),
|
||||
kCLOCK_Mrt = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 0),
|
||||
kCLOCK_Sct0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 2),
|
||||
kCLOCK_SctIpu0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 6),
|
||||
kCLOCK_Utick = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 10),
|
||||
kCLOCK_FlexComm0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 11),
|
||||
kCLOCK_FlexComm1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 12),
|
||||
kCLOCK_FlexComm2 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 13),
|
||||
kCLOCK_FlexComm3 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 14),
|
||||
kCLOCK_FlexComm4 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 15),
|
||||
kCLOCK_FlexComm5 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 16),
|
||||
kCLOCK_FlexComm6 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 17),
|
||||
kCLOCK_FlexComm7 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 18),
|
||||
kCLOCK_MinUart0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 11),
|
||||
kCLOCK_MinUart1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 12),
|
||||
kCLOCK_MinUart2 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 13),
|
||||
kCLOCK_MinUart3 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 14),
|
||||
kCLOCK_MinUart4 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 15),
|
||||
kCLOCK_MinUart5 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 16),
|
||||
kCLOCK_MinUart6 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 17),
|
||||
kCLOCK_MinUart7 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 18),
|
||||
kCLOCK_LSpi0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 11),
|
||||
kCLOCK_LSpi1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 12),
|
||||
kCLOCK_LSpi2 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 13),
|
||||
kCLOCK_LSpi3 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 14),
|
||||
kCLOCK_LSpi4 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 15),
|
||||
kCLOCK_LSpi5 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 16),
|
||||
kCLOCK_LSpi6 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 17),
|
||||
kCLOCK_LSpi7 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 18),
|
||||
kCLOCK_BI2c0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 11),
|
||||
kCLOCK_BI2c1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 12),
|
||||
kCLOCK_BI2c2 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 13),
|
||||
kCLOCK_BI2c3 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 14),
|
||||
kCLOCK_BI2c4 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 15),
|
||||
kCLOCK_BI2c5 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 16),
|
||||
kCLOCK_BI2c6 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 17),
|
||||
kCLOCK_BI2c7 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 18),
|
||||
kCLOCK_FlexI2s0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 11),
|
||||
kCLOCK_FlexI2s1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 12),
|
||||
kCLOCK_FlexI2s2 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 13),
|
||||
kCLOCK_FlexI2s3 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 14),
|
||||
kCLOCK_FlexI2s4 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 15),
|
||||
kCLOCK_FlexI2s5 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 16),
|
||||
kCLOCK_FlexI2s6 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 17),
|
||||
kCLOCK_FlexI2s7 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 18),
|
||||
kCLOCK_DMic = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 19),
|
||||
kCLOCK_Ct32b2 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 22),
|
||||
kCLOCK_Usbd0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 25),
|
||||
kCLOCK_Ct32b0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 26),
|
||||
kCLOCK_Ct32b1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 27),
|
||||
kCLOCK_Pvtvf0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 28),
|
||||
kCLOCK_Pvtvf1 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 28),
|
||||
kCLOCK_BodyBias0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 29),
|
||||
kCLOCK_EzhArchB0 = CLK_GATE_DEFINE(AHB_CLK_CTRL1, 31),
|
||||
|
||||
kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13),
|
||||
kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14)
|
||||
} clock_ip_name_t;
|
||||
|
||||
/*! @brief Clock name used to get clock frequency. */
|
||||
typedef enum _clock_name
|
||||
{
|
||||
kCLOCK_CoreSysClk, /*!< Core/system clock (aka MAIN_CLK) */
|
||||
kCLOCK_BusClk, /*!< Bus clock (AHB clock) */
|
||||
kCLOCK_FroHf, /*!< FRO48/96 */
|
||||
kCLOCK_Fro12M, /*!< FRO12M */
|
||||
kCLOCK_ExtClk, /*!< External Clock */
|
||||
kCLOCK_PllOut, /*!< PLL Output */
|
||||
kCLOCK_UsbClk, /*!< USB input */
|
||||
kCLOCK_WdtOsc, /*!< Watchdog Oscillator */
|
||||
kCLOCK_Frg, /*!< Frg Clock */
|
||||
kCLOCK_AsyncApbClk, /*!< Async APB clock */
|
||||
kCLOCK_FlexI2S, /*!< FlexI2S clock */
|
||||
} clock_name_t;
|
||||
|
||||
/**
|
||||
* Clock source selections for the asynchronous APB clock
|
||||
*/
|
||||
typedef enum _async_clock_src
|
||||
{
|
||||
kCLOCK_AsyncMainClk = 0, /*!< Main System clock */
|
||||
kCLOCK_AsyncFro12Mhz, /*!< 12MHz FRO */
|
||||
} async_clock_src_t;
|
||||
|
||||
/*! @brief Clock Mux Switches
|
||||
* The encoding is as follows each connection identified is 32bits wide while 24bits are valuable
|
||||
* starting from LSB upwards
|
||||
*
|
||||
* [4 bits for choice, 0 means invalid choice] [8 bits mux ID]*
|
||||
*
|
||||
*/
|
||||
|
||||
#define CLK_ATTACH_ID(mux, sel, pos) ((((uint32_t)(mux) << 0U) | (((uint32_t)(sel) + 1UL) & 0xFU) << 8U) << ((pos)*12U))
|
||||
#define MUX_A(mux, sel) CLK_ATTACH_ID((mux), (sel), 0U)
|
||||
#define MUX_B(mux, sel, selector) (CLK_ATTACH_ID((mux), (sel), 1U) | ((selector) << 24U))
|
||||
|
||||
#define GET_ID_ITEM(connection) ((connection)&0xFFFU)
|
||||
#define GET_ID_NEXT_ITEM(connection) ((connection) >> 12U)
|
||||
#define GET_ID_ITEM_MUX(connection) (((uint8_t)(connection)) & 0xFFU)
|
||||
#define GET_ID_ITEM_SEL(connection) (uint8_t)(((((uint32_t)(connection)&0xF00U) >> 8U) - 1U))
|
||||
#define GET_ID_SELECTOR(connection) ((connection)&0xF000000U)
|
||||
|
||||
#define CM_MAINCLKSELA 0
|
||||
#define CM_MAINCLKSELB 1
|
||||
#define CM_CLKOUTCLKSELA 2
|
||||
#define CM_CLKOUTCLKSELB 3
|
||||
#define CM_SYSPLLCLKSEL 4
|
||||
#define CM_USBPLLCLKSEL 5
|
||||
#define CM_AUDPLLCLKSEL 6
|
||||
#define CM_SCTPLLCLKSEL 7
|
||||
#define CM_SPIFICLKSEL 8
|
||||
#define CM_ADCASYNCCLKSEL 9
|
||||
#define CM_USBCLKSEL 10
|
||||
#define CM_USB1CLKSEL 11
|
||||
#define CM_FXCOMCLKSEL0 12
|
||||
#define CM_FXCOMCLKSEL1 13
|
||||
#define CM_FXCOMCLKSEL2 14
|
||||
#define CM_FXCOMCLKSEL3 15
|
||||
#define CM_FXCOMCLKSEL4 16
|
||||
#define CM_FXCOMCLKSEL5 17
|
||||
#define CM_FXCOMCLKSEL6 18
|
||||
#define CM_FXCOMCLKSEL7 19
|
||||
#define CM_FXCOMCLKSEL8 20
|
||||
#define CM_FXCOMCLKSEL9 21
|
||||
#define CM_FXCOMCLKSEL10 22
|
||||
#define CM_FXCOMCLKSEL11 23
|
||||
#define CM_FXI2S0MCLKCLKSEL 24
|
||||
#define CM_FXI2S1MCLKCLKSEL 25
|
||||
#define CM_FRGCLKSEL 26
|
||||
#define CM_DMICCLKSEL 27
|
||||
|
||||
#define CM_ASYNCAPB 28U
|
||||
|
||||
typedef enum _clock_attach_id
|
||||
{
|
||||
|
||||
kFRO12M_to_MAIN_CLK = MUX_A(CM_MAINCLKSELA, 0) | MUX_B(CM_MAINCLKSELB, 0, 0),
|
||||
kEXT_CLK_to_MAIN_CLK = MUX_A(CM_MAINCLKSELA, 1) | MUX_B(CM_MAINCLKSELB, 0, 0),
|
||||
kWDT_OSC_to_MAIN_CLK = MUX_A(CM_MAINCLKSELA, 2) | MUX_B(CM_MAINCLKSELB, 0, 0),
|
||||
kFRO_HF_to_MAIN_CLK = MUX_A(CM_MAINCLKSELA, 3) | MUX_B(CM_MAINCLKSELB, 0, 0),
|
||||
kSYS_PLL_to_MAIN_CLK = MUX_A(CM_MAINCLKSELA, 0) | MUX_B(CM_MAINCLKSELB, 2, 0),
|
||||
kOSC32K_to_MAIN_CLK = MUX_A(CM_MAINCLKSELA, 0) | MUX_B(CM_MAINCLKSELB, 3, 0),
|
||||
|
||||
kFRO12M_to_SYS_PLL = MUX_A(CM_SYSPLLCLKSEL, 0),
|
||||
kEXT_CLK_to_SYS_PLL = MUX_A(CM_SYSPLLCLKSEL, 1),
|
||||
kWDT_OSC_to_SYS_PLL = MUX_A(CM_SYSPLLCLKSEL, 2),
|
||||
kOSC32K_to_SYS_PLL = MUX_A(CM_SYSPLLCLKSEL, 3),
|
||||
kNONE_to_SYS_PLL = MUX_A(CM_SYSPLLCLKSEL, 7),
|
||||
|
||||
kMAIN_CLK_to_ASYNC_APB = MUX_A(CM_ASYNCAPB, 0),
|
||||
kFRO12M_to_ASYNC_APB = MUX_A(CM_ASYNCAPB, 1),
|
||||
|
||||
kMAIN_CLK_to_ADC_CLK = MUX_A(CM_ADCASYNCCLKSEL, 0),
|
||||
kSYS_PLL_to_ADC_CLK = MUX_A(CM_ADCASYNCCLKSEL, 1),
|
||||
kFRO_HF_to_ADC_CLK = MUX_A(CM_ADCASYNCCLKSEL, 2),
|
||||
kNONE_to_ADC_CLK = MUX_A(CM_ADCASYNCCLKSEL, 7),
|
||||
|
||||
kMAIN_CLK_to_SPIFI_CLK = MUX_A(CM_SPIFICLKSEL, 0),
|
||||
kSYS_PLL_to_SPIFI_CLK = MUX_A(CM_SPIFICLKSEL, 1),
|
||||
kFRO_HF_to_SPIFI_CLK = MUX_A(CM_SPIFICLKSEL, 3),
|
||||
kNONE_to_SPIFI_CLK = MUX_A(CM_SPIFICLKSEL, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM0 = MUX_A(CM_FXCOMCLKSEL0, 0),
|
||||
kFRO_HF_to_FLEXCOMM0 = MUX_A(CM_FXCOMCLKSEL0, 1),
|
||||
kSYS_PLL_to_FLEXCOMM0 = MUX_A(CM_FXCOMCLKSEL0, 2),
|
||||
kMCLK_to_FLEXCOMM0 = MUX_A(CM_FXCOMCLKSEL0, 3),
|
||||
kFRG_to_FLEXCOMM0 = MUX_A(CM_FXCOMCLKSEL0, 4),
|
||||
kNONE_to_FLEXCOMM0 = MUX_A(CM_FXCOMCLKSEL0, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM1 = MUX_A(CM_FXCOMCLKSEL1, 0),
|
||||
kFRO_HF_to_FLEXCOMM1 = MUX_A(CM_FXCOMCLKSEL1, 1),
|
||||
kSYS_PLL_to_FLEXCOMM1 = MUX_A(CM_FXCOMCLKSEL1, 2),
|
||||
kMCLK_to_FLEXCOMM1 = MUX_A(CM_FXCOMCLKSEL1, 3),
|
||||
kFRG_to_FLEXCOMM1 = MUX_A(CM_FXCOMCLKSEL1, 4),
|
||||
kNONE_to_FLEXCOMM1 = MUX_A(CM_FXCOMCLKSEL1, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM2 = MUX_A(CM_FXCOMCLKSEL2, 0),
|
||||
kFRO_HF_to_FLEXCOMM2 = MUX_A(CM_FXCOMCLKSEL2, 1),
|
||||
kSYS_PLL_to_FLEXCOMM2 = MUX_A(CM_FXCOMCLKSEL2, 2),
|
||||
kMCLK_to_FLEXCOMM2 = MUX_A(CM_FXCOMCLKSEL2, 3),
|
||||
kFRG_to_FLEXCOMM2 = MUX_A(CM_FXCOMCLKSEL2, 4),
|
||||
kNONE_to_FLEXCOMM2 = MUX_A(CM_FXCOMCLKSEL2, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM3 = MUX_A(CM_FXCOMCLKSEL3, 0),
|
||||
kFRO_HF_to_FLEXCOMM3 = MUX_A(CM_FXCOMCLKSEL3, 1),
|
||||
kSYS_PLL_to_FLEXCOMM3 = MUX_A(CM_FXCOMCLKSEL3, 2),
|
||||
kMCLK_to_FLEXCOMM3 = MUX_A(CM_FXCOMCLKSEL3, 3),
|
||||
kFRG_to_FLEXCOMM3 = MUX_A(CM_FXCOMCLKSEL3, 4),
|
||||
kNONE_to_FLEXCOMM3 = MUX_A(CM_FXCOMCLKSEL3, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM4 = MUX_A(CM_FXCOMCLKSEL4, 0),
|
||||
kFRO_HF_to_FLEXCOMM4 = MUX_A(CM_FXCOMCLKSEL4, 1),
|
||||
kSYS_PLL_to_FLEXCOMM4 = MUX_A(CM_FXCOMCLKSEL4, 2),
|
||||
kMCLK_to_FLEXCOMM4 = MUX_A(CM_FXCOMCLKSEL4, 3),
|
||||
kFRG_to_FLEXCOMM4 = MUX_A(CM_FXCOMCLKSEL4, 4),
|
||||
kNONE_to_FLEXCOMM4 = MUX_A(CM_FXCOMCLKSEL4, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM5 = MUX_A(CM_FXCOMCLKSEL5, 0),
|
||||
kFRO_HF_to_FLEXCOMM5 = MUX_A(CM_FXCOMCLKSEL5, 1),
|
||||
kSYS_PLL_to_FLEXCOMM5 = MUX_A(CM_FXCOMCLKSEL5, 2),
|
||||
kMCLK_to_FLEXCOMM5 = MUX_A(CM_FXCOMCLKSEL5, 3),
|
||||
kFRG_to_FLEXCOMM5 = MUX_A(CM_FXCOMCLKSEL5, 4),
|
||||
kNONE_to_FLEXCOMM5 = MUX_A(CM_FXCOMCLKSEL5, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM6 = MUX_A(CM_FXCOMCLKSEL6, 0),
|
||||
kFRO_HF_to_FLEXCOMM6 = MUX_A(CM_FXCOMCLKSEL6, 1),
|
||||
kSYS_PLL_to_FLEXCOMM6 = MUX_A(CM_FXCOMCLKSEL6, 2),
|
||||
kMCLK_to_FLEXCOMM6 = MUX_A(CM_FXCOMCLKSEL6, 3),
|
||||
kFRG_to_FLEXCOMM6 = MUX_A(CM_FXCOMCLKSEL6, 4),
|
||||
kNONE_to_FLEXCOMM6 = MUX_A(CM_FXCOMCLKSEL6, 7),
|
||||
|
||||
kFRO12M_to_FLEXCOMM7 = MUX_A(CM_FXCOMCLKSEL7, 0),
|
||||
kFRO_HF_to_FLEXCOMM7 = MUX_A(CM_FXCOMCLKSEL7, 1),
|
||||
kSYS_PLL_to_FLEXCOMM7 = MUX_A(CM_FXCOMCLKSEL7, 2),
|
||||
kMCLK_to_FLEXCOMM7 = MUX_A(CM_FXCOMCLKSEL7, 3),
|
||||
kFRG_to_FLEXCOMM7 = MUX_A(CM_FXCOMCLKSEL7, 4),
|
||||
kNONE_to_FLEXCOMM7 = MUX_A(CM_FXCOMCLKSEL7, 7),
|
||||
|
||||
kMAIN_CLK_to_FRG = MUX_A(CM_FRGCLKSEL, 0),
|
||||
kSYS_PLL_to_FRG = MUX_A(CM_FRGCLKSEL, 1),
|
||||
kFRO12M_to_FRG = MUX_A(CM_FRGCLKSEL, 2),
|
||||
kFRO_HF_to_FRG = MUX_A(CM_FRGCLKSEL, 3),
|
||||
kNONE_to_FRG = MUX_A(CM_FRGCLKSEL, 7),
|
||||
|
||||
kFRO_HF_to_MCLK = MUX_A(CM_FXI2S0MCLKCLKSEL, 0),
|
||||
kSYS_PLL_to_MCLK = MUX_A(CM_FXI2S0MCLKCLKSEL, 1),
|
||||
kMAIN_CLK_to_MCLK = MUX_A(CM_FXI2S0MCLKCLKSEL, 2),
|
||||
kNONE_to_MCLK = MUX_A(CM_FXI2S0MCLKCLKSEL, 7),
|
||||
|
||||
kFRO12M_to_DMIC = MUX_A(CM_DMICCLKSEL, 0),
|
||||
kFRO_HF_to_DMIC = MUX_A(CM_DMICCLKSEL, 1),
|
||||
kSYS_PLL_to_DMIC = MUX_A(CM_DMICCLKSEL, 2),
|
||||
kMCLK_to_DMIC = MUX_A(CM_DMICCLKSEL, 3),
|
||||
kMAIN_CLK_to_DMIC = MUX_A(CM_DMICCLKSEL, 4),
|
||||
kWDT_CLK_to_DMIC = MUX_A(CM_DMICCLKSEL, 5),
|
||||
kNONE_to_DMIC = MUX_A(CM_DMICCLKSEL, 7),
|
||||
|
||||
kFRO_HF_to_USB_CLK = MUX_A(CM_USBCLKSEL, 0),
|
||||
kSYS_PLL_to_USB_CLK = MUX_A(CM_USBCLKSEL, 1),
|
||||
kMAIN_CLK_to_USB_CLK = MUX_A(CM_USBCLKSEL, 2),
|
||||
kNONE_to_USB_CLK = MUX_A(CM_USBCLKSEL, 7),
|
||||
|
||||
kMAIN_CLK_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 0),
|
||||
kEXT_CLK_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 1),
|
||||
kWDT_OSC_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 2),
|
||||
kFRO_HF_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 3),
|
||||
kSYS_PLL_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 4),
|
||||
kFRO12M_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 5),
|
||||
kOSC32K_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 6),
|
||||
kNONE_to_CLKOUT = MUX_A(CM_CLKOUTCLKSELA, 7),
|
||||
kNONE_to_NONE = (int)0x80000000U,
|
||||
} clock_attach_id_t;
|
||||
|
||||
/* Clock dividers */
|
||||
typedef enum _clock_div_name
|
||||
{
|
||||
kCLOCK_DivSystickClk = 0,
|
||||
kCLOCK_DivTraceClk = 1,
|
||||
kCLOCK_DivAhbClk = 32,
|
||||
kCLOCK_DivClkOut = 33,
|
||||
kCLOCK_DivSpifiClk = 36,
|
||||
kCLOCK_DivAdcAsyncClk = 37,
|
||||
kCLOCK_DivUsbClk = 38,
|
||||
kCLOCK_DivFrg = 40,
|
||||
kCLOCK_DivDmicClk = 42,
|
||||
kCLOCK_DivFxI2s0MClk = 43
|
||||
} clock_div_name_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
static inline void CLOCK_EnableClock(clock_ip_name_t clk)
|
||||
{
|
||||
uint32_t index = CLK_GATE_ABSTRACT_REG_OFFSET(clk);
|
||||
if (index < 2UL)
|
||||
{
|
||||
SYSCON->AHBCLKCTRLSET[index] = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));
|
||||
}
|
||||
else
|
||||
{
|
||||
ASYNC_SYSCON->ASYNCAPBCLKCTRLSET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));
|
||||
}
|
||||
}
|
||||
|
||||
static inline void CLOCK_DisableClock(clock_ip_name_t clk)
|
||||
{
|
||||
uint32_t index = CLK_GATE_ABSTRACT_REG_OFFSET(clk);
|
||||
if (index < 2UL)
|
||||
{
|
||||
SYSCON->AHBCLKCTRLCLR[index] = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));
|
||||
}
|
||||
else
|
||||
{
|
||||
ASYNC_SYSCON->ASYNCAPBCLKCTRLCLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));
|
||||
}
|
||||
}
|
||||
/**
|
||||
* @brief FLASH Access time definitions
|
||||
*/
|
||||
typedef enum _clock_flashtim
|
||||
{
|
||||
kCLOCK_Flash1Cycle = 0, /*!< Flash accesses use 1 CPU clock */
|
||||
kCLOCK_Flash2Cycle, /*!< Flash accesses use 2 CPU clocks */
|
||||
kCLOCK_Flash3Cycle, /*!< Flash accesses use 3 CPU clocks */
|
||||
kCLOCK_Flash4Cycle, /*!< Flash accesses use 4 CPU clocks */
|
||||
kCLOCK_Flash5Cycle, /*!< Flash accesses use 5 CPU clocks */
|
||||
kCLOCK_Flash6Cycle, /*!< Flash accesses use 6 CPU clocks */
|
||||
kCLOCK_Flash7Cycle, /*!< Flash accesses use 7 CPU clocks */
|
||||
} clock_flashtim_t;
|
||||
|
||||
/**
|
||||
* @brief Set FLASH memory access time in clocks
|
||||
* @param clks : Clock cycles for FLASH access
|
||||
* @return Nothing
|
||||
*/
|
||||
static inline void CLOCK_SetFLASHAccessCycles(clock_flashtim_t clks)
|
||||
{
|
||||
uint32_t tmp;
|
||||
|
||||
tmp = SYSCON->FLASHCFG & ~(SYSCON_FLASHCFG_FLASHTIM_MASK);
|
||||
|
||||
/* Don't alter lower bits */
|
||||
SYSCON->FLASHCFG = tmp | ((uint32_t)clks << SYSCON_FLASHCFG_FLASHTIM_SHIFT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the Core clock to given frequency (12, 48 or 96 MHz).
|
||||
* Turns on FRO and uses default CCO, if freq is 12000000, then high speed output is off, else high speed output is
|
||||
* enabled.
|
||||
* @param iFreq : Desired frequency (must be one of CLK_FRO_12MHZ or CLK_FRO_48MHZ or CLK_FRO_96MHZ)
|
||||
* @return returns success or fail status.
|
||||
*/
|
||||
status_t CLOCK_SetupFROClocking(uint32_t iFreq);
|
||||
/**
|
||||
* @brief Configure the clock selection muxes.
|
||||
* @param connection : Clock to be configured.
|
||||
* @return Nothing
|
||||
*/
|
||||
void CLOCK_AttachClk(clock_attach_id_t connection);
|
||||
/**
|
||||
* @brief Get the actual clock attach id.
|
||||
* This fuction uses the offset in input attach id, then it reads the actual source value in
|
||||
* the register and combine the offset to obtain an actual attach id.
|
||||
* @param attachId : Clock attach id to get.
|
||||
* @return Clock source value.
|
||||
*/
|
||||
clock_attach_id_t CLOCK_GetClockAttachId(clock_attach_id_t attachId);
|
||||
/**
|
||||
* @brief Setup peripheral clock dividers.
|
||||
* @param div_name : Clock divider name
|
||||
* @param divided_by_value: Value to be divided
|
||||
* @param reset : Whether to reset the divider counter.
|
||||
* @return Nothing
|
||||
*/
|
||||
void CLOCK_SetClkDiv(clock_div_name_t div_name, uint32_t divided_by_value, bool reset);
|
||||
/**
|
||||
* @brief Set the flash wait states for the input freuqency.
|
||||
* @param iFreq : Input frequency
|
||||
* @return Nothing
|
||||
*/
|
||||
void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t iFreq);
|
||||
/*! @brief Return Frequency of selected clock
|
||||
* @return Frequency of selected clock
|
||||
*/
|
||||
uint32_t CLOCK_GetFreq(clock_name_t clockName);
|
||||
|
||||
/*! @brief Return Input frequency for the Fractional baud rate generator
|
||||
* @return Input Frequency for FRG
|
||||
*/
|
||||
uint32_t CLOCK_GetFRGInputClock(void);
|
||||
|
||||
/*! @brief Return Input frequency for the DMIC
|
||||
* @return Input Frequency for DMIC
|
||||
*/
|
||||
uint32_t CLOCK_GetDmicClkFreq(void);
|
||||
|
||||
/*! @brief Return Input frequency for the FRG
|
||||
* @return Input Frequency for FRG
|
||||
*/
|
||||
uint32_t CLOCK_GetFrgClkFreq(void);
|
||||
|
||||
/*! @brief Set output of the Fractional baud rate generator
|
||||
* @param freq : Desired output frequency
|
||||
* @return Error Code 0 - fail 1 - success
|
||||
*/
|
||||
uint32_t CLOCK_SetFRGClock(uint32_t freq);
|
||||
|
||||
/*! @brief Return Frequency of FRO 12MHz
|
||||
* @return Frequency of FRO 12MHz
|
||||
*/
|
||||
uint32_t CLOCK_GetFro12MFreq(void);
|
||||
/*! @brief Return Frequency of External Clock
|
||||
* @return Frequency of External Clock. If no external clock is used returns 0.
|
||||
*/
|
||||
uint32_t CLOCK_GetExtClkFreq(void);
|
||||
/*! @brief Return Frequency of Watchdog Oscillator
|
||||
* @return Frequency of Watchdog Oscillator
|
||||
*/
|
||||
uint32_t CLOCK_GetWdtOscFreq(void);
|
||||
/*! @brief Return Frequency of High-Freq output of FRO
|
||||
* @return Frequency of High-Freq output of FRO
|
||||
*/
|
||||
uint32_t CLOCK_GetFroHfFreq(void);
|
||||
/*! @brief Return Frequency of USB
|
||||
* @return Frequency of USB
|
||||
*/
|
||||
uint32_t CLOCK_GetUsbClkFreq(void);
|
||||
/*! @brief Return Frequency of PLL
|
||||
* @return Frequency of PLL
|
||||
*/
|
||||
uint32_t CLOCK_GetPllOutFreq(void);
|
||||
/*! @brief Return Frequency of 32kHz osc
|
||||
* @return Frequency of 32kHz osc
|
||||
*/
|
||||
uint32_t CLOCK_GetOsc32KFreq(void);
|
||||
/*! @brief Return Frequency of Core System
|
||||
* @return Frequency of Core System
|
||||
*/
|
||||
uint32_t CLOCK_GetCoreSysClkFreq(void);
|
||||
/*! @brief Return Frequency of I2S MCLK Clock
|
||||
* @return Frequency of I2S MCLK Clock
|
||||
*/
|
||||
uint32_t CLOCK_GetI2SMClkFreq(void);
|
||||
/*! @brief Return Frequency of Flexcomm functional Clock
|
||||
* @return Frequency of Flexcomm functional Clock
|
||||
*/
|
||||
uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id);
|
||||
/*! @brief Return Frequency of Adc Clock
|
||||
* @return Frequency of Adc Clock.
|
||||
*/
|
||||
uint32_t CLOCK_GetAdcClkFreq(void);
|
||||
/*! @brief Return Asynchronous APB Clock source
|
||||
* @return Asynchronous APB CLock source
|
||||
*/
|
||||
__STATIC_INLINE async_clock_src_t CLOCK_GetAsyncApbClkSrc(void)
|
||||
{
|
||||
return (async_clock_src_t)((uint32_t)(ASYNC_SYSCON->ASYNCAPBCLKSELA & 0x3UL));
|
||||
}
|
||||
/*! @brief Return Frequency of Asynchronous APB Clock
|
||||
* @return Frequency of Asynchronous APB Clock Clock
|
||||
*/
|
||||
uint32_t CLOCK_GetAsyncApbClkFreq(void);
|
||||
/*! @brief Return System PLL input clock rate
|
||||
* @return System PLL input clock rate
|
||||
*/
|
||||
uint32_t CLOCK_GetSystemPLLInClockRate(void);
|
||||
|
||||
/*! @brief Return System PLL output clock rate
|
||||
* @param recompute : Forces a PLL rate recomputation if true
|
||||
* @return System PLL output clock rate
|
||||
* @note The PLL rate is cached in the driver in a variable as
|
||||
* the rate computation function can take some time to perform. It
|
||||
* is recommended to use 'false' with the 'recompute' parameter.
|
||||
*/
|
||||
uint32_t CLOCK_GetSystemPLLOutClockRate(bool recompute);
|
||||
|
||||
/*! @brief Enables and disables PLL bypass mode
|
||||
* @brief bypass : true to bypass PLL (PLL output = PLL input, false to disable bypass
|
||||
* @return System PLL output clock rate
|
||||
*/
|
||||
__STATIC_INLINE void CLOCK_SetBypassPLL(bool bypass)
|
||||
{
|
||||
if (bypass)
|
||||
{
|
||||
SYSCON->SYSPLLCTRL |= (1UL << SYSCON_SYSPLLCTRL_BYPASS_SHIFT);
|
||||
}
|
||||
else
|
||||
{
|
||||
SYSCON->SYSPLLCTRL &= ~(1UL << SYSCON_SYSPLLCTRL_BYPASS_SHIFT);
|
||||
}
|
||||
}
|
||||
|
||||
/*! @brief Check if PLL is locked or not
|
||||
* @return true if the PLL is locked, false if not locked
|
||||
*/
|
||||
__STATIC_INLINE bool CLOCK_IsSystemPLLLocked(void)
|
||||
{
|
||||
return (bool)((SYSCON->SYSPLLSTAT & SYSCON_SYSPLLSTAT_LOCK_MASK) != 0UL);
|
||||
}
|
||||
|
||||
/*! @brief Store the current PLL rate
|
||||
* @param rate: Current rate of the PLL
|
||||
* @return Nothing
|
||||
**/
|
||||
void CLOCK_SetStoredPLLClockRate(uint32_t rate);
|
||||
|
||||
/*! @brief PLL configuration structure flags for 'flags' field
|
||||
* These flags control how the PLL configuration function sets up the PLL setup structure.<br>
|
||||
*
|
||||
* When the PLL_CONFIGFLAG_USEINRATE flag is selected, the 'InputRate' field in the
|
||||
* configuration structure must be assigned with the expected PLL frequency. If the
|
||||
* PLL_CONFIGFLAG_USEINRATE is not used, 'InputRate' is ignored in the configuration
|
||||
* function and the driver will determine the PLL rate from the currently selected
|
||||
* PLL source. This flag might be used to configure the PLL input clock more accurately
|
||||
* when using the WDT oscillator or a more dyanmic CLKIN source.<br>
|
||||
*
|
||||
* When the PLL_CONFIGFLAG_FORCENOFRACT flag is selected, the PLL hardware for the
|
||||
* automatic bandwidth selection, Spread Spectrum (SS) support, and fractional M-divider
|
||||
* are not used.<br>
|
||||
*/
|
||||
#define PLL_CONFIGFLAG_USEINRATE (1U << 0U) /*!< Flag to use InputRate in PLL configuration structure for setup */
|
||||
#define PLL_CONFIGFLAG_FORCENOFRACT \
|
||||
(1U << 2U) /*!< Force non-fractional output mode, PLL output will not use the fractional, automatic bandwidth, or \
|
||||
SS hardware */
|
||||
|
||||
/*! @brief PLL Spread Spectrum (SS) Programmable modulation frequency
|
||||
* See (MF) field in the SYSPLLSSCTRL1 register in the UM.
|
||||
*/
|
||||
typedef enum _ss_progmodfm
|
||||
{
|
||||
kSS_MF_512 = (0 << 20), /*!< Nss = 512 (fm ? 3.9 - 7.8 kHz) */
|
||||
kSS_MF_384 = (1 << 20), /*!< Nss ?= 384 (fm ? 5.2 - 10.4 kHz) */
|
||||
kSS_MF_256 = (2 << 20), /*!< Nss = 256 (fm ? 7.8 - 15.6 kHz) */
|
||||
kSS_MF_128 = (3 << 20), /*!< Nss = 128 (fm ? 15.6 - 31.3 kHz) */
|
||||
kSS_MF_64 = (4 << 20), /*!< Nss = 64 (fm ? 32.3 - 64.5 kHz) */
|
||||
kSS_MF_32 = (5 << 20), /*!< Nss = 32 (fm ? 62.5- 125 kHz) */
|
||||
kSS_MF_24 = (6 << 20), /*!< Nss ?= 24 (fm ? 83.3- 166.6 kHz) */
|
||||
kSS_MF_16 = (7 << 20) /*!< Nss = 16 (fm ? 125- 250 kHz) */
|
||||
} ss_progmodfm_t;
|
||||
|
||||
/*! @brief PLL Spread Spectrum (SS) Programmable frequency modulation depth
|
||||
* See (MR) field in the SYSPLLSSCTRL1 register in the UM.
|
||||
*/
|
||||
typedef enum _ss_progmoddp
|
||||
{
|
||||
kSS_MR_K0 = (0 << 23), /*!< k = 0 (no spread spectrum) */
|
||||
kSS_MR_K1 = (1 << 23), /*!< k = 1 */
|
||||
kSS_MR_K1_5 = (2 << 23), /*!< k = 1.5 */
|
||||
kSS_MR_K2 = (3 << 23), /*!< k = 2 */
|
||||
kSS_MR_K3 = (4 << 23), /*!< k = 3 */
|
||||
kSS_MR_K4 = (5 << 23), /*!< k = 4 */
|
||||
kSS_MR_K6 = (6 << 23), /*!< k = 6 */
|
||||
kSS_MR_K8 = (7 << 23) /*!< k = 8 */
|
||||
} ss_progmoddp_t;
|
||||
|
||||
/*! @brief PLL Spread Spectrum (SS) Modulation waveform control
|
||||
* See (MC) field in the SYSPLLSSCTRL1 register in the UM.<br>
|
||||
* Compensation for low pass filtering of the PLL to get a triangular
|
||||
* modulation at the output of the PLL, giving a flat frequency spectrum.
|
||||
*/
|
||||
typedef enum _ss_modwvctrl
|
||||
{
|
||||
kSS_MC_NOC = (0 << 26), /*!< no compensation */
|
||||
kSS_MC_RECC = (2 << 26), /*!< recommended setting */
|
||||
kSS_MC_MAXC = (3 << 26), /*!< max. compensation */
|
||||
} ss_modwvctrl_t;
|
||||
|
||||
/*! @brief PLL configuration structure
|
||||
*
|
||||
* This structure can be used to configure the settings for a PLL
|
||||
* setup structure. Fill in the desired configuration for the PLL
|
||||
* and call the PLL setup function to fill in a PLL setup structure.
|
||||
*/
|
||||
typedef struct _pll_config
|
||||
{
|
||||
uint32_t desiredRate; /*!< Desired PLL rate in Hz */
|
||||
uint32_t inputRate; /*!< PLL input clock in Hz, only used if PLL_CONFIGFLAG_USEINRATE flag is set */
|
||||
uint32_t flags; /*!< PLL configuration flags, Or'ed value of PLL_CONFIGFLAG_* definitions */
|
||||
ss_progmodfm_t ss_mf; /*!< SS Programmable modulation frequency, only applicable when not using
|
||||
PLL_CONFIGFLAG_FORCENOFRACT flag */
|
||||
ss_progmoddp_t ss_mr; /*!< SS Programmable frequency modulation depth, only applicable when not using
|
||||
PLL_CONFIGFLAG_FORCENOFRACT flag */
|
||||
ss_modwvctrl_t
|
||||
ss_mc; /*!< SS Modulation waveform control, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag */
|
||||
bool mfDither; /*!< false for fixed modulation frequency or true for dithering, only applicable when not using
|
||||
PLL_CONFIGFLAG_FORCENOFRACT flag */
|
||||
|
||||
} pll_config_t;
|
||||
|
||||
/*! @brief PLL setup structure flags for 'flags' field
|
||||
* These flags control how the PLL setup function sets up the PLL
|
||||
*/
|
||||
#define PLL_SETUPFLAG_POWERUP (1U << 0U) /*!< Setup will power on the PLL after setup */
|
||||
#define PLL_SETUPFLAG_WAITLOCK (1U << 1U) /*!< Setup will wait for PLL to lock, implying the PLL will be pwoered on */
|
||||
#define PLL_SETUPFLAG_ADGVOLT (1U << 2U) /*!< Optimize system voltage for the new PLL rate */
|
||||
#define PLL_SETUPFLAG_USEFEEDBACKDIV2 (1U << 3U) /*!< Use feedback divider by 2 in divider path */
|
||||
|
||||
/*! @brief PLL setup structure
|
||||
* This structure can be used to pre-build a PLL setup configuration
|
||||
* at run-time and quickly set the PLL to the configuration. It can be
|
||||
* populated with the PLL setup function. If powering up or waiting
|
||||
* for PLL lock, the PLL input clock source should be configured prior
|
||||
* to PLL setup.
|
||||
*/
|
||||
typedef struct _pll_setup
|
||||
{
|
||||
uint32_t syspllctrl; /*!< PLL control register SYSPLLCTRL */
|
||||
uint32_t syspllndec; /*!< PLL NDEC register SYSPLLNDEC */
|
||||
uint32_t syspllpdec; /*!< PLL PDEC register SYSPLLPDEC */
|
||||
uint32_t syspllssctrl[2]; /*!< PLL SSCTL registers SYSPLLSSCTRL */
|
||||
uint32_t pllRate; /*!< Acutal PLL rate */
|
||||
uint32_t flags; /*!< PLL setup flags, Or'ed value of PLL_SETUPFLAG_* definitions */
|
||||
} pll_setup_t;
|
||||
|
||||
/*! @brief PLL status definitions
|
||||
*/
|
||||
typedef enum _pll_error
|
||||
{
|
||||
kStatus_PLL_Success = MAKE_STATUS(kStatusGroup_Generic, 0), /*!< PLL operation was successful */
|
||||
kStatus_PLL_OutputTooLow = MAKE_STATUS(kStatusGroup_Generic, 1), /*!< PLL output rate request was too low */
|
||||
kStatus_PLL_OutputTooHigh = MAKE_STATUS(kStatusGroup_Generic, 2), /*!< PLL output rate request was too high */
|
||||
kStatus_PLL_InputTooLow = MAKE_STATUS(kStatusGroup_Generic, 3), /*!< PLL input rate is too low */
|
||||
kStatus_PLL_InputTooHigh = MAKE_STATUS(kStatusGroup_Generic, 4), /*!< PLL input rate is too high */
|
||||
kStatus_PLL_OutsideIntLimit = MAKE_STATUS(kStatusGroup_Generic, 5) /*!< Requested output rate isn't possible */
|
||||
} pll_error_t;
|
||||
|
||||
/*! @brief USB clock source definition. */
|
||||
typedef enum _clock_usb_src
|
||||
{
|
||||
kCLOCK_UsbSrcFro = (uint32_t)kCLOCK_FroHf, /*!< Use FRO 96 or 48 MHz. */
|
||||
kCLOCK_UsbSrcSystemPll = (uint32_t)kCLOCK_PllOut, /*!< Use System PLL output. */
|
||||
kCLOCK_UsbSrcMainClock = (uint32_t)kCLOCK_CoreSysClk, /*!< Use Main clock. */
|
||||
kCLOCK_UsbSrcNone = SYSCON_USBCLKSEL_SEL(
|
||||
7) /*!< Use None, this may be selected in order to reduce power when no output is needed. */
|
||||
} clock_usb_src_t;
|
||||
|
||||
/*! @brief Return System PLL output clock rate from setup structure
|
||||
* @param pSetup : Pointer to a PLL setup structure
|
||||
* @return System PLL output clock rate calculated from the setup structure
|
||||
*/
|
||||
uint32_t CLOCK_GetSystemPLLOutFromSetup(pll_setup_t *pSetup);
|
||||
|
||||
/*! @brief Set PLL output based on the passed PLL setup data
|
||||
* @param pControl : Pointer to populated PLL control structure to generate setup with
|
||||
* @param pSetup : Pointer to PLL setup structure to be filled
|
||||
* @return PLL_ERROR_SUCCESS on success, or PLL setup error code
|
||||
* @note Actual frequency for setup may vary from the desired frequency based on the
|
||||
* accuracy of input clocks, rounding, non-fractional PLL mode, etc.
|
||||
*/
|
||||
pll_error_t CLOCK_SetupPLLData(pll_config_t *pControl, pll_setup_t *pSetup);
|
||||
|
||||
/*! @brief Set PLL output from PLL setup structure (precise frequency)
|
||||
* @param pSetup : Pointer to populated PLL setup structure
|
||||
* @param flagcfg : Flag configuration for PLL config structure
|
||||
* @return PLL_ERROR_SUCCESS on success, or PLL setup error code
|
||||
* @note This function will power off the PLL, setup the PLL with the
|
||||
* new setup data, and then optionally powerup the PLL, wait for PLL lock,
|
||||
* and adjust system voltages to the new PLL rate. The function will not
|
||||
* alter any source clocks (ie, main systen clock) that may use the PLL,
|
||||
* so these should be setup prior to and after exiting the function.
|
||||
*/
|
||||
pll_error_t CLOCK_SetupSystemPLLPrec(pll_setup_t *pSetup, uint32_t flagcfg);
|
||||
|
||||
/**
|
||||
* @brief Set PLL output from PLL setup structure (precise frequency)
|
||||
* @param pSetup : Pointer to populated PLL setup structure
|
||||
* @return kStatus_PLL_Success on success, or PLL setup error code
|
||||
* @note This function will power off the PLL, setup the PLL with the
|
||||
* new setup data, and then optionally powerup the PLL, wait for PLL lock,
|
||||
* and adjust system voltages to the new PLL rate. The function will not
|
||||
* alter any source clocks (ie, main systen clock) that may use the PLL,
|
||||
* so these should be setup prior to and after exiting the function.
|
||||
*/
|
||||
pll_error_t CLOCK_SetPLLFreq(const pll_setup_t *pSetup);
|
||||
|
||||
/*! @brief Set PLL output based on the multiplier and input frequency
|
||||
* @param multiply_by : multiplier
|
||||
* @param input_freq : Clock input frequency of the PLL
|
||||
* @return Nothing
|
||||
* @note Unlike the Chip_Clock_SetupSystemPLLPrec() function, this
|
||||
* function does not disable or enable PLL power, wait for PLL lock,
|
||||
* or adjust system voltages. These must be done in the application.
|
||||
* The function will not alter any source clocks (ie, main systen clock)
|
||||
* that may use the PLL, so these should be setup prior to and after
|
||||
* exiting the function.
|
||||
*/
|
||||
void CLOCK_SetupSystemPLLMult(uint32_t multiply_by, uint32_t input_freq);
|
||||
|
||||
/*! @brief Disable USB FS clock.
|
||||
*
|
||||
* Disable USB FS clock.
|
||||
*/
|
||||
static inline void CLOCK_DisableUsbfs0Clock(void)
|
||||
{
|
||||
CLOCK_DisableClock(kCLOCK_Usbd0);
|
||||
}
|
||||
bool CLOCK_EnableUsbfs0Clock(clock_usb_src_t src, uint32_t freq);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/*! @} */
|
||||
|
||||
#endif /* _FSL_CLOCK_H_ */
|
||||
311
drivers/fsl_common.c
Normal file
311
drivers/fsl_common.c
Normal file
@@ -0,0 +1,311 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_common.h"
|
||||
#define SDK_MEM_MAGIC_NUMBER 12345U
|
||||
|
||||
typedef struct _mem_align_control_block
|
||||
{
|
||||
uint16_t identifier; /*!< Identifier for the memory control block. */
|
||||
uint16_t offset; /*!< offset from aligned address to real address */
|
||||
} mem_align_cb_t;
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.common"
|
||||
#endif
|
||||
|
||||
#ifndef __GIC_PRIO_BITS
|
||||
#if defined(ENABLE_RAM_VECTOR_TABLE)
|
||||
uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler)
|
||||
{
|
||||
#ifdef __VECTOR_TABLE
|
||||
#undef __VECTOR_TABLE
|
||||
#endif
|
||||
|
||||
/* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */
|
||||
#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
|
||||
extern uint32_t Image$$VECTOR_ROM$$Base[];
|
||||
extern uint32_t Image$$VECTOR_RAM$$Base[];
|
||||
extern uint32_t Image$$RW_m_data$$Base[];
|
||||
|
||||
#define __VECTOR_TABLE Image$$VECTOR_ROM$$Base
|
||||
#define __VECTOR_RAM Image$$VECTOR_RAM$$Base
|
||||
#define __RAM_VECTOR_TABLE_SIZE (((uint32_t)Image$$RW_m_data$$Base - (uint32_t)Image$$VECTOR_RAM$$Base))
|
||||
#elif defined(__ICCARM__)
|
||||
extern uint32_t __RAM_VECTOR_TABLE_SIZE[];
|
||||
extern uint32_t __VECTOR_TABLE[];
|
||||
extern uint32_t __VECTOR_RAM[];
|
||||
#elif defined(__GNUC__)
|
||||
extern uint32_t __VECTOR_TABLE[];
|
||||
extern uint32_t __VECTOR_RAM[];
|
||||
extern uint32_t __RAM_VECTOR_TABLE_SIZE_BYTES[];
|
||||
uint32_t __RAM_VECTOR_TABLE_SIZE = (uint32_t)(__RAM_VECTOR_TABLE_SIZE_BYTES);
|
||||
#endif /* defined(__CC_ARM) || defined(__ARMCC_VERSION) */
|
||||
uint32_t n;
|
||||
uint32_t ret;
|
||||
uint32_t irqMaskValue;
|
||||
|
||||
irqMaskValue = DisableGlobalIRQ();
|
||||
if (SCB->VTOR != (uint32_t)__VECTOR_RAM)
|
||||
{
|
||||
/* Copy the vector table from ROM to RAM */
|
||||
for (n = 0; n < ((uint32_t)__RAM_VECTOR_TABLE_SIZE) / sizeof(uint32_t); n++)
|
||||
{
|
||||
__VECTOR_RAM[n] = __VECTOR_TABLE[n];
|
||||
}
|
||||
/* Point the VTOR to the position of vector table */
|
||||
SCB->VTOR = (uint32_t)__VECTOR_RAM;
|
||||
}
|
||||
|
||||
ret = __VECTOR_RAM[(int32_t)irq + 16];
|
||||
/* make sure the __VECTOR_RAM is noncachable */
|
||||
__VECTOR_RAM[(int32_t)irq + 16] = irqHandler;
|
||||
|
||||
EnableGlobalIRQ(irqMaskValue);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif /* ENABLE_RAM_VECTOR_TABLE. */
|
||||
#endif /* __GIC_PRIO_BITS. */
|
||||
|
||||
#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
|
||||
|
||||
/*
|
||||
* When FSL_FEATURE_POWERLIB_EXTEND is defined to non-zero value,
|
||||
* powerlib should be used instead of these functions.
|
||||
*/
|
||||
#if !(defined(FSL_FEATURE_POWERLIB_EXTEND) && (FSL_FEATURE_POWERLIB_EXTEND != 0))
|
||||
|
||||
/*
|
||||
* When the SYSCON STARTER registers are discontinuous, these functions are
|
||||
* implemented in fsl_power.c.
|
||||
*/
|
||||
#if !(defined(FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS) && FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS)
|
||||
|
||||
void EnableDeepSleepIRQ(IRQn_Type interrupt)
|
||||
{
|
||||
uint32_t intNumber = (uint32_t)interrupt;
|
||||
|
||||
uint32_t index = 0;
|
||||
|
||||
while (intNumber >= 32u)
|
||||
{
|
||||
index++;
|
||||
intNumber -= 32u;
|
||||
}
|
||||
|
||||
SYSCON->STARTERSET[index] = 1UL << intNumber;
|
||||
(void)EnableIRQ(interrupt); /* also enable interrupt at NVIC */
|
||||
}
|
||||
|
||||
void DisableDeepSleepIRQ(IRQn_Type interrupt)
|
||||
{
|
||||
uint32_t intNumber = (uint32_t)interrupt;
|
||||
|
||||
(void)DisableIRQ(interrupt); /* also disable interrupt at NVIC */
|
||||
uint32_t index = 0;
|
||||
|
||||
while (intNumber >= 32u)
|
||||
{
|
||||
index++;
|
||||
intNumber -= 32u;
|
||||
}
|
||||
|
||||
SYSCON->STARTERCLR[index] = 1UL << intNumber;
|
||||
}
|
||||
#endif /* FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS */
|
||||
#endif /* FSL_FEATURE_POWERLIB_EXTEND */
|
||||
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
|
||||
|
||||
void *SDK_Malloc(size_t size, size_t alignbytes)
|
||||
{
|
||||
mem_align_cb_t *p_cb = NULL;
|
||||
uint32_t alignedsize;
|
||||
|
||||
/* Check overflow. */
|
||||
alignedsize = SDK_SIZEALIGN(size, alignbytes);
|
||||
if (alignedsize < size)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (alignedsize > SIZE_MAX - alignbytes - sizeof(mem_align_cb_t))
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
alignedsize += alignbytes + sizeof(mem_align_cb_t);
|
||||
|
||||
union
|
||||
{
|
||||
void *pointer_value;
|
||||
uint32_t unsigned_value;
|
||||
} p_align_addr, p_addr;
|
||||
|
||||
p_addr.pointer_value = malloc(alignedsize);
|
||||
|
||||
if (p_addr.pointer_value == NULL)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
p_align_addr.unsigned_value = SDK_SIZEALIGN(p_addr.unsigned_value + sizeof(mem_align_cb_t), alignbytes);
|
||||
|
||||
p_cb = (mem_align_cb_t *)(p_align_addr.unsigned_value - 4U);
|
||||
p_cb->identifier = SDK_MEM_MAGIC_NUMBER;
|
||||
p_cb->offset = (uint16_t)(p_align_addr.unsigned_value - p_addr.unsigned_value);
|
||||
|
||||
return p_align_addr.pointer_value;
|
||||
}
|
||||
|
||||
void SDK_Free(void *ptr)
|
||||
{
|
||||
union
|
||||
{
|
||||
void *pointer_value;
|
||||
uint32_t unsigned_value;
|
||||
} p_free;
|
||||
p_free.pointer_value = ptr;
|
||||
mem_align_cb_t *p_cb = (mem_align_cb_t *)(p_free.unsigned_value - 4U);
|
||||
|
||||
if (p_cb->identifier != SDK_MEM_MAGIC_NUMBER)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
p_free.unsigned_value = p_free.unsigned_value - p_cb->offset;
|
||||
|
||||
free(p_free.pointer_value);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Delay function bases on while loop, every loop includes three instructions.
|
||||
*
|
||||
* @param count Counts of loop needed for dalay.
|
||||
*/
|
||||
#if defined(SDK_DELAY_USE_DWT) && defined(DWT)
|
||||
static void enableCpuCycleCounter(void)
|
||||
{
|
||||
/* Make sure the DWT trace fucntion is enabled. */
|
||||
if (CoreDebug_DEMCR_TRCENA_Msk != (CoreDebug_DEMCR_TRCENA_Msk & CoreDebug->DEMCR))
|
||||
{
|
||||
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
|
||||
}
|
||||
|
||||
/* CYCCNT not supported on this device. */
|
||||
assert(DWT_CTRL_NOCYCCNT_Msk != (DWT->CTRL & DWT_CTRL_NOCYCCNT_Msk));
|
||||
|
||||
/* Read CYCCNT directly if CYCCENT has already been enabled, otherwise enable CYCCENT first. */
|
||||
if (DWT_CTRL_CYCCNTENA_Msk != (DWT_CTRL_CYCCNTENA_Msk & DWT->CTRL))
|
||||
{
|
||||
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
|
||||
}
|
||||
}
|
||||
|
||||
static uint32_t getCpuCycleCount(void)
|
||||
{
|
||||
return DWT->CYCCNT;
|
||||
}
|
||||
#elif defined __XCC__
|
||||
extern uint32_t xthal_get_ccount(void);
|
||||
static void enableCpuCycleCounter(void)
|
||||
{
|
||||
/* do nothing */
|
||||
}
|
||||
|
||||
static uint32_t getCpuCycleCount(void)
|
||||
{
|
||||
return xthal_get_ccount();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef __XCC__
|
||||
#if (!defined(SDK_DELAY_USE_DWT)) || (!defined(DWT))
|
||||
#if defined(__CC_ARM) /* This macro is arm v5 specific */
|
||||
/* clang-format off */
|
||||
__ASM static void DelayLoop(uint32_t count)
|
||||
{
|
||||
loop
|
||||
SUBS R0, R0, #1
|
||||
CMP R0, #0
|
||||
BNE loop
|
||||
BX LR
|
||||
}
|
||||
/* clang-format on */
|
||||
#elif defined(__ARMCC_VERSION) || defined(__ICCARM__) || defined(__GNUC__)
|
||||
/* Cortex-M0 has a smaller instruction set, SUBS isn't supported in thumb-16 mode reported from __GNUC__ compiler,
|
||||
* use SUB and CMP here for compatibility */
|
||||
static void DelayLoop(uint32_t count)
|
||||
{
|
||||
__ASM volatile(" MOV R0, %0" : : "r"(count));
|
||||
__ASM volatile(
|
||||
"loop: \n"
|
||||
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
|
||||
" SUB R0, R0, #1 \n"
|
||||
#else
|
||||
" SUBS R0, R0, #1 \n"
|
||||
#endif
|
||||
" CMP R0, #0 \n"
|
||||
|
||||
" BNE loop \n");
|
||||
}
|
||||
#endif /* defined(__CC_ARM) */
|
||||
#endif /* (!defined(SDK_DELAY_USE_DWT)) || (!defined(DWT)) */
|
||||
#endif /* __XCC__ */
|
||||
/*!
|
||||
* @brief Delay at least for some time.
|
||||
* Please note that, if not uses DWT, this API will use while loop for delay, different run-time environments have
|
||||
* effect on the delay time. If precise delay is needed, please enable DWT delay. The two parmeters delayTime_us and
|
||||
* coreClock_Hz have limitation. For example, in the platform with 1GHz coreClock_Hz, the delayTime_us only supports
|
||||
* up to 4294967 in current code. If long time delay is needed, please implement a new delay function.
|
||||
*
|
||||
* @param delayTime_us Delay time in unit of microsecond.
|
||||
* @param coreClock_Hz Core clock frequency with Hz.
|
||||
*/
|
||||
void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)
|
||||
{
|
||||
assert(0U != delayTime_us);
|
||||
uint64_t count = USEC_TO_COUNT(delayTime_us, coreClock_Hz);
|
||||
assert(count <= UINT32_MAX);
|
||||
|
||||
#if defined(SDK_DELAY_USE_DWT) && defined(DWT) || (defined __XCC__) /* Use DWT for better accuracy */
|
||||
|
||||
enableCpuCycleCounter();
|
||||
/* Calculate the count ticks. */
|
||||
count += getCpuCycleCount();
|
||||
|
||||
if (count > UINT32_MAX)
|
||||
{
|
||||
count -= UINT32_MAX;
|
||||
/* Wait for cyccnt overflow. */
|
||||
while (count < getCpuCycleCount())
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/* Wait for cyccnt reach count value. */
|
||||
while (count > getCpuCycleCount())
|
||||
{
|
||||
}
|
||||
#else
|
||||
/* Divide value may be different in various environment to ensure delay is precise.
|
||||
* Every loop count includes three instructions, due to Cortex-M7 sometimes executes
|
||||
* two instructions in one period, through test here set divide 1.5. Other M cores use
|
||||
* divide 4. By the way, divide 1.5 or 4 could let the count lose precision, but it does
|
||||
* not matter because other instructions outside while loop is enough to fill the time.
|
||||
*/
|
||||
#if (__CORTEX_M == 7)
|
||||
count = count / 3U * 2U;
|
||||
#else
|
||||
count = count / 4U;
|
||||
#endif
|
||||
DelayLoop((uint32_t)count);
|
||||
#endif /* defined(SDK_DELAY_USE_DWT) && defined(DWT) || (defined __XCC__) */
|
||||
}
|
||||
954
drivers/fsl_common.h
Normal file
954
drivers/fsl_common.h
Normal file
@@ -0,0 +1,954 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_COMMON_H_
|
||||
#define _FSL_COMMON_H_
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#if defined(__ICCARM__) || (defined(__CC_ARM) || defined(__ARMCC_VERSION)) || defined(__GNUC__)
|
||||
#include <stddef.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* For CMSIS pack RTE.
|
||||
* CMSIS pack RTE generates "RTC_Components.h" which contains the statements
|
||||
* of the related <RTE_Components_h> element for all selected software components.
|
||||
*/
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h"
|
||||
#endif
|
||||
|
||||
#include "fsl_device_registers.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup ksdk_common
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Construct a status code value from a group and code number. */
|
||||
#define MAKE_STATUS(group, code) ((((group)*100) + (code)))
|
||||
|
||||
/*! @brief Construct the version number for drivers. */
|
||||
#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief common driver version. */
|
||||
#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 2, 9))
|
||||
/*@}*/
|
||||
|
||||
/* Debug console type definition. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console based on UART. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console based on LPUART. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console based on LPSCI. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console based on USBCDC. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console based on FLEXCOMM. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console based on i.MX UART. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console based on LPC_VUSART. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART 8U /*!< Debug console based on LPC_USART. */
|
||||
#define DEBUG_CONSOLE_DEVICE_TYPE_SWO 9U /*!< Debug console based on SWO. */
|
||||
|
||||
/*! @brief Status group numbers. */
|
||||
enum _status_groups
|
||||
{
|
||||
kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */
|
||||
kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */
|
||||
kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */
|
||||
kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */
|
||||
kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */
|
||||
kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */
|
||||
kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */
|
||||
kStatusGroup_LPI2C = 9, /*!< Group number for LPI2C status codes. */
|
||||
kStatusGroup_UART = 10, /*!< Group number for UART status codes. */
|
||||
kStatusGroup_I2C = 11, /*!< Group number for UART status codes. */
|
||||
kStatusGroup_LPSCI = 12, /*!< Group number for LPSCI status codes. */
|
||||
kStatusGroup_LPUART = 13, /*!< Group number for LPUART status codes. */
|
||||
kStatusGroup_SPI = 14, /*!< Group number for SPI status code.*/
|
||||
kStatusGroup_XRDC = 15, /*!< Group number for XRDC status code.*/
|
||||
kStatusGroup_SEMA42 = 16, /*!< Group number for SEMA42 status code.*/
|
||||
kStatusGroup_SDHC = 17, /*!< Group number for SDHC status code */
|
||||
kStatusGroup_SDMMC = 18, /*!< Group number for SDMMC status code */
|
||||
kStatusGroup_SAI = 19, /*!< Group number for SAI status code */
|
||||
kStatusGroup_MCG = 20, /*!< Group number for MCG status codes. */
|
||||
kStatusGroup_SCG = 21, /*!< Group number for SCG status codes. */
|
||||
kStatusGroup_SDSPI = 22, /*!< Group number for SDSPI status codes. */
|
||||
kStatusGroup_FLEXIO_I2S = 23, /*!< Group number for FLEXIO I2S status codes */
|
||||
kStatusGroup_FLEXIO_MCULCD = 24, /*!< Group number for FLEXIO LCD status codes */
|
||||
kStatusGroup_FLASHIAP = 25, /*!< Group number for FLASHIAP status codes */
|
||||
kStatusGroup_FLEXCOMM_I2C = 26, /*!< Group number for FLEXCOMM I2C status codes */
|
||||
kStatusGroup_I2S = 27, /*!< Group number for I2S status codes */
|
||||
kStatusGroup_IUART = 28, /*!< Group number for IUART status codes */
|
||||
kStatusGroup_CSI = 29, /*!< Group number for CSI status codes */
|
||||
kStatusGroup_MIPI_DSI = 30, /*!< Group number for MIPI DSI status codes */
|
||||
kStatusGroup_SDRAMC = 35, /*!< Group number for SDRAMC status codes. */
|
||||
kStatusGroup_POWER = 39, /*!< Group number for POWER status codes. */
|
||||
kStatusGroup_ENET = 40, /*!< Group number for ENET status codes. */
|
||||
kStatusGroup_PHY = 41, /*!< Group number for PHY status codes. */
|
||||
kStatusGroup_TRGMUX = 42, /*!< Group number for TRGMUX status codes. */
|
||||
kStatusGroup_SMARTCARD = 43, /*!< Group number for SMARTCARD status codes. */
|
||||
kStatusGroup_LMEM = 44, /*!< Group number for LMEM status codes. */
|
||||
kStatusGroup_QSPI = 45, /*!< Group number for QSPI status codes. */
|
||||
kStatusGroup_DMA = 50, /*!< Group number for DMA status codes. */
|
||||
kStatusGroup_EDMA = 51, /*!< Group number for EDMA status codes. */
|
||||
kStatusGroup_DMAMGR = 52, /*!< Group number for DMAMGR status codes. */
|
||||
kStatusGroup_FLEXCAN = 53, /*!< Group number for FlexCAN status codes. */
|
||||
kStatusGroup_LTC = 54, /*!< Group number for LTC status codes. */
|
||||
kStatusGroup_FLEXIO_CAMERA = 55, /*!< Group number for FLEXIO CAMERA status codes. */
|
||||
kStatusGroup_LPC_SPI = 56, /*!< Group number for LPC_SPI status codes. */
|
||||
kStatusGroup_LPC_USART = 57, /*!< Group number for LPC_USART status codes. */
|
||||
kStatusGroup_DMIC = 58, /*!< Group number for DMIC status codes. */
|
||||
kStatusGroup_SDIF = 59, /*!< Group number for SDIF status codes.*/
|
||||
kStatusGroup_SPIFI = 60, /*!< Group number for SPIFI status codes. */
|
||||
kStatusGroup_OTP = 61, /*!< Group number for OTP status codes. */
|
||||
kStatusGroup_MCAN = 62, /*!< Group number for MCAN status codes. */
|
||||
kStatusGroup_CAAM = 63, /*!< Group number for CAAM status codes. */
|
||||
kStatusGroup_ECSPI = 64, /*!< Group number for ECSPI status codes. */
|
||||
kStatusGroup_USDHC = 65, /*!< Group number for USDHC status codes.*/
|
||||
kStatusGroup_LPC_I2C = 66, /*!< Group number for LPC_I2C status codes.*/
|
||||
kStatusGroup_DCP = 67, /*!< Group number for DCP status codes.*/
|
||||
kStatusGroup_MSCAN = 68, /*!< Group number for MSCAN status codes.*/
|
||||
kStatusGroup_ESAI = 69, /*!< Group number for ESAI status codes. */
|
||||
kStatusGroup_FLEXSPI = 70, /*!< Group number for FLEXSPI status codes. */
|
||||
kStatusGroup_MMDC = 71, /*!< Group number for MMDC status codes. */
|
||||
kStatusGroup_PDM = 72, /*!< Group number for MIC status codes. */
|
||||
kStatusGroup_SDMA = 73, /*!< Group number for SDMA status codes. */
|
||||
kStatusGroup_ICS = 74, /*!< Group number for ICS status codes. */
|
||||
kStatusGroup_SPDIF = 75, /*!< Group number for SPDIF status codes. */
|
||||
kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */
|
||||
kStatusGroup_HASHCRYPT = 77, /*!< Group number for Hashcrypt status codes */
|
||||
kStatusGroup_LPC_SPI_SSP = 78, /*!< Group number for LPC_SPI_SSP status codes. */
|
||||
kStatusGroup_I3C = 79, /*!< Group number for I3C status codes */
|
||||
kStatusGroup_LPC_I2C_1 = 97, /*!< Group number for LPC_I2C_1 status codes. */
|
||||
kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */
|
||||
kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */
|
||||
kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */
|
||||
kStatusGroup_ApplicationRangeStart = 101, /*!< Starting number for application groups. */
|
||||
kStatusGroup_IAP = 102, /*!< Group number for IAP status codes */
|
||||
kStatusGroup_SFA = 103, /*!< Group number for SFA status codes*/
|
||||
kStatusGroup_SPC = 104, /*!< Group number for SPC status codes. */
|
||||
kStatusGroup_PUF = 105, /*!< Group number for PUF status codes. */
|
||||
kStatusGroup_TOUCH_PANEL = 106, /*!< Group number for touch panel status codes */
|
||||
|
||||
kStatusGroup_HAL_GPIO = 121, /*!< Group number for HAL GPIO status codes. */
|
||||
kStatusGroup_HAL_UART = 122, /*!< Group number for HAL UART status codes. */
|
||||
kStatusGroup_HAL_TIMER = 123, /*!< Group number for HAL TIMER status codes. */
|
||||
kStatusGroup_HAL_SPI = 124, /*!< Group number for HAL SPI status codes. */
|
||||
kStatusGroup_HAL_I2C = 125, /*!< Group number for HAL I2C status codes. */
|
||||
kStatusGroup_HAL_FLASH = 126, /*!< Group number for HAL FLASH status codes. */
|
||||
kStatusGroup_HAL_PWM = 127, /*!< Group number for HAL PWM status codes. */
|
||||
kStatusGroup_HAL_RNG = 128, /*!< Group number for HAL RNG status codes. */
|
||||
kStatusGroup_TIMERMANAGER = 135, /*!< Group number for TiMER MANAGER status codes. */
|
||||
kStatusGroup_SERIALMANAGER = 136, /*!< Group number for SERIAL MANAGER status codes. */
|
||||
kStatusGroup_LED = 137, /*!< Group number for LED status codes. */
|
||||
kStatusGroup_BUTTON = 138, /*!< Group number for BUTTON status codes. */
|
||||
kStatusGroup_EXTERN_EEPROM = 139, /*!< Group number for EXTERN EEPROM status codes. */
|
||||
kStatusGroup_SHELL = 140, /*!< Group number for SHELL status codes. */
|
||||
kStatusGroup_MEM_MANAGER = 141, /*!< Group number for MEM MANAGER status codes. */
|
||||
kStatusGroup_LIST = 142, /*!< Group number for List status codes. */
|
||||
kStatusGroup_OSA = 143, /*!< Group number for OSA status codes. */
|
||||
kStatusGroup_COMMON_TASK = 144, /*!< Group number for Common task status codes. */
|
||||
kStatusGroup_MSG = 145, /*!< Group number for messaging status codes. */
|
||||
kStatusGroup_SDK_OCOTP = 146, /*!< Group number for OCOTP status codes. */
|
||||
kStatusGroup_SDK_FLEXSPINOR = 147, /*!< Group number for FLEXSPINOR status codes.*/
|
||||
kStatusGroup_CODEC = 148, /*!< Group number for codec status codes. */
|
||||
kStatusGroup_ASRC = 149, /*!< Group number for codec status ASRC. */
|
||||
kStatusGroup_OTFAD = 150, /*!< Group number for codec status codes. */
|
||||
kStatusGroup_SDIOSLV = 151, /*!< Group number for SDIOSLV status codes. */
|
||||
kStatusGroup_MECC = 152, /*!< Group number for MECC status codes. */
|
||||
kStatusGroup_ENET_QOS = 153, /*!< Group number for ENET_QOS status codes. */
|
||||
kStatusGroup_LOG = 154, /*!< Group number for LOG status codes. */
|
||||
};
|
||||
|
||||
/*! \public
|
||||
* @brief Generic status return codes.
|
||||
*/
|
||||
enum
|
||||
{
|
||||
kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0), /*!< Generic status for Success. */
|
||||
kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1), /*!< Generic status for Fail. */
|
||||
kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2), /*!< Generic status for read only failure. */
|
||||
kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3), /*!< Generic status for out of range access. */
|
||||
kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4), /*!< Generic status for invalid argument check. */
|
||||
kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5), /*!< Generic status for timeout. */
|
||||
kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6), /*!< Generic status for no transfer in progress. */
|
||||
};
|
||||
|
||||
/*! @brief Type used for all status and error return values. */
|
||||
typedef int32_t status_t;
|
||||
|
||||
/*
|
||||
* Macro guard for whether to use default weak IRQ implementation in drivers
|
||||
*/
|
||||
#ifndef FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
|
||||
#define FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ 1
|
||||
#endif
|
||||
|
||||
/*! @name Min/max macros */
|
||||
/* @{ */
|
||||
#if !defined(MIN)
|
||||
#define MIN(a, b) (((a) < (b)) ? (a) : (b))
|
||||
#endif
|
||||
|
||||
#if !defined(MAX)
|
||||
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
|
||||
#endif
|
||||
/* @} */
|
||||
|
||||
/*! @brief Computes the number of elements in an array. */
|
||||
#if !defined(ARRAY_SIZE)
|
||||
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
|
||||
#endif
|
||||
|
||||
/*! @name UINT16_MAX/UINT32_MAX value */
|
||||
/* @{ */
|
||||
#if !defined(UINT16_MAX)
|
||||
#define UINT16_MAX ((uint16_t)-1)
|
||||
#endif
|
||||
|
||||
#if !defined(UINT32_MAX)
|
||||
#define UINT32_MAX ((uint32_t)-1)
|
||||
#endif
|
||||
/* @} */
|
||||
|
||||
/*! @name Timer utilities */
|
||||
/* @{ */
|
||||
/*! Macro to convert a microsecond period to raw count value */
|
||||
#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)(((uint64_t)(us) * (clockFreqInHz)) / 1000000U)
|
||||
/*! Macro to convert a raw count value to microsecond */
|
||||
#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count) * 1000000U / (clockFreqInHz))
|
||||
|
||||
/*! Macro to convert a millisecond period to raw count value */
|
||||
#define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)(ms) * (clockFreqInHz) / 1000U)
|
||||
/*! Macro to convert a raw count value to millisecond */
|
||||
#define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count) * 1000U / (clockFreqInHz))
|
||||
/* @} */
|
||||
|
||||
/*! @name ISR exit barrier
|
||||
* @{
|
||||
*
|
||||
* ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
|
||||
* exception return operation might vector to incorrect interrupt.
|
||||
* For Cortex-M7, if core speed much faster than peripheral register write speed,
|
||||
* the peripheral interrupt flags may be still set after exiting ISR, this results to
|
||||
* the same error similar with errata 83869.
|
||||
*/
|
||||
#if (defined __CORTEX_M) && ((__CORTEX_M == 4U) || (__CORTEX_M == 7U))
|
||||
#define SDK_ISR_EXIT_BARRIER __DSB()
|
||||
#else
|
||||
#define SDK_ISR_EXIT_BARRIER
|
||||
#endif
|
||||
|
||||
/* @} */
|
||||
|
||||
/*! @name Alignment variable definition macros */
|
||||
/* @{ */
|
||||
#if (defined(__ICCARM__))
|
||||
/**
|
||||
* Workaround to disable MISRA C message suppress warnings for IAR compiler.
|
||||
* http:/ /supp.iar.com/Support/?note=24725
|
||||
*/
|
||||
_Pragma("diag_suppress=Pm120")
|
||||
#define SDK_PRAGMA(x) _Pragma(#x)
|
||||
_Pragma("diag_error=Pm120")
|
||||
/*! Macro to define a variable with alignbytes alignment */
|
||||
#define SDK_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
|
||||
/*! Macro to define a variable with L1 d-cache line size alignment */
|
||||
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
|
||||
#define SDK_L1DCACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) var
|
||||
#endif
|
||||
/*! Macro to define a variable with L2 cache line size alignment */
|
||||
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
|
||||
#define SDK_L2CACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L2CACHE_LINESIZE_BYTE) var
|
||||
#endif
|
||||
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
|
||||
/*! Macro to define a variable with alignbytes alignment */
|
||||
#define SDK_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var
|
||||
/*! Macro to define a variable with L1 d-cache line size alignment */
|
||||
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
|
||||
#define SDK_L1DCACHE_ALIGN(var) __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))) var
|
||||
#endif
|
||||
/*! Macro to define a variable with L2 cache line size alignment */
|
||||
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
|
||||
#define SDK_L2CACHE_ALIGN(var) __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE))) var
|
||||
#endif
|
||||
#elif defined(__GNUC__)
|
||||
/*! Macro to define a variable with alignbytes alignment */
|
||||
#define SDK_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
|
||||
/*! Macro to define a variable with L1 d-cache line size alignment */
|
||||
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
|
||||
#define SDK_L1DCACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)))
|
||||
#endif
|
||||
/*! Macro to define a variable with L2 cache line size alignment */
|
||||
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
|
||||
#define SDK_L2CACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)))
|
||||
#endif
|
||||
#else
|
||||
#error Toolchain not supported
|
||||
#define SDK_ALIGN(var, alignbytes) var
|
||||
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
|
||||
#define SDK_L1DCACHE_ALIGN(var) var
|
||||
#endif
|
||||
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
|
||||
#define SDK_L2CACHE_ALIGN(var) var
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*! Macro to change a value to a given size aligned value */
|
||||
#define SDK_SIZEALIGN(var, alignbytes) \
|
||||
((unsigned int)((var) + ((alignbytes)-1U)) & (unsigned int)(~(unsigned int)((alignbytes)-1U)))
|
||||
/* @} */
|
||||
|
||||
/*! @name Non-cacheable region definition macros */
|
||||
/* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or
|
||||
* "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable variables,
|
||||
* please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them, these zero-inited variables
|
||||
* will be initialized to zero in system startup.
|
||||
*/
|
||||
/* @{ */
|
||||
#if (defined(__ICCARM__))
|
||||
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
|
||||
#define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable"
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable"
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init"
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init"
|
||||
#else
|
||||
#define AT_NONCACHEABLE_SECTION(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
|
||||
#endif
|
||||
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
|
||||
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
|
||||
__attribute__((section("NonCacheable.init"))) __attribute__((aligned(alignbytes))) var
|
||||
#if(defined(__CC_ARM))
|
||||
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
|
||||
__attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var
|
||||
#else
|
||||
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section(".bss.NonCacheable"))) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
|
||||
__attribute__((section(".bss.NonCacheable"))) __attribute__((aligned(alignbytes))) var
|
||||
#endif
|
||||
#else
|
||||
#define AT_NONCACHEABLE_SECTION(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) __attribute__((aligned(alignbytes))) var
|
||||
#endif
|
||||
#elif(defined(__XCC__))
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
|
||||
__attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
|
||||
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"))) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
|
||||
__attribute__((section("NonCacheable"))) var __attribute__((aligned(alignbytes)))
|
||||
#elif(defined(__GNUC__))
|
||||
/* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA"
|
||||
* in your projects to make sure the non-cacheable section variables will be initialized in system startup.
|
||||
*/
|
||||
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
|
||||
__attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
|
||||
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
|
||||
__attribute__((section("NonCacheable,\"aw\",%nobits @"))) var __attribute__((aligned(alignbytes)))
|
||||
#else
|
||||
#define AT_NONCACHEABLE_SECTION(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var __attribute__((aligned(alignbytes)))
|
||||
#endif
|
||||
#else
|
||||
#error Toolchain not supported.
|
||||
#define AT_NONCACHEABLE_SECTION(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var
|
||||
#define AT_NONCACHEABLE_SECTION_INIT(var) var
|
||||
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var
|
||||
#endif
|
||||
/* @} */
|
||||
|
||||
/*! @name Time sensitive region */
|
||||
/* @{ */
|
||||
#if defined(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) && FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE
|
||||
#if (defined(__ICCARM__))
|
||||
#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
|
||||
#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"
|
||||
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
|
||||
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
|
||||
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
|
||||
#elif(defined(__GNUC__))
|
||||
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
|
||||
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
|
||||
#else
|
||||
#error Toolchain not supported.
|
||||
#endif /* defined(__ICCARM__) */
|
||||
#else
|
||||
#if (defined(__ICCARM__))
|
||||
#define AT_QUICKACCESS_SECTION_CODE(func) func
|
||||
#define AT_QUICKACCESS_SECTION_DATA(func) func
|
||||
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
|
||||
#define AT_QUICKACCESS_SECTION_CODE(func) func
|
||||
#define AT_QUICKACCESS_SECTION_DATA(func) func
|
||||
#elif(defined(__GNUC__))
|
||||
#define AT_QUICKACCESS_SECTION_CODE(func) func
|
||||
#define AT_QUICKACCESS_SECTION_DATA(func) func
|
||||
#else
|
||||
#error Toolchain not supported.
|
||||
#endif
|
||||
#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
|
||||
/* @} */
|
||||
|
||||
/*! @name Ram Function */
|
||||
#if (defined(__ICCARM__))
|
||||
#define RAMFUNCTION_SECTION_CODE(func) func @"RamFunction"
|
||||
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
|
||||
#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
|
||||
#elif(defined(__GNUC__))
|
||||
#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
|
||||
#else
|
||||
#error Toolchain not supported.
|
||||
#endif /* defined(__ICCARM__) */
|
||||
/* @} */
|
||||
|
||||
/*! @name Suppress fallthrough warning macro */
|
||||
/* For switch case code block, if case section ends without "break;" statement, there wil be
|
||||
fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc.
|
||||
To suppress this warning, "SUPPRESS_FALL_THROUGH_WARNING();" need to be added at the end of each
|
||||
case section which misses "break;"statement.
|
||||
*/
|
||||
/* @{ */
|
||||
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
|
||||
#define SUPPRESS_FALL_THROUGH_WARNING() __attribute__ ((fallthrough))
|
||||
#else
|
||||
#define SUPPRESS_FALL_THROUGH_WARNING()
|
||||
#endif
|
||||
/* @} */
|
||||
|
||||
/*! @name Atomic modification
|
||||
*
|
||||
* These macros are used for atomic access, such as read-modify-write
|
||||
* to the peripheral registers.
|
||||
*
|
||||
* - SDK_ATOMIC_LOCAL_ADD
|
||||
* - SDK_ATOMIC_LOCAL_SET
|
||||
* - SDK_ATOMIC_LOCAL_CLEAR
|
||||
* - SDK_ATOMIC_LOCAL_TOGGLE
|
||||
* - SDK_ATOMIC_LOCAL_CLEAR_AND_SET
|
||||
*
|
||||
* Take SDK_ATOMIC_LOCAL_CLEAR_AND_SET as an example: the parameter @c addr
|
||||
* means the address of the peripheral register or variable you want to modify
|
||||
* atomically, the parameter @c clearBits is the bits to clear, the parameter
|
||||
* @c setBits it the bits to set.
|
||||
* For example, to set a 32-bit register bit1:bit0 to 0b10, use like this:
|
||||
*
|
||||
* @code
|
||||
volatile uint32_t * reg = (volatile uint32_t *)REG_ADDR;
|
||||
|
||||
SDK_ATOMIC_LOCAL_CLEAR_AND_SET(reg, 0x03, 0x02);
|
||||
@endcode
|
||||
*
|
||||
* In this example, the register bit1:bit0 are cleared and bit1 is set, as a result,
|
||||
* register bit1:bit0 = 0b10.
|
||||
*
|
||||
* @note For the platforms don't support exclusive load and store, these macros
|
||||
* disable the global interrupt to pretect the modification.
|
||||
*
|
||||
* @note These macros only guarantee the local processor atomic operations. For
|
||||
* the multi-processor devices, use hardware semaphore such as SEMA42 to
|
||||
* guarantee exclusive access if necessary.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* clang-format off */
|
||||
#if ((defined(__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined(__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||||
(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
|
||||
/* clang-format on */
|
||||
|
||||
/* If the LDREX and STREX are supported, use them. */
|
||||
#define _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, val, ops) \
|
||||
do \
|
||||
{ \
|
||||
(val) = __LDREXB(addr); \
|
||||
(ops); \
|
||||
} while (0UL != __STREXB((val), (addr)))
|
||||
|
||||
#define _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, val, ops) \
|
||||
do \
|
||||
{ \
|
||||
(val) = __LDREXH(addr); \
|
||||
(ops); \
|
||||
} while (0UL != __STREXH((val), (addr)))
|
||||
|
||||
#define _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, val, ops) \
|
||||
do \
|
||||
{ \
|
||||
(val) = __LDREXW(addr); \
|
||||
(ops); \
|
||||
} while (0UL != __STREXW((val), (addr)))
|
||||
|
||||
static inline void _SDK_AtomicLocalAdd1Byte(volatile uint8_t *addr, uint8_t val)
|
||||
{
|
||||
uint8_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val += val);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalAdd2Byte(volatile uint16_t *addr, uint16_t val)
|
||||
{
|
||||
uint16_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val += val);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalAdd4Byte(volatile uint32_t *addr, uint32_t val)
|
||||
{
|
||||
uint32_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val += val);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalSub1Byte(volatile uint8_t *addr, uint8_t val)
|
||||
{
|
||||
uint8_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val -= val);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalSub2Byte(volatile uint16_t *addr, uint16_t val)
|
||||
{
|
||||
uint16_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val -= val);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalSub4Byte(volatile uint32_t *addr, uint32_t val)
|
||||
{
|
||||
uint32_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val -= val);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalSet1Byte(volatile uint8_t *addr, uint8_t bits)
|
||||
{
|
||||
uint8_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val |= bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalSet2Byte(volatile uint16_t *addr, uint16_t bits)
|
||||
{
|
||||
uint16_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val |= bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalSet4Byte(volatile uint32_t *addr, uint32_t bits)
|
||||
{
|
||||
uint32_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val |= bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalClear1Byte(volatile uint8_t *addr, uint8_t bits)
|
||||
{
|
||||
uint8_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val &= ~bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalClear2Byte(volatile uint16_t *addr, uint16_t bits)
|
||||
{
|
||||
uint16_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val &= ~bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalClear4Byte(volatile uint32_t *addr, uint32_t bits)
|
||||
{
|
||||
uint32_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val &= ~bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalToggle1Byte(volatile uint8_t *addr, uint8_t bits)
|
||||
{
|
||||
uint8_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val ^= bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalToggle2Byte(volatile uint16_t *addr, uint16_t bits)
|
||||
{
|
||||
uint16_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val ^= bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalToggle4Byte(volatile uint32_t *addr, uint32_t bits)
|
||||
{
|
||||
uint32_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val ^= bits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalClearAndSet1Byte(volatile uint8_t *addr, uint8_t clearBits, uint8_t setBits)
|
||||
{
|
||||
uint8_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalClearAndSet2Byte(volatile uint16_t *addr, uint16_t clearBits, uint16_t setBits)
|
||||
{
|
||||
uint16_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
|
||||
}
|
||||
|
||||
static inline void _SDK_AtomicLocalClearAndSet4Byte(volatile uint32_t *addr, uint32_t clearBits, uint32_t setBits)
|
||||
{
|
||||
uint32_t s_val;
|
||||
|
||||
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
|
||||
}
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
|
||||
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalAdd1Byte((volatile void*)(addr), (val)) : \
|
||||
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalAdd2Byte((volatile void*)(addr), (val)) : \
|
||||
_SDK_AtomicLocalAdd4Byte((volatile void*)(addr), (val))))
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
|
||||
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalSet1Byte((volatile void*)(addr), (bits)) : \
|
||||
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalSet2Byte((volatile void*)(addr), (bits)) : \
|
||||
_SDK_AtomicLocalSet4Byte((volatile void*)(addr), (bits))))
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
|
||||
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalClear1Byte((volatile void*)(addr), (bits)) : \
|
||||
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalClear2Byte((volatile void*)(addr), (bits)) : \
|
||||
_SDK_AtomicLocalClear4Byte((volatile void*)(addr), (bits))))
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
|
||||
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalToggle1Byte((volatile void*)(addr), (bits)) : \
|
||||
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalToggle2Byte((volatile void*)(addr), (bits)) : \
|
||||
_SDK_AtomicLocalToggle4Byte((volatile void*)(addr), (bits))))
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
|
||||
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalClearAndSet1Byte((volatile void*)(addr), (clearBits), (setBits)) : \
|
||||
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalClearAndSet2Byte((volatile void*)(addr), (clearBits), (setBits)) : \
|
||||
_SDK_AtomicLocalClearAndSet4Byte((volatile void*)(addr), (clearBits), (setBits))))
|
||||
#else
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
|
||||
do { \
|
||||
uint32_t s_atomicOldInt; \
|
||||
s_atomicOldInt = DisableGlobalIRQ(); \
|
||||
*(addr) += (val); \
|
||||
EnableGlobalIRQ(s_atomicOldInt); \
|
||||
} while (0)
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
|
||||
do { \
|
||||
uint32_t s_atomicOldInt; \
|
||||
s_atomicOldInt = DisableGlobalIRQ(); \
|
||||
*(addr) |= (bits); \
|
||||
EnableGlobalIRQ(s_atomicOldInt); \
|
||||
} while (0)
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
|
||||
do { \
|
||||
uint32_t s_atomicOldInt; \
|
||||
s_atomicOldInt = DisableGlobalIRQ(); \
|
||||
*(addr) &= ~(bits); \
|
||||
EnableGlobalIRQ(s_atomicOldInt); \
|
||||
} while (0)
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
|
||||
do { \
|
||||
uint32_t s_atomicOldInt; \
|
||||
s_atomicOldInt = DisableGlobalIRQ(); \
|
||||
*(addr) ^= (bits); \
|
||||
EnableGlobalIRQ(s_atomicOldInt); \
|
||||
} while (0)
|
||||
|
||||
#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
|
||||
do { \
|
||||
uint32_t s_atomicOldInt; \
|
||||
s_atomicOldInt = DisableGlobalIRQ(); \
|
||||
*(addr) = (*(addr) & ~(clearBits)) | (setBits); \
|
||||
EnableGlobalIRQ(s_atomicOldInt); \
|
||||
} while (0)
|
||||
|
||||
#endif
|
||||
/* @} */
|
||||
|
||||
#if defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
||||
void DefaultISR(void);
|
||||
#endif
|
||||
/*
|
||||
* The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t
|
||||
* defined in previous of this file.
|
||||
*/
|
||||
#include "fsl_clock.h"
|
||||
|
||||
/*
|
||||
* Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral
|
||||
*/
|
||||
#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \
|
||||
(defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))
|
||||
#include "fsl_reset.h"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Enable specific interrupt.
|
||||
*
|
||||
* Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt
|
||||
* levels. For example, there are NVIC and intmux. Here the interrupts connected
|
||||
* to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
|
||||
* The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
|
||||
* to NVIC first then routed to core.
|
||||
*
|
||||
* This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts
|
||||
* is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
|
||||
*
|
||||
* @param interrupt The IRQ number.
|
||||
* @retval kStatus_Success Interrupt enabled successfully
|
||||
* @retval kStatus_Fail Failed to enable the interrupt
|
||||
*/
|
||||
static inline status_t EnableIRQ(IRQn_Type interrupt)
|
||||
{
|
||||
status_t status = kStatus_Success;
|
||||
|
||||
if (NotAvail_IRQn == interrupt)
|
||||
{
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
|
||||
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
|
||||
else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
|
||||
{
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
#endif
|
||||
|
||||
else
|
||||
{
|
||||
#if defined(__GIC_PRIO_BITS)
|
||||
GIC_EnableIRQ(interrupt);
|
||||
#else
|
||||
NVIC_EnableIRQ(interrupt);
|
||||
#endif
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disable specific interrupt.
|
||||
*
|
||||
* Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt
|
||||
* levels. For example, there are NVIC and intmux. Here the interrupts connected
|
||||
* to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
|
||||
* The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
|
||||
* to NVIC first then routed to core.
|
||||
*
|
||||
* This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts
|
||||
* is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
|
||||
*
|
||||
* @param interrupt The IRQ number.
|
||||
* @retval kStatus_Success Interrupt disabled successfully
|
||||
* @retval kStatus_Fail Failed to disable the interrupt
|
||||
*/
|
||||
static inline status_t DisableIRQ(IRQn_Type interrupt)
|
||||
{
|
||||
status_t status = kStatus_Success;
|
||||
|
||||
if (NotAvail_IRQn == interrupt)
|
||||
{
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
|
||||
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
|
||||
else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
|
||||
{
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
#endif
|
||||
|
||||
else
|
||||
{
|
||||
#if defined(__GIC_PRIO_BITS)
|
||||
GIC_DisableIRQ(interrupt);
|
||||
#else
|
||||
NVIC_DisableIRQ(interrupt);
|
||||
#endif
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disable the global IRQ
|
||||
*
|
||||
* Disable the global interrupt and return the current primask register. User is required to provided the primask
|
||||
* register for the EnableGlobalIRQ().
|
||||
*
|
||||
* @return Current primask value.
|
||||
*/
|
||||
static inline uint32_t DisableGlobalIRQ(void)
|
||||
{
|
||||
#if defined (__XCC__)
|
||||
return 0;
|
||||
#else
|
||||
#if defined(CPSR_I_Msk)
|
||||
uint32_t cpsr = __get_CPSR() & CPSR_I_Msk;
|
||||
|
||||
__disable_irq();
|
||||
|
||||
return cpsr;
|
||||
#else
|
||||
uint32_t regPrimask = __get_PRIMASK();
|
||||
|
||||
__disable_irq();
|
||||
|
||||
return regPrimask;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable the global IRQ
|
||||
*
|
||||
* Set the primask register with the provided primask value but not just enable the primask. The idea is for the
|
||||
* convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to
|
||||
* use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.
|
||||
*
|
||||
* @param primask value of primask register to be restored. The primask value is supposed to be provided by the
|
||||
* DisableGlobalIRQ().
|
||||
*/
|
||||
static inline void EnableGlobalIRQ(uint32_t primask)
|
||||
{
|
||||
#if defined (__XCC__)
|
||||
#else
|
||||
#if defined(CPSR_I_Msk)
|
||||
__set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);
|
||||
#else
|
||||
__set_PRIMASK(primask);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#if defined(ENABLE_RAM_VECTOR_TABLE)
|
||||
/*!
|
||||
* @brief install IRQ handler
|
||||
*
|
||||
* @param irq IRQ number
|
||||
* @param irqHandler IRQ handler address
|
||||
* @return The old IRQ handler address
|
||||
*/
|
||||
uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
#endif /* ENABLE_RAM_VECTOR_TABLE. */
|
||||
|
||||
#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
|
||||
|
||||
/*
|
||||
* When FSL_FEATURE_POWERLIB_EXTEND is defined to non-zero value,
|
||||
* powerlib should be used instead of these functions.
|
||||
*/
|
||||
#if !(defined(FSL_FEATURE_POWERLIB_EXTEND) && (FSL_FEATURE_POWERLIB_EXTEND != 0))
|
||||
/*!
|
||||
* @brief Enable specific interrupt for wake-up from deep-sleep mode.
|
||||
*
|
||||
* Enable the interrupt for wake-up from deep sleep mode.
|
||||
* Some interrupts are typically used in sleep mode only and will not occur during
|
||||
* deep-sleep mode because relevant clocks are stopped. However, it is possible to enable
|
||||
* those clocks (significantly increasing power consumption in the reduced power mode),
|
||||
* making these wake-ups possible.
|
||||
*
|
||||
* @note This function also enables the interrupt in the NVIC (EnableIRQ() is called internaly).
|
||||
*
|
||||
* @param interrupt The IRQ number.
|
||||
*/
|
||||
void EnableDeepSleepIRQ(IRQn_Type interrupt);
|
||||
|
||||
/*!
|
||||
* @brief Disable specific interrupt for wake-up from deep-sleep mode.
|
||||
*
|
||||
* Disable the interrupt for wake-up from deep sleep mode.
|
||||
* Some interrupts are typically used in sleep mode only and will not occur during
|
||||
* deep-sleep mode because relevant clocks are stopped. However, it is possible to enable
|
||||
* those clocks (significantly increasing power consumption in the reduced power mode),
|
||||
* making these wake-ups possible.
|
||||
*
|
||||
* @note This function also disables the interrupt in the NVIC (DisableIRQ() is called internaly).
|
||||
*
|
||||
* @param interrupt The IRQ number.
|
||||
*/
|
||||
void DisableDeepSleepIRQ(IRQn_Type interrupt);
|
||||
#endif /* FSL_FEATURE_POWERLIB_EXTEND */
|
||||
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
|
||||
|
||||
/*!
|
||||
* @brief Allocate memory with given alignment and aligned size.
|
||||
*
|
||||
* This is provided to support the dynamically allocated memory
|
||||
* used in cache-able region.
|
||||
* @param size The length required to malloc.
|
||||
* @param alignbytes The alignment size.
|
||||
* @retval The allocated memory.
|
||||
*/
|
||||
void *SDK_Malloc(size_t size, size_t alignbytes);
|
||||
|
||||
/*!
|
||||
* @brief Free memory.
|
||||
*
|
||||
* @param ptr The memory to be release.
|
||||
*/
|
||||
void SDK_Free(void *ptr);
|
||||
|
||||
/*!
|
||||
* @brief Delay at least for some time.
|
||||
* Please note that, this API uses while loop for delay, different run-time environments make the time not precise,
|
||||
* if precise delay count was needed, please implement a new delay function with hardware timer.
|
||||
*
|
||||
* @param delayTime_us Delay time in unit of microsecond.
|
||||
* @param coreClock_Hz Core clock frequency with Hz.
|
||||
*/
|
||||
void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @} */
|
||||
|
||||
#endif /* _FSL_COMMON_H_ */
|
||||
577
drivers/fsl_ctimer.c
Normal file
577
drivers/fsl_ctimer.c
Normal file
@@ -0,0 +1,577 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_ctimer.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.ctimer"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
/*!
|
||||
* @brief Gets the instance from the base address
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*
|
||||
* @return The Timer instance
|
||||
*/
|
||||
static uint32_t CTIMER_GetInstance(CTIMER_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief CTIMER generic IRQ handle function.
|
||||
*
|
||||
* @param index FlexCAN peripheral instance index.
|
||||
*/
|
||||
static void CTIMER_GenericIRQHandler(uint32_t index);
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
/*! @brief Pointers to Timer bases for each instance. */
|
||||
static CTIMER_Type *const s_ctimerBases[] = CTIMER_BASE_PTRS;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/*! @brief Pointers to Timer clocks for each instance. */
|
||||
static const clock_ip_name_t s_ctimerClocks[] = CTIMER_CLOCKS;
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_RESET) && (FSL_FEATURE_CTIMER_HAS_NO_RESET))
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_RESET_CONTROL) && FSL_SDK_DISABLE_DRIVER_RESET_CONTROL)
|
||||
#if defined(FSL_FEATURE_CTIMER_WRITE_ZERO_ASSERT_RESET) && FSL_FEATURE_CTIMER_WRITE_ZERO_ASSERT_RESET
|
||||
/*! @brief Pointers to Timer resets for each instance, writing a zero asserts the reset */
|
||||
static const reset_ip_name_t s_ctimerResets[] = CTIMER_RSTS_N;
|
||||
#else
|
||||
/*! @brief Pointers to Timer resets for each instance, writing a one asserts the reset */
|
||||
static const reset_ip_name_t s_ctimerResets[] = CTIMER_RSTS;
|
||||
#endif
|
||||
#endif
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_RESET_CONTROL */
|
||||
|
||||
/*! @brief Pointers real ISRs installed by drivers for each instance. */
|
||||
static ctimer_callback_t *s_ctimerCallback[sizeof(s_ctimerBases) / sizeof(s_ctimerBases[0])] = {0};
|
||||
|
||||
/*! @brief Callback type installed by drivers for each instance. */
|
||||
static ctimer_callback_type_t ctimerCallbackType[sizeof(s_ctimerBases) / sizeof(s_ctimerBases[0])] = {
|
||||
kCTIMER_SingleCallback};
|
||||
|
||||
/*! @brief Array to map timer instance to IRQ number. */
|
||||
static const IRQn_Type s_ctimerIRQ[] = CTIMER_IRQS;
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
static uint32_t CTIMER_GetInstance(CTIMER_Type *base)
|
||||
{
|
||||
uint32_t instance;
|
||||
uint32_t ctimerArrayCount = (sizeof(s_ctimerBases) / sizeof(s_ctimerBases[0]));
|
||||
|
||||
/* Find the instance index from base address mappings. */
|
||||
for (instance = 0; instance < ctimerArrayCount; instance++)
|
||||
{
|
||||
if (s_ctimerBases[instance] == base)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
assert(instance < ctimerArrayCount);
|
||||
|
||||
return instance;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Ungates the clock and configures the peripheral for basic operation.
|
||||
*
|
||||
* note This API should be called at the beginning of the application before using the driver.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param config Pointer to the user configuration structure.
|
||||
*/
|
||||
void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)
|
||||
{
|
||||
assert(config != NULL);
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Enable the timer clock*/
|
||||
CLOCK_EnableClock(s_ctimerClocks[CTIMER_GetInstance(base)]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_RESET_CONTROL) && FSL_SDK_DISABLE_DRIVER_RESET_CONTROL)
|
||||
/* Reset the module. */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_RESET) && (FSL_FEATURE_CTIMER_HAS_NO_RESET))
|
||||
RESET_PeripheralReset(s_ctimerResets[CTIMER_GetInstance(base)]);
|
||||
#endif
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_RESET_CONTROL */
|
||||
|
||||
/* Setup the cimer mode and count select */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
base->CTCR = CTIMER_CTCR_CTMODE(config->mode) | CTIMER_CTCR_CINSEL(config->input);
|
||||
#endif
|
||||
/* Setup the timer prescale value */
|
||||
base->PR = CTIMER_PR_PRVAL(config->prescale);
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Gates the timer clock.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
*/
|
||||
void CTIMER_Deinit(CTIMER_Type *base)
|
||||
{
|
||||
uint32_t index = CTIMER_GetInstance(base);
|
||||
/* Stop the timer */
|
||||
base->TCR &= ~CTIMER_TCR_CEN_MASK;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Disable the timer clock*/
|
||||
CLOCK_DisableClock(s_ctimerClocks[index]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
/* Disable IRQ at NVIC Level */
|
||||
(void)DisableIRQ(s_ctimerIRQ[index]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Fills in the timers configuration structure with the default settings.
|
||||
*
|
||||
* The default values are:
|
||||
* code
|
||||
* config->mode = kCTIMER_TimerMode;
|
||||
* config->input = kCTIMER_Capture_0;
|
||||
* config->prescale = 0;
|
||||
* endcode
|
||||
* param config Pointer to the user configuration structure.
|
||||
*/
|
||||
void CTIMER_GetDefaultConfig(ctimer_config_t *config)
|
||||
{
|
||||
assert(config != NULL);
|
||||
|
||||
/* Initializes the configure structure to zero. */
|
||||
(void)memset(config, 0, sizeof(*config));
|
||||
|
||||
/* Run as a timer */
|
||||
config->mode = kCTIMER_TimerMode;
|
||||
/* This field is ignored when mode is timer */
|
||||
config->input = kCTIMER_Capture_0;
|
||||
/* Timer counter is incremented on every APB bus clock */
|
||||
config->prescale = 0;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Configures the PWM signal parameters.
|
||||
*
|
||||
* Enables PWM mode on the match channel passed in and will then setup the match value
|
||||
* and other match parameters to generate a PWM signal.
|
||||
* This function can manually assign the specified channel to set the PWM cycle.
|
||||
*
|
||||
* note When setting PWM output from multiple output pins, all should use the same PWM
|
||||
* frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param pwmPeriodChannel Specify the channel to control the PWM period
|
||||
* param matchChannel Match pin to be used to output the PWM signal
|
||||
* param dutyCyclePercent PWM pulse width; the value should be between 0 to 100
|
||||
* param pwmFreq_Hz PWM signal frequency in Hz
|
||||
* param srcClock_Hz Timer counter clock in Hz
|
||||
* param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
|
||||
* if it is 0 then no interrupt will be generated.
|
||||
*
|
||||
* return kStatus_Success on success
|
||||
* kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle
|
||||
*/
|
||||
status_t CTIMER_SetupPwm(CTIMER_Type *base,
|
||||
const ctimer_match_t pwmPeriodChannel,
|
||||
ctimer_match_t matchChannel,
|
||||
uint8_t dutyCyclePercent,
|
||||
uint32_t pwmFreq_Hz,
|
||||
uint32_t srcClock_Hz,
|
||||
bool enableInt)
|
||||
{
|
||||
assert(pwmFreq_Hz > 0U);
|
||||
|
||||
uint32_t reg;
|
||||
uint32_t period, pulsePeriod = 0;
|
||||
uint32_t timerClock = srcClock_Hz / (base->PR + 1U);
|
||||
uint32_t index = CTIMER_GetInstance(base);
|
||||
|
||||
if (matchChannel == pwmPeriodChannel)
|
||||
{
|
||||
return kStatus_Fail;
|
||||
}
|
||||
|
||||
/* Enable PWM mode on the channel */
|
||||
base->PWMC |= (1UL << (uint32_t)matchChannel);
|
||||
|
||||
/* Clear the stop, reset and interrupt bits for this channel */
|
||||
reg = base->MCR;
|
||||
reg &=
|
||||
~(((uint32_t)((uint32_t)CTIMER_MCR_MR0R_MASK | (uint32_t)CTIMER_MCR_MR0S_MASK | (uint32_t)CTIMER_MCR_MR0I_MASK))
|
||||
<< ((uint32_t)matchChannel * 3U));
|
||||
|
||||
/* If call back function is valid then enable match interrupt for the channel */
|
||||
if (enableInt)
|
||||
{
|
||||
reg |= (((uint32_t)CTIMER_MCR_MR0I_MASK) << (CTIMER_MCR_MR0I_SHIFT + ((uint32_t)matchChannel * 3U)));
|
||||
}
|
||||
|
||||
/* Reset the counter when match on channel 3 */
|
||||
reg |= CTIMER_MCR_MR3R_MASK;
|
||||
|
||||
base->MCR = reg;
|
||||
|
||||
/* Calculate PWM period match value */
|
||||
period = (timerClock / pwmFreq_Hz) - 1U;
|
||||
|
||||
/* Calculate pulse width match value */
|
||||
if (dutyCyclePercent == 0U)
|
||||
{
|
||||
pulsePeriod = period + 1U;
|
||||
}
|
||||
else
|
||||
{
|
||||
pulsePeriod = (period * (100U - (uint32_t)dutyCyclePercent)) / 100U;
|
||||
}
|
||||
|
||||
/* Specified channel pwmPeriodChannel will define the PWM period */
|
||||
base->MR[pwmPeriodChannel] = period;
|
||||
|
||||
/* This will define the PWM pulse period */
|
||||
base->MR[matchChannel] = pulsePeriod;
|
||||
/* Clear status flags */
|
||||
CTIMER_ClearStatusFlags(base, ((uint32_t)CTIMER_IR_MR0INT_MASK) << (uint32_t)matchChannel);
|
||||
/* If call back function is valid then enable interrupt and update the call back function */
|
||||
if (enableInt)
|
||||
{
|
||||
(void)EnableIRQ(s_ctimerIRQ[index]);
|
||||
}
|
||||
|
||||
return kStatus_Success;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Configures the PWM signal parameters.
|
||||
*
|
||||
* Enables PWM mode on the match channel passed in and will then setup the match value
|
||||
* and other match parameters to generate a PWM signal.
|
||||
* This function can manually assign the specified channel to set the PWM cycle.
|
||||
*
|
||||
* note When setting PWM output from multiple output pins, all should use the same PWM
|
||||
* period
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param pwmPeriodChannel Specify the channel to control the PWM period
|
||||
* param matchChannel Match pin to be used to output the PWM signal
|
||||
* param pwmPeriod PWM period match value
|
||||
* param pulsePeriod Pulse width match value
|
||||
* param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
|
||||
* if it is 0 then no interrupt will be generated.
|
||||
*
|
||||
* return kStatus_Success on success
|
||||
* kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM period
|
||||
*/
|
||||
status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base,
|
||||
const ctimer_match_t pwmPeriodChannel,
|
||||
ctimer_match_t matchChannel,
|
||||
uint32_t pwmPeriod,
|
||||
uint32_t pulsePeriod,
|
||||
bool enableInt)
|
||||
{
|
||||
/* Some CTimers only have 16bits , so the value is limited*/
|
||||
#if defined(FSL_FEATURE_SOC_CTIMER16B) && FSL_FEATURE_SOC_CTIMER16B
|
||||
assert(!((FSL_FEATURE_CTIMER_BIT_SIZEn(base) < 32) && (pulsePeriod > 0xFFFFU)));
|
||||
#endif
|
||||
|
||||
uint32_t reg;
|
||||
uint32_t index = CTIMER_GetInstance(base);
|
||||
|
||||
if (matchChannel == pwmPeriodChannel)
|
||||
{
|
||||
return kStatus_Fail;
|
||||
}
|
||||
|
||||
/* Enable PWM mode on PWM pulse channel */
|
||||
base->PWMC |= (1UL << (uint32_t)matchChannel);
|
||||
|
||||
/* Clear the stop, reset and interrupt bits for PWM pulse channel */
|
||||
reg = base->MCR;
|
||||
reg &=
|
||||
~((uint32_t)((uint32_t)CTIMER_MCR_MR0R_MASK | (uint32_t)CTIMER_MCR_MR0S_MASK | (uint32_t)CTIMER_MCR_MR0I_MASK)
|
||||
<< ((uint32_t)matchChannel * 3U));
|
||||
|
||||
/* If call back function is valid then enable match interrupt for PWM pulse channel */
|
||||
if (enableInt)
|
||||
{
|
||||
reg |= (((uint32_t)CTIMER_MCR_MR0I_MASK) << (CTIMER_MCR_MR0I_SHIFT + ((uint32_t)matchChannel * 3U)));
|
||||
}
|
||||
|
||||
/* Reset the counter when match on PWM period channel (pwmPeriodChannel) */
|
||||
reg |= ((uint32_t)((uint32_t)CTIMER_MCR_MR0R_MASK) << ((uint32_t)pwmPeriodChannel * 3U));
|
||||
|
||||
base->MCR = reg;
|
||||
|
||||
/* Specified channel pwmPeriodChannel will define the PWM period */
|
||||
base->MR[pwmPeriodChannel] = pwmPeriod;
|
||||
|
||||
/* This will define the PWM pulse period */
|
||||
base->MR[matchChannel] = pulsePeriod;
|
||||
/* Clear status flags */
|
||||
CTIMER_ClearStatusFlags(base, ((uint32_t)CTIMER_IR_MR0INT_MASK) << (uint32_t)matchChannel);
|
||||
/* If call back function is valid then enable interrupt and update the call back function */
|
||||
if (enableInt)
|
||||
{
|
||||
(void)EnableIRQ(s_ctimerIRQ[index]);
|
||||
}
|
||||
|
||||
return kStatus_Success;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Updates the duty cycle of an active PWM signal.
|
||||
*
|
||||
* note Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution.
|
||||
* This function can manually assign the specified channel to set the PWM cycle.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param pwmPeriodChannel Specify the channel to control the PWM period
|
||||
* param matchChannel Match pin to be used to output the PWM signal
|
||||
* param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
|
||||
*/
|
||||
void CTIMER_UpdatePwmDutycycle(CTIMER_Type *base,
|
||||
const ctimer_match_t pwmPeriodChannel,
|
||||
ctimer_match_t matchChannel,
|
||||
uint8_t dutyCyclePercent)
|
||||
{
|
||||
uint32_t pulsePeriod = 0, period;
|
||||
|
||||
/* Specified channel pwmPeriodChannel defines the PWM period */
|
||||
period = base->MR[pwmPeriodChannel];
|
||||
|
||||
/* For 0% dutycyle, make pulse period greater than period so the event will never occur */
|
||||
if (dutyCyclePercent == 0U)
|
||||
{
|
||||
pulsePeriod = period + 1U;
|
||||
}
|
||||
else
|
||||
{
|
||||
pulsePeriod = (period * (100U - (uint32_t)dutyCyclePercent)) / 100U;
|
||||
}
|
||||
|
||||
/* Update dutycycle */
|
||||
base->MR[matchChannel] = pulsePeriod;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Setup the match register.
|
||||
*
|
||||
* User configuration is used to setup the match value and action to be taken when a match occurs.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param matchChannel Match register to configure
|
||||
* param config Pointer to the match configuration structure
|
||||
*/
|
||||
void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)
|
||||
{
|
||||
/* Some CTimers only have 16bits , so the value is limited*/
|
||||
#if defined(FSL_FEATURE_SOC_CTIMER16B) && FSL_FEATURE_SOC_CTIMER16B
|
||||
assert(!(FSL_FEATURE_CTIMER_BIT_SIZEn(base) < 32 && config->matchValue > 0xFFFFU));
|
||||
#endif
|
||||
uint32_t reg;
|
||||
uint32_t index = CTIMER_GetInstance(base);
|
||||
|
||||
/* Set the counter operation when a match on this channel occurs */
|
||||
reg = base->MCR;
|
||||
reg &=
|
||||
~((uint32_t)((uint32_t)CTIMER_MCR_MR0R_MASK | (uint32_t)CTIMER_MCR_MR0S_MASK | (uint32_t)CTIMER_MCR_MR0I_MASK)
|
||||
<< ((uint32_t)matchChannel * 3U));
|
||||
reg |= ((uint32_t)(config->enableCounterReset) << (CTIMER_MCR_MR0R_SHIFT + ((uint32_t)matchChannel * 3U)));
|
||||
reg |= ((uint32_t)(config->enableCounterStop) << (CTIMER_MCR_MR0S_SHIFT + ((uint32_t)matchChannel * 3U)));
|
||||
reg |= ((uint32_t)(config->enableInterrupt) << (CTIMER_MCR_MR0I_SHIFT + ((uint32_t)matchChannel * 3U)));
|
||||
base->MCR = reg;
|
||||
|
||||
reg = base->EMR;
|
||||
/* Set the match output operation when a match on this channel occurs */
|
||||
reg &= ~(((uint32_t)CTIMER_EMR_EMC0_MASK) << ((uint32_t)matchChannel * 2U));
|
||||
reg |= ((uint32_t)config->outControl) << (CTIMER_EMR_EMC0_SHIFT + ((uint32_t)matchChannel * 2U));
|
||||
|
||||
/* Set the initial state of the EM bit/output */
|
||||
reg &= ~(((uint32_t)CTIMER_EMR_EM0_MASK) << (uint32_t)matchChannel);
|
||||
reg |= ((uint32_t)config->outPinInitState) << (uint32_t)matchChannel;
|
||||
base->EMR = reg;
|
||||
|
||||
/* Set the match value */
|
||||
base->MR[matchChannel] = config->matchValue;
|
||||
/* Clear status flags */
|
||||
CTIMER_ClearStatusFlags(base, ((uint32_t)CTIMER_IR_MR0INT_MASK) << (uint32_t)matchChannel);
|
||||
/* If interrupt is enabled then enable interrupt and update the call back function */
|
||||
if (config->enableInterrupt)
|
||||
{
|
||||
(void)EnableIRQ(s_ctimerIRQ[index]);
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Get the status of output match.
|
||||
*
|
||||
* This function gets the status of output MAT, whether or not this output is connected to a pin.
|
||||
* This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param matchChannel External match channel, user can obtain the status of multiple match channels
|
||||
* at the same time by using the logic of "|"
|
||||
* enumeration ::ctimer_external_match_t
|
||||
* return The mask of external match channel status flags. Users need to use the
|
||||
* _ctimer_external_match type to decode the return variables.
|
||||
*/
|
||||
uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)
|
||||
{
|
||||
return (base->EMR & matchChannel);
|
||||
}
|
||||
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
/*!
|
||||
* brief Setup the capture.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param capture Capture channel to configure
|
||||
* param edge Edge on the channel that will trigger a capture
|
||||
* param enableInt Flag to enable channel interrupts, if enabled then the registered call back
|
||||
* is called upon capture
|
||||
*/
|
||||
void CTIMER_SetupCapture(CTIMER_Type *base,
|
||||
ctimer_capture_channel_t capture,
|
||||
ctimer_capture_edge_t edge,
|
||||
bool enableInt)
|
||||
{
|
||||
uint32_t reg = base->CCR;
|
||||
uint32_t index = CTIMER_GetInstance(base);
|
||||
|
||||
/* Set the capture edge */
|
||||
reg &= ~((uint32_t)((uint32_t)CTIMER_CCR_CAP0RE_MASK | (uint32_t)CTIMER_CCR_CAP0FE_MASK |
|
||||
(uint32_t)CTIMER_CCR_CAP0I_MASK)
|
||||
<< ((uint32_t)capture * 3U));
|
||||
reg |= ((uint32_t)edge) << (CTIMER_CCR_CAP0RE_SHIFT + ((uint32_t)capture * 3U));
|
||||
/* Clear status flags */
|
||||
CTIMER_ClearStatusFlags(base, (((uint32_t)kCTIMER_Capture0Flag) << (uint32_t)capture));
|
||||
/* If call back function is valid then enable capture interrupt for the channel and update the call back function */
|
||||
if (enableInt)
|
||||
{
|
||||
reg |= ((uint32_t)CTIMER_CCR_CAP0I_MASK) << ((uint32_t)capture * 3U);
|
||||
(void)EnableIRQ(s_ctimerIRQ[index]);
|
||||
}
|
||||
base->CCR = reg;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* brief Register callback.
|
||||
*
|
||||
* param base Ctimer peripheral base address
|
||||
* param cb_func callback function
|
||||
* param cb_type callback function type, singular or multiple
|
||||
*/
|
||||
void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)
|
||||
{
|
||||
uint32_t index = CTIMER_GetInstance(base);
|
||||
s_ctimerCallback[index] = cb_func;
|
||||
ctimerCallbackType[index] = cb_type;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief CTIMER generic IRQ handle function.
|
||||
*
|
||||
* param index FlexCAN peripheral instance index.
|
||||
*/
|
||||
static void CTIMER_GenericIRQHandler(uint32_t index)
|
||||
{
|
||||
uint32_t int_stat, i, mask;
|
||||
/* Get Interrupt status flags */
|
||||
int_stat = CTIMER_GetStatusFlags(s_ctimerBases[index]);
|
||||
/* Clear the status flags that were set */
|
||||
CTIMER_ClearStatusFlags(s_ctimerBases[index], int_stat);
|
||||
if (ctimerCallbackType[index] == kCTIMER_SingleCallback)
|
||||
{
|
||||
if (s_ctimerCallback[index][0] != NULL)
|
||||
{
|
||||
s_ctimerCallback[index][0](int_stat);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE
|
||||
for (i = 0; i <= CTIMER_IR_MR3INT_SHIFT; i++)
|
||||
#else
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_IR_CR3INT) && FSL_FEATURE_CTIMER_HAS_IR_CR3INT
|
||||
for (i = 0; i <= CTIMER_IR_CR3INT_SHIFT; i++)
|
||||
#else
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT) && FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT)
|
||||
for (i = 0; i <= CTIMER_IR_CR2INT_SHIFT; i++)
|
||||
#else
|
||||
for (i = 0; i <= CTIMER_IR_CR1INT_SHIFT; i++)
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
|
||||
#endif
|
||||
{
|
||||
mask = 0x01UL << i;
|
||||
/* For each status flag bit that was set call the callback function if it is valid */
|
||||
if (((int_stat & mask) != 0U) && (s_ctimerCallback[index][i] != NULL))
|
||||
{
|
||||
s_ctimerCallback[index][i](int_stat);
|
||||
}
|
||||
}
|
||||
}
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
|
||||
/* IRQ handler functions overloading weak symbols in the startup */
|
||||
#if defined(CTIMER0)
|
||||
void CTIMER0_DriverIRQHandler(void);
|
||||
void CTIMER0_DriverIRQHandler(void)
|
||||
{
|
||||
CTIMER_GenericIRQHandler(0);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CTIMER1)
|
||||
void CTIMER1_DriverIRQHandler(void);
|
||||
void CTIMER1_DriverIRQHandler(void)
|
||||
{
|
||||
CTIMER_GenericIRQHandler(1);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CTIMER2)
|
||||
void CTIMER2_DriverIRQHandler(void);
|
||||
void CTIMER2_DriverIRQHandler(void)
|
||||
{
|
||||
CTIMER_GenericIRQHandler(2);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CTIMER3)
|
||||
void CTIMER3_DriverIRQHandler(void);
|
||||
void CTIMER3_DriverIRQHandler(void)
|
||||
{
|
||||
CTIMER_GenericIRQHandler(3);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CTIMER4)
|
||||
void CTIMER4_DriverIRQHandler(void);
|
||||
void CTIMER4_DriverIRQHandler(void)
|
||||
{
|
||||
CTIMER_GenericIRQHandler(4);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
533
drivers/fsl_ctimer.h
Normal file
533
drivers/fsl_ctimer.h
Normal file
@@ -0,0 +1,533 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_CTIMER_H_
|
||||
#define _FSL_CTIMER_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup ctimer
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
#define FSL_CTIMER_DRIVER_VERSION (MAKE_VERSION(2, 2, 1)) /*!< Version 2.2.1 */
|
||||
/*@}*/
|
||||
|
||||
/*! @brief List of Timer capture channels */
|
||||
typedef enum _ctimer_capture_channel
|
||||
{
|
||||
kCTIMER_Capture_0 = 0U, /*!< Timer capture channel 0 */
|
||||
kCTIMER_Capture_1, /*!< Timer capture channel 1 */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
|
||||
kCTIMER_Capture_2, /*!< Timer capture channel 2 */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
|
||||
kCTIMER_Capture_3 /*!< Timer capture channel 3 */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
|
||||
} ctimer_capture_channel_t;
|
||||
|
||||
/*! @brief List of capture edge options */
|
||||
typedef enum _ctimer_capture_edge
|
||||
{
|
||||
kCTIMER_Capture_RiseEdge = 1U, /*!< Capture on rising edge */
|
||||
kCTIMER_Capture_FallEdge = 2U, /*!< Capture on falling edge */
|
||||
kCTIMER_Capture_BothEdge = 3U, /*!< Capture on rising and falling edge */
|
||||
} ctimer_capture_edge_t;
|
||||
|
||||
/*! @brief List of Timer match registers */
|
||||
typedef enum _ctimer_match
|
||||
{
|
||||
kCTIMER_Match_0 = 0U, /*!< Timer match register 0 */
|
||||
kCTIMER_Match_1, /*!< Timer match register 1 */
|
||||
kCTIMER_Match_2, /*!< Timer match register 2 */
|
||||
kCTIMER_Match_3 /*!< Timer match register 3 */
|
||||
} ctimer_match_t;
|
||||
|
||||
/*! @brief List of external match */
|
||||
typedef enum _ctimer_external_match
|
||||
{
|
||||
kCTIMER_External_Match_0 = (1U << 0), /*!< External match 0 */
|
||||
kCTIMER_External_Match_1 = (1U << 1), /*!< External match 1 */
|
||||
kCTIMER_External_Match_2 = (1U << 2), /*!< External match 2 */
|
||||
kCTIMER_External_Match_3 = (1U << 3) /*!< External match 3 */
|
||||
} ctimer_external_match_t;
|
||||
|
||||
/*! @brief List of output control options */
|
||||
typedef enum _ctimer_match_output_control
|
||||
{
|
||||
kCTIMER_Output_NoAction = 0U, /*!< No action is taken */
|
||||
kCTIMER_Output_Clear, /*!< Clear the EM bit/output to 0 */
|
||||
kCTIMER_Output_Set, /*!< Set the EM bit/output to 1 */
|
||||
kCTIMER_Output_Toggle /*!< Toggle the EM bit/output */
|
||||
} ctimer_match_output_control_t;
|
||||
|
||||
/*! @brief List of Timer modes */
|
||||
typedef enum _ctimer_timer_mode
|
||||
{
|
||||
kCTIMER_TimerMode = 0U, /* TC is incremented every rising APB bus clock edge */
|
||||
kCTIMER_IncreaseOnRiseEdge, /* TC is incremented on rising edge of input signal */
|
||||
kCTIMER_IncreaseOnFallEdge, /* TC is incremented on falling edge of input signal */
|
||||
kCTIMER_IncreaseOnBothEdge /* TC is incremented on both edges of input signal */
|
||||
} ctimer_timer_mode_t;
|
||||
|
||||
/*! @brief List of Timer interrupts */
|
||||
typedef enum _ctimer_interrupt_enable
|
||||
{
|
||||
kCTIMER_Match0InterruptEnable = CTIMER_MCR_MR0I_MASK, /*!< Match 0 interrupt */
|
||||
kCTIMER_Match1InterruptEnable = CTIMER_MCR_MR1I_MASK, /*!< Match 1 interrupt */
|
||||
kCTIMER_Match2InterruptEnable = CTIMER_MCR_MR2I_MASK, /*!< Match 2 interrupt */
|
||||
kCTIMER_Match3InterruptEnable = CTIMER_MCR_MR3I_MASK, /*!< Match 3 interrupt */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
kCTIMER_Capture0InterruptEnable = CTIMER_CCR_CAP0I_MASK, /*!< Capture 0 interrupt */
|
||||
kCTIMER_Capture1InterruptEnable = CTIMER_CCR_CAP1I_MASK, /*!< Capture 1 interrupt */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
|
||||
kCTIMER_Capture2InterruptEnable = CTIMER_CCR_CAP2I_MASK, /*!< Capture 2 interrupt */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
|
||||
kCTIMER_Capture3InterruptEnable = CTIMER_CCR_CAP3I_MASK, /*!< Capture 3 interrupt */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
|
||||
#endif
|
||||
} ctimer_interrupt_enable_t;
|
||||
|
||||
/*! @brief List of Timer flags */
|
||||
typedef enum _ctimer_status_flags
|
||||
{
|
||||
kCTIMER_Match0Flag = CTIMER_IR_MR0INT_MASK, /*!< Match 0 interrupt flag */
|
||||
kCTIMER_Match1Flag = CTIMER_IR_MR1INT_MASK, /*!< Match 1 interrupt flag */
|
||||
kCTIMER_Match2Flag = CTIMER_IR_MR2INT_MASK, /*!< Match 2 interrupt flag */
|
||||
kCTIMER_Match3Flag = CTIMER_IR_MR3INT_MASK, /*!< Match 3 interrupt flag */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
kCTIMER_Capture0Flag = CTIMER_IR_CR0INT_MASK, /*!< Capture 0 interrupt flag */
|
||||
kCTIMER_Capture1Flag = CTIMER_IR_CR1INT_MASK, /*!< Capture 1 interrupt flag */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT) && FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT)
|
||||
kCTIMER_Capture2Flag = CTIMER_IR_CR2INT_MASK, /*!< Capture 2 interrupt flag */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT */
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_IR_CR3INT) && FSL_FEATURE_CTIMER_HAS_IR_CR3INT
|
||||
kCTIMER_Capture3Flag = CTIMER_IR_CR3INT_MASK, /*!< Capture 3 interrupt flag */
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
|
||||
#endif
|
||||
} ctimer_status_flags_t;
|
||||
|
||||
typedef void (*ctimer_callback_t)(uint32_t flags);
|
||||
|
||||
/*! @brief Callback type when registering for a callback. When registering a callback
|
||||
* an array of function pointers is passed the size could be 1 or 8, the callback
|
||||
* type will tell that.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
kCTIMER_SingleCallback, /*!< Single Callback type where there is only one callback for the timer.
|
||||
based on the status flags different channels needs to be handled differently */
|
||||
kCTIMER_MultipleCallback /*!< Multiple Callback type where there can be 8 valid callbacks, one per channel.
|
||||
for both match/capture */
|
||||
} ctimer_callback_type_t;
|
||||
|
||||
/*!
|
||||
* @brief Match configuration
|
||||
*
|
||||
* This structure holds the configuration settings for each match register.
|
||||
*/
|
||||
typedef struct _ctimer_match_config
|
||||
{
|
||||
uint32_t matchValue; /*!< This is stored in the match register */
|
||||
bool enableCounterReset; /*!< true: Match will reset the counter
|
||||
false: Match will not reser the counter */
|
||||
bool enableCounterStop; /*!< true: Match will stop the counter
|
||||
false: Match will not stop the counter */
|
||||
ctimer_match_output_control_t outControl; /*!< Action to be taken on a match on the EM bit/output */
|
||||
bool outPinInitState; /*!< Initial value of the EM bit/output */
|
||||
bool enableInterrupt; /*!< true: Generate interrupt upon match
|
||||
false: Do not generate interrupt on match */
|
||||
|
||||
} ctimer_match_config_t;
|
||||
|
||||
/*!
|
||||
* @brief Timer configuration structure
|
||||
*
|
||||
* This structure holds the configuration settings for the Timer peripheral. To initialize this
|
||||
* structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a
|
||||
* pointer to the configuration structure instance.
|
||||
*
|
||||
* The configuration structure can be made constant so as to reside in flash.
|
||||
*/
|
||||
typedef struct _ctimer_config
|
||||
{
|
||||
ctimer_timer_mode_t mode; /*!< Timer mode */
|
||||
ctimer_capture_channel_t input; /*!< Input channel to increment the timer, used only in timer
|
||||
modes that rely on this input signal to increment TC */
|
||||
uint32_t prescale; /*!< Prescale value */
|
||||
} ctimer_config_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @name Initialization and deinitialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Ungates the clock and configures the peripheral for basic operation.
|
||||
*
|
||||
* @note This API should be called at the beginning of the application before using the driver.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param config Pointer to the user configuration structure.
|
||||
*/
|
||||
void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Gates the timer clock.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*/
|
||||
void CTIMER_Deinit(CTIMER_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Fills in the timers configuration structure with the default settings.
|
||||
*
|
||||
* The default values are:
|
||||
* @code
|
||||
* config->mode = kCTIMER_TimerMode;
|
||||
* config->input = kCTIMER_Capture_0;
|
||||
* config->prescale = 0;
|
||||
* @endcode
|
||||
* @param config Pointer to the user configuration structure.
|
||||
*/
|
||||
void CTIMER_GetDefaultConfig(ctimer_config_t *config);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*!
|
||||
* @name PWM setup operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Configures the PWM signal parameters.
|
||||
*
|
||||
* Enables PWM mode on the match channel passed in and will then setup the match value
|
||||
* and other match parameters to generate a PWM signal.
|
||||
* This function can manually assign the specified channel to set the PWM cycle.
|
||||
*
|
||||
* @note When setting PWM output from multiple output pins, all should use the same PWM
|
||||
* period
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param pwmPeriodChannel Specify the channel to control the PWM period
|
||||
* @param matchChannel Match pin to be used to output the PWM signal
|
||||
* @param pwmPeriod PWM period match value
|
||||
* @param pulsePeriod Pulse width match value
|
||||
* @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
|
||||
* if it is 0 then no interrupt will be generated.
|
||||
*/
|
||||
status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base,
|
||||
const ctimer_match_t pwmPeriodChannel,
|
||||
ctimer_match_t matchChannel,
|
||||
uint32_t pwmPeriod,
|
||||
uint32_t pulsePeriod,
|
||||
bool enableInt);
|
||||
|
||||
/*!
|
||||
* @brief Configures the PWM signal parameters.
|
||||
*
|
||||
* Enables PWM mode on the match channel passed in and will then setup the match value
|
||||
* and other match parameters to generate a PWM signal.
|
||||
* This function can manually assign the specified channel to set the PWM cycle.
|
||||
*
|
||||
* @note When setting PWM output from multiple output pins, all should use the same PWM
|
||||
* frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param pwmPeriodChannel Specify the channel to control the PWM period
|
||||
* @param matchChannel Match pin to be used to output the PWM signal
|
||||
* @param dutyCyclePercent PWM pulse width; the value should be between 0 to 100
|
||||
* @param pwmFreq_Hz PWM signal frequency in Hz
|
||||
* @param srcClock_Hz Timer counter clock in Hz
|
||||
* @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
|
||||
* if it is 0 then no interrupt will be generated.
|
||||
*/
|
||||
status_t CTIMER_SetupPwm(CTIMER_Type *base,
|
||||
const ctimer_match_t pwmPeriodChannel,
|
||||
ctimer_match_t matchChannel,
|
||||
uint8_t dutyCyclePercent,
|
||||
uint32_t pwmFreq_Hz,
|
||||
uint32_t srcClock_Hz,
|
||||
bool enableInt);
|
||||
|
||||
/*!
|
||||
* @brief Updates the pulse period of an active PWM signal.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param matchChannel Match pin to be used to output the PWM signal
|
||||
* @param pulsePeriod New PWM pulse width match value
|
||||
*/
|
||||
static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)
|
||||
{
|
||||
/* Update PWM pulse period match value */
|
||||
base->MR[matchChannel] = pulsePeriod;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Updates the duty cycle of an active PWM signal.
|
||||
*
|
||||
* @note Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution.
|
||||
* This function can manually assign the specified channel to set the PWM cycle.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param pwmPeriodChannel Specify the channel to control the PWM period
|
||||
* @param matchChannel Match pin to be used to output the PWM signal
|
||||
* @param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
|
||||
*/
|
||||
void CTIMER_UpdatePwmDutycycle(CTIMER_Type *base,
|
||||
const ctimer_match_t pwmPeriodChannel,
|
||||
ctimer_match_t matchChannel,
|
||||
uint8_t dutyCyclePercent);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*!
|
||||
* @brief Setup the match register.
|
||||
*
|
||||
* User configuration is used to setup the match value and action to be taken when a match occurs.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param matchChannel Match register to configure
|
||||
* @param config Pointer to the match configuration structure
|
||||
*/
|
||||
void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Get the status of output match.
|
||||
*
|
||||
* This function gets the status of output MAT, whether or not this output is connected to a pin.
|
||||
* This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param matchChannel External match channel, user can obtain the status of multiple match channels
|
||||
* at the same time by using the logic of "|"
|
||||
* enumeration ::ctimer_external_match_t
|
||||
* @return The mask of external match channel status flags. Users need to use the
|
||||
* _ctimer_external_match type to decode the return variables.
|
||||
*/
|
||||
uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel);
|
||||
|
||||
/*!
|
||||
* @brief Setup the capture.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param capture Capture channel to configure
|
||||
* @param edge Edge on the channel that will trigger a capture
|
||||
* @param enableInt Flag to enable channel interrupts, if enabled then the registered call back
|
||||
* is called upon capture
|
||||
*/
|
||||
void CTIMER_SetupCapture(CTIMER_Type *base,
|
||||
ctimer_capture_channel_t capture,
|
||||
ctimer_capture_edge_t edge,
|
||||
bool enableInt);
|
||||
|
||||
/*!
|
||||
* @brief Get the timer count value from TC register.
|
||||
*
|
||||
* @param base Ctimer peripheral base address.
|
||||
* @return return the timer count value.
|
||||
*/
|
||||
static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)
|
||||
{
|
||||
return (base->TC);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Register callback.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param cb_func callback function
|
||||
* @param cb_type callback function type, singular or multiple
|
||||
*/
|
||||
void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type);
|
||||
|
||||
/*!
|
||||
* @name Interrupt Interface
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enables the selected Timer interrupts.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param mask The interrupts to enable. This is a logical OR of members of the
|
||||
* enumeration ::ctimer_interrupt_enable_t
|
||||
*/
|
||||
static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)
|
||||
{
|
||||
/* Enable match interrupts */
|
||||
base->MCR |= mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
|
||||
|
||||
/* Enable capture interrupts */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
base->CCR |= mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
|
||||
| CTIMER_CCR_CAP2I_MASK
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
|
||||
| CTIMER_CCR_CAP3I_MASK
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
|
||||
);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disables the selected Timer interrupts.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param mask The interrupts to enable. This is a logical OR of members of the
|
||||
* enumeration ::ctimer_interrupt_enable_t
|
||||
*/
|
||||
static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)
|
||||
{
|
||||
/* Disable match interrupts */
|
||||
base->MCR &= ~(mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK));
|
||||
|
||||
/* Disable capture interrupts */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
base->CCR &= ~(mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
|
||||
| CTIMER_CCR_CAP2I_MASK
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
|
||||
| CTIMER_CCR_CAP3I_MASK
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
|
||||
));
|
||||
#endif
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Gets the enabled Timer interrupts.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*
|
||||
* @return The enabled interrupts. This is the logical OR of members of the
|
||||
* enumeration ::ctimer_interrupt_enable_t
|
||||
*/
|
||||
static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)
|
||||
{
|
||||
uint32_t enabledIntrs = 0;
|
||||
|
||||
/* Get all the match interrupts enabled */
|
||||
enabledIntrs =
|
||||
base->MCR & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
|
||||
|
||||
/* Get all the capture interrupts enabled */
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
||||
enabledIntrs |= base->CCR & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK
|
||||
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
|
||||
| CTIMER_CCR_CAP2I_MASK
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
|
||||
#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
|
||||
| CTIMER_CCR_CAP3I_MASK
|
||||
#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
|
||||
);
|
||||
#endif
|
||||
|
||||
return enabledIntrs;
|
||||
}
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*!
|
||||
* @name Status Interface
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Gets the Timer status flags.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*
|
||||
* @return The status flags. This is the logical OR of members of the
|
||||
* enumeration ::ctimer_status_flags_t
|
||||
*/
|
||||
static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)
|
||||
{
|
||||
return base->IR;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Clears the Timer status flags.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
* @param mask The status flags to clear. This is a logical OR of members of the
|
||||
* enumeration ::ctimer_status_flags_t
|
||||
*/
|
||||
static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)
|
||||
{
|
||||
base->IR = mask;
|
||||
}
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*!
|
||||
* @name Counter Start and Stop
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Starts the Timer counter.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*/
|
||||
static inline void CTIMER_StartTimer(CTIMER_Type *base)
|
||||
{
|
||||
base->TCR |= CTIMER_TCR_CEN_MASK;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Stops the Timer counter.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*/
|
||||
static inline void CTIMER_StopTimer(CTIMER_Type *base)
|
||||
{
|
||||
base->TCR &= ~CTIMER_TCR_CEN_MASK;
|
||||
}
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*!
|
||||
* @brief Reset the counter.
|
||||
*
|
||||
* The timer counter and prescale counter are reset on the next positive edge of the APB clock.
|
||||
*
|
||||
* @param base Ctimer peripheral base address
|
||||
*/
|
||||
static inline void CTIMER_Reset(CTIMER_Type *base)
|
||||
{
|
||||
base->TCR |= CTIMER_TCR_CRST_MASK;
|
||||
base->TCR &= ~CTIMER_TCR_CRST_MASK;
|
||||
}
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#endif /* _FSL_CTIMER_H_ */
|
||||
356
drivers/fsl_flexcomm.c
Normal file
356
drivers/fsl_flexcomm.c
Normal file
@@ -0,0 +1,356 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_flexcomm.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.flexcomm"
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Used for conversion between `void*` and `uint32_t`.
|
||||
*/
|
||||
typedef union pvoid_to_u32
|
||||
{
|
||||
void *pvoid;
|
||||
uint32_t u32;
|
||||
} pvoid_to_u32_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
/*! @brief Set the FLEXCOMM mode . */
|
||||
static status_t FLEXCOMM_SetPeriph(FLEXCOMM_Type *base, FLEXCOMM_PERIPH_T periph, int lock);
|
||||
|
||||
/*! @brief check whether flexcomm supports peripheral type */
|
||||
static bool FLEXCOMM_PeripheralIsPresent(FLEXCOMM_Type *base, FLEXCOMM_PERIPH_T periph);
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Pointers to real IRQ handlers installed by drivers for each instance. */
|
||||
static flexcomm_irq_handler_t s_flexcommIrqHandler[FSL_FEATURE_SOC_FLEXCOMM_COUNT];
|
||||
|
||||
/*! @brief Pointers to handles for each instance to provide context to interrupt routines */
|
||||
static void *s_flexcommHandle[FSL_FEATURE_SOC_FLEXCOMM_COUNT];
|
||||
|
||||
/*! @brief Array to map FLEXCOMM instance number to IRQ number. */
|
||||
IRQn_Type const kFlexcommIrqs[] = FLEXCOMM_IRQS;
|
||||
|
||||
/*! @brief Array to map FLEXCOMM instance number to base address. */
|
||||
static const uint32_t s_flexcommBaseAddrs[FSL_FEATURE_SOC_FLEXCOMM_COUNT] = FLEXCOMM_BASE_ADDRS;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/*! @brief IDs of clock for each FLEXCOMM module */
|
||||
static const clock_ip_name_t s_flexcommClocks[] = FLEXCOMM_CLOCKS;
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_FEATURE_FLEXCOMM_HAS_NO_RESET) && FSL_FEATURE_FLEXCOMM_HAS_NO_RESET)
|
||||
/*! @brief Pointers to FLEXCOMM resets for each instance. */
|
||||
static const reset_ip_name_t s_flexcommResets[] = FLEXCOMM_RSTS;
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/* check whether flexcomm supports peripheral type */
|
||||
static bool FLEXCOMM_PeripheralIsPresent(FLEXCOMM_Type *base, FLEXCOMM_PERIPH_T periph)
|
||||
{
|
||||
if (periph == FLEXCOMM_PERIPH_NONE)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
else if (periph <= FLEXCOMM_PERIPH_I2S_TX)
|
||||
{
|
||||
return (base->PSELID & (1UL << ((uint32_t)periph + 3U))) > 0UL ? true : false;
|
||||
}
|
||||
else if (periph == FLEXCOMM_PERIPH_I2S_RX)
|
||||
{
|
||||
return (base->PSELID & (1U << 7U)) > (uint32_t)0U ? true : false;
|
||||
}
|
||||
else
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
/* Get the index corresponding to the FLEXCOMM */
|
||||
/*! brief Returns instance number for FLEXCOMM module with given base address. */
|
||||
uint32_t FLEXCOMM_GetInstance(void *base)
|
||||
{
|
||||
uint32_t i;
|
||||
pvoid_to_u32_t BaseAddr;
|
||||
BaseAddr.pvoid = base;
|
||||
|
||||
for (i = 0U; i < (uint32_t)FSL_FEATURE_SOC_FLEXCOMM_COUNT; i++)
|
||||
{
|
||||
if (BaseAddr.u32 == s_flexcommBaseAddrs[i])
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
assert(i < (uint32_t)FSL_FEATURE_SOC_FLEXCOMM_COUNT);
|
||||
return i;
|
||||
}
|
||||
|
||||
/* Changes FLEXCOMM mode */
|
||||
static status_t FLEXCOMM_SetPeriph(FLEXCOMM_Type *base, FLEXCOMM_PERIPH_T periph, int lock)
|
||||
{
|
||||
/* Check whether peripheral type is present */
|
||||
if (!FLEXCOMM_PeripheralIsPresent(base, periph))
|
||||
{
|
||||
return kStatus_OutOfRange;
|
||||
}
|
||||
|
||||
/* Flexcomm is locked to different peripheral type than expected */
|
||||
if (((base->PSELID & FLEXCOMM_PSELID_LOCK_MASK) != 0U) &&
|
||||
((base->PSELID & FLEXCOMM_PSELID_PERSEL_MASK) != (uint32_t)periph))
|
||||
{
|
||||
return kStatus_Fail;
|
||||
}
|
||||
|
||||
/* Check if we are asked to lock */
|
||||
if (lock != 0)
|
||||
{
|
||||
base->PSELID = (uint32_t)periph | FLEXCOMM_PSELID_LOCK_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->PSELID = (uint32_t)periph;
|
||||
}
|
||||
|
||||
return kStatus_Success;
|
||||
}
|
||||
|
||||
/*! brief Initializes FLEXCOMM and selects peripheral mode according to the second parameter. */
|
||||
status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph)
|
||||
{
|
||||
uint32_t idx = FLEXCOMM_GetInstance(base);
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Enable the peripheral clock */
|
||||
CLOCK_EnableClock(s_flexcommClocks[idx]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_FEATURE_FLEXCOMM_HAS_NO_RESET) && FSL_FEATURE_FLEXCOMM_HAS_NO_RESET)
|
||||
/* Reset the FLEXCOMM module */
|
||||
RESET_PeripheralReset(s_flexcommResets[idx]);
|
||||
#endif
|
||||
|
||||
/* Set the FLEXCOMM to given peripheral */
|
||||
return FLEXCOMM_SetPeriph((FLEXCOMM_Type *)base, periph, 0);
|
||||
}
|
||||
|
||||
/*! brief Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM
|
||||
* mode */
|
||||
void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle)
|
||||
{
|
||||
uint32_t instance;
|
||||
|
||||
/* Look up instance number */
|
||||
instance = FLEXCOMM_GetInstance(base);
|
||||
|
||||
/* Clear handler first to avoid execution of the handler with wrong handle */
|
||||
s_flexcommIrqHandler[instance] = NULL;
|
||||
s_flexcommHandle[instance] = flexcommHandle;
|
||||
s_flexcommIrqHandler[instance] = handler;
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
|
||||
/* IRQ handler functions overloading weak symbols in the startup */
|
||||
#if defined(FLEXCOMM0)
|
||||
void FLEXCOMM0_DriverIRQHandler(void);
|
||||
void FLEXCOMM0_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[0]);
|
||||
s_flexcommIrqHandler[0]((uint32_t *)s_flexcommBaseAddrs[0], s_flexcommHandle[0]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM1)
|
||||
void FLEXCOMM1_DriverIRQHandler(void);
|
||||
void FLEXCOMM1_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[1]);
|
||||
s_flexcommIrqHandler[1]((uint32_t *)s_flexcommBaseAddrs[1], s_flexcommHandle[1]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM2)
|
||||
void FLEXCOMM2_DriverIRQHandler(void);
|
||||
void FLEXCOMM2_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[2]);
|
||||
s_flexcommIrqHandler[2]((uint32_t *)s_flexcommBaseAddrs[2], s_flexcommHandle[2]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM3)
|
||||
void FLEXCOMM3_DriverIRQHandler(void);
|
||||
void FLEXCOMM3_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[3]);
|
||||
s_flexcommIrqHandler[3]((uint32_t *)s_flexcommBaseAddrs[3], s_flexcommHandle[3]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM4)
|
||||
void FLEXCOMM4_DriverIRQHandler(void);
|
||||
void FLEXCOMM4_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[4]);
|
||||
s_flexcommIrqHandler[4]((uint32_t *)s_flexcommBaseAddrs[4], s_flexcommHandle[4]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM5)
|
||||
void FLEXCOMM5_DriverIRQHandler(void);
|
||||
void FLEXCOMM5_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[5]);
|
||||
s_flexcommIrqHandler[5]((uint32_t *)s_flexcommBaseAddrs[5], s_flexcommHandle[5]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM6)
|
||||
void FLEXCOMM6_DriverIRQHandler(void);
|
||||
void FLEXCOMM6_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[6]);
|
||||
s_flexcommIrqHandler[6]((uint32_t *)s_flexcommBaseAddrs[6], s_flexcommHandle[6]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM7)
|
||||
void FLEXCOMM7_DriverIRQHandler(void);
|
||||
void FLEXCOMM7_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[7]);
|
||||
s_flexcommIrqHandler[7]((uint32_t *)s_flexcommBaseAddrs[7], s_flexcommHandle[7]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM8)
|
||||
void FLEXCOMM8_DriverIRQHandler(void);
|
||||
void FLEXCOMM8_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[8]);
|
||||
s_flexcommIrqHandler[8]((uint32_t *)s_flexcommBaseAddrs[8], s_flexcommHandle[8]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM9)
|
||||
void FLEXCOMM9_DriverIRQHandler(void);
|
||||
void FLEXCOMM9_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[9]);
|
||||
s_flexcommIrqHandler[9]((uint32_t *)s_flexcommBaseAddrs[9], s_flexcommHandle[9]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM10)
|
||||
void FLEXCOMM10_DriverIRQHandler(void);
|
||||
void FLEXCOMM10_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[10]);
|
||||
s_flexcommIrqHandler[10]((uint32_t *)s_flexcommBaseAddrs[10], s_flexcommHandle[10]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM11)
|
||||
void FLEXCOMM11_DriverIRQHandler(void);
|
||||
void FLEXCOMM11_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[11]);
|
||||
s_flexcommIrqHandler[11]((uint32_t *)s_flexcommBaseAddrs[11], s_flexcommHandle[11]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM12)
|
||||
void FLEXCOMM12_DriverIRQHandler(void);
|
||||
void FLEXCOMM12_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[12]);
|
||||
s_flexcommIrqHandler[12]((uint32_t *)s_flexcommBaseAddrs[12], s_flexcommHandle[12]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM13)
|
||||
void FLEXCOMM13_DriverIRQHandler(void);
|
||||
void FLEXCOMM13_DriverIRQHandler(void)
|
||||
{
|
||||
assert(s_flexcommIrqHandler[13]);
|
||||
s_flexcommIrqHandler[13]((uint32_t *)s_flexcommBaseAddrs[13], s_flexcommHandle[13]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM14)
|
||||
void FLEXCOMM14_DriverIRQHandler(void);
|
||||
void FLEXCOMM14_DriverIRQHandler(void)
|
||||
{
|
||||
uint32_t instance;
|
||||
|
||||
/* Look up instance number */
|
||||
instance = FLEXCOMM_GetInstance(FLEXCOMM14);
|
||||
assert(s_flexcommIrqHandler[instance]);
|
||||
s_flexcommIrqHandler[instance]((uint32_t *)s_flexcommBaseAddrs[instance], s_flexcommHandle[instance]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM15)
|
||||
void FLEXCOMM15_DriverIRQHandler(void);
|
||||
void FLEXCOMM15_DriverIRQHandler(void)
|
||||
{
|
||||
uint32_t instance;
|
||||
|
||||
/* Look up instance number */
|
||||
instance = FLEXCOMM_GetInstance(FLEXCOMM15);
|
||||
assert(s_flexcommIrqHandler[instance]);
|
||||
s_flexcommIrqHandler[instance]((uint32_t *)s_flexcommBaseAddrs[instance], s_flexcommHandle[instance]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FLEXCOMM16)
|
||||
void FLEXCOMM16_DriverIRQHandler(void);
|
||||
void FLEXCOMM16_DriverIRQHandler(void)
|
||||
{
|
||||
uint32_t instance;
|
||||
|
||||
/* Look up instance number */
|
||||
instance = FLEXCOMM_GetInstance(FLEXCOMM16);
|
||||
assert(s_flexcommIrqHandler[instance]);
|
||||
s_flexcommIrqHandler[instance]((uint32_t *)s_flexcommBaseAddrs[instance], s_flexcommHandle[instance]);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
#endif
|
||||
64
drivers/fsl_flexcomm.h
Normal file
64
drivers/fsl_flexcomm.h
Normal file
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_FLEXCOMM_H_
|
||||
#define _FSL_FLEXCOMM_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup flexcomm_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief FlexCOMM driver version 2.0.2. */
|
||||
#define FSL_FLEXCOMM_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
|
||||
/*@}*/
|
||||
|
||||
/*! @brief FLEXCOMM peripheral modes. */
|
||||
typedef enum
|
||||
{
|
||||
FLEXCOMM_PERIPH_NONE, /*!< No peripheral */
|
||||
FLEXCOMM_PERIPH_USART, /*!< USART peripheral */
|
||||
FLEXCOMM_PERIPH_SPI, /*!< SPI Peripheral */
|
||||
FLEXCOMM_PERIPH_I2C, /*!< I2C Peripheral */
|
||||
FLEXCOMM_PERIPH_I2S_TX, /*!< I2S TX Peripheral */
|
||||
FLEXCOMM_PERIPH_I2S_RX, /*!< I2S RX Peripheral */
|
||||
} FLEXCOMM_PERIPH_T;
|
||||
|
||||
/*! @brief Typedef for interrupt handler. */
|
||||
typedef void (*flexcomm_irq_handler_t)(void *base, void *handle);
|
||||
|
||||
/*! @brief Array with IRQ number for each FLEXCOMM module. */
|
||||
extern IRQn_Type const kFlexcommIrqs[];
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*! @brief Returns instance number for FLEXCOMM module with given base address. */
|
||||
uint32_t FLEXCOMM_GetInstance(void *base);
|
||||
|
||||
/*! @brief Initializes FLEXCOMM and selects peripheral mode according to the second parameter. */
|
||||
status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph);
|
||||
|
||||
/*! @brief Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM
|
||||
* mode */
|
||||
void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _FSL_FLEXCOMM_H_*/
|
||||
317
drivers/fsl_gpio.c
Normal file
317
drivers/fsl_gpio.c
Normal file
@@ -0,0 +1,317 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_gpio.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.lpc_gpio"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/*! @brief Array to map FGPIO instance number to clock name. */
|
||||
static const clock_ip_name_t s_gpioClockName[] = GPIO_CLOCKS;
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_FEATURE_GPIO_HAS_NO_RESET) && FSL_FEATURE_GPIO_HAS_NO_RESET)
|
||||
/*! @brief Pointers to GPIO resets for each instance. */
|
||||
static const reset_ip_name_t s_gpioResets[] = GPIO_RSTS_N;
|
||||
#endif
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
************ ******************************************************************/
|
||||
/*!
|
||||
* @brief Enable GPIO port clock.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer.
|
||||
* @param port GPIO port number.
|
||||
*/
|
||||
static void GPIO_EnablePortClock(GPIO_Type *base, uint32_t port);
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
static void GPIO_EnablePortClock(GPIO_Type *base, uint32_t port)
|
||||
{
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
assert(port < ARRAY_SIZE(s_gpioClockName));
|
||||
|
||||
/* Upgate the GPIO clock */
|
||||
CLOCK_EnableClock(s_gpioClockName[port]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Initializes the GPIO peripheral.
|
||||
*
|
||||
* This function ungates the GPIO clock.
|
||||
*
|
||||
* param base GPIO peripheral base pointer.
|
||||
* param port GPIO port number.
|
||||
*/
|
||||
void GPIO_PortInit(GPIO_Type *base, uint32_t port)
|
||||
{
|
||||
GPIO_EnablePortClock(base, port);
|
||||
|
||||
#if !(defined(FSL_FEATURE_GPIO_HAS_NO_RESET) && FSL_FEATURE_GPIO_HAS_NO_RESET)
|
||||
/* Reset the GPIO module */
|
||||
RESET_PeripheralReset(s_gpioResets[port]);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Initializes a GPIO pin used by the board.
|
||||
*
|
||||
* To initialize the GPIO, define a pin configuration, either input or output, in the user file.
|
||||
* Then, call the GPIO_PinInit() function.
|
||||
*
|
||||
* This is an example to define an input pin or output pin configuration:
|
||||
* code
|
||||
* Define a digital input pin configuration,
|
||||
* gpio_pin_config_t config =
|
||||
* {
|
||||
* kGPIO_DigitalInput,
|
||||
* 0,
|
||||
* }
|
||||
* Define a digital output pin configuration,
|
||||
* gpio_pin_config_t config =
|
||||
* {
|
||||
* kGPIO_DigitalOutput,
|
||||
* 0,
|
||||
* }
|
||||
* endcode
|
||||
*
|
||||
* param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* param port GPIO port number
|
||||
* param pin GPIO pin number
|
||||
* param config GPIO pin configuration pointer
|
||||
*/
|
||||
void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)
|
||||
{
|
||||
GPIO_EnablePortClock(base, port);
|
||||
|
||||
if (config->pinDirection == kGPIO_DigitalInput)
|
||||
{
|
||||
#if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)
|
||||
base->DIRCLR[port] = 1UL << pin;
|
||||
#else
|
||||
base->DIR[port] &= ~(1UL << pin);
|
||||
#endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set default output value */
|
||||
if (config->outputLogic == 0U)
|
||||
{
|
||||
base->CLR[port] = (1UL << pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
base->SET[port] = (1UL << pin);
|
||||
}
|
||||
/* Set pin direction */
|
||||
#if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)
|
||||
base->DIRSET[port] = 1UL << pin;
|
||||
#else
|
||||
base->DIR[port] |= 1UL << pin;
|
||||
#endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT
|
||||
/*!
|
||||
* @brief Set the configuration of pin interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number
|
||||
* @param pin GPIO pin number.
|
||||
* @param config GPIO pin interrupt configuration..
|
||||
*/
|
||||
void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config)
|
||||
{
|
||||
base->INTEDG[port] = (base->INTEDG[port] & ~(1UL << pin)) | ((uint32_t)config->mode << pin);
|
||||
|
||||
base->INTPOL[port] = (base->INTPOL[port] & ~(1UL << pin)) | ((uint32_t)config->polarity << pin);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enables multiple pins interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)
|
||||
{
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
base->INTENA[port] = base->INTENA[port] | mask;
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
base->INTENB[port] = base->INTENB[port] | mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disables multiple pins interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)
|
||||
{
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
base->INTENA[port] = base->INTENA[port] & ~mask;
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
base->INTENB[port] = base->INTENB[port] & ~mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Clears multiple pins interrupt flag. Status flags are cleared by
|
||||
* writing a 1 to the corresponding bit position.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)
|
||||
{
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
base->INTSTATA[port] = mask;
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
base->INTSTATB[port] = mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @ Read port interrupt status.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number
|
||||
* @param index GPIO interrupt number.
|
||||
* @retval masked GPIO status value
|
||||
*/
|
||||
uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index)
|
||||
{
|
||||
uint32_t status = 0U;
|
||||
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
status = base->INTSTATA[port];
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
status = base->INTSTATB[port];
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enables the specific pin interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param pin GPIO pin number.
|
||||
* @param index GPIO interrupt number.
|
||||
*/
|
||||
void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)
|
||||
{
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
base->INTENA[port] = base->INTENA[port] | (1UL << pin);
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
base->INTENB[port] = base->INTENB[port] | (1UL << pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disables the specific pin interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param pin GPIO pin number.
|
||||
* @param index GPIO interrupt number.
|
||||
*/
|
||||
void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)
|
||||
{
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
base->INTENA[port] = base->INTENA[port] & ~(1UL << pin);
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
base->INTENB[port] = base->INTENB[port] & ~(1UL << pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Clears the specific pin interrupt flag. Status flags are cleared by
|
||||
* writing a 1 to the corresponding bit position.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)
|
||||
{
|
||||
if ((uint32_t)kGPIO_InterruptA == index)
|
||||
{
|
||||
base->INTSTATA[port] = 1UL << pin;
|
||||
}
|
||||
else if ((uint32_t)kGPIO_InterruptB == index)
|
||||
{
|
||||
base->INTSTATB[port] = 1UL << pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Should not enter here*/
|
||||
}
|
||||
}
|
||||
#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */
|
||||
364
drivers/fsl_gpio.h
Normal file
364
drivers/fsl_gpio.h
Normal file
@@ -0,0 +1,364 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _LPC_GPIO_H_
|
||||
#define _LPC_GPIO_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup lpc_gpio
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief LPC GPIO driver version. */
|
||||
#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 7))
|
||||
/*@}*/
|
||||
|
||||
/*! @brief LPC GPIO direction definition */
|
||||
typedef enum _gpio_pin_direction
|
||||
{
|
||||
kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
|
||||
kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
|
||||
} gpio_pin_direction_t;
|
||||
|
||||
/*!
|
||||
* @brief The GPIO pin configuration structure.
|
||||
*
|
||||
* Every pin can only be configured as either output pin or input pin at a time.
|
||||
* If configured as a input pin, then leave the outputConfig unused.
|
||||
*/
|
||||
typedef struct _gpio_pin_config
|
||||
{
|
||||
gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */
|
||||
/* Output configurations, please ignore if configured as a input one */
|
||||
uint8_t outputLogic; /*!< Set default output logic, no use in input */
|
||||
} gpio_pin_config_t;
|
||||
|
||||
#if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT)
|
||||
#define GPIO_PIN_INT_LEVEL 0x00U
|
||||
#define GPIO_PIN_INT_EDGE 0x01U
|
||||
|
||||
#define PINT_PIN_INT_HIGH_OR_RISE_TRIGGER 0x00U
|
||||
#define PINT_PIN_INT_LOW_OR_FALL_TRIGGER 0x01U
|
||||
|
||||
/*! @brief GPIO Pin Interrupt enable mode */
|
||||
typedef enum _gpio_pin_enable_mode
|
||||
{
|
||||
kGPIO_PinIntEnableLevel = GPIO_PIN_INT_LEVEL, /*!< Generate Pin Interrupt on level mode */
|
||||
kGPIO_PinIntEnableEdge = GPIO_PIN_INT_EDGE /*!< Generate Pin Interrupt on edge mode */
|
||||
} gpio_pin_enable_mode_t;
|
||||
|
||||
/*! @brief GPIO Pin Interrupt enable polarity */
|
||||
typedef enum _gpio_pin_enable_polarity
|
||||
{
|
||||
kGPIO_PinIntEnableHighOrRise =
|
||||
PINT_PIN_INT_HIGH_OR_RISE_TRIGGER, /*!< Generate Pin Interrupt on high level or rising edge */
|
||||
kGPIO_PinIntEnableLowOrFall =
|
||||
PINT_PIN_INT_LOW_OR_FALL_TRIGGER /*!< Generate Pin Interrupt on low level or falling edge */
|
||||
} gpio_pin_enable_polarity_t;
|
||||
|
||||
/*! @brief LPC GPIO interrupt index definition */
|
||||
typedef enum _gpio_interrupt_index
|
||||
{
|
||||
kGPIO_InterruptA = 0U, /*!< Set current pin as interrupt A*/
|
||||
kGPIO_InterruptB = 1U, /*!< Set current pin as interrupt B*/
|
||||
} gpio_interrupt_index_t;
|
||||
|
||||
/*! @brief Configures the interrupt generation condition. */
|
||||
typedef struct _gpio_interrupt_config
|
||||
{
|
||||
uint8_t mode; /* The trigger mode of GPIO interrupts */
|
||||
uint8_t polarity; /* The polarity of GPIO interrupts */
|
||||
} gpio_interrupt_config_t;
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*! @name GPIO Configuration */
|
||||
/*@{*/
|
||||
|
||||
/*!
|
||||
* @brief Initializes the GPIO peripheral.
|
||||
*
|
||||
* This function ungates the GPIO clock.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer.
|
||||
* @param port GPIO port number.
|
||||
*/
|
||||
void GPIO_PortInit(GPIO_Type *base, uint32_t port);
|
||||
|
||||
/*!
|
||||
* @brief Initializes a GPIO pin used by the board.
|
||||
*
|
||||
* To initialize the GPIO, define a pin configuration, either input or output, in the user file.
|
||||
* Then, call the GPIO_PinInit() function.
|
||||
*
|
||||
* This is an example to define an input pin or output pin configuration:
|
||||
* @code
|
||||
* Define a digital input pin configuration,
|
||||
* gpio_pin_config_t config =
|
||||
* {
|
||||
* kGPIO_DigitalInput,
|
||||
* 0,
|
||||
* }
|
||||
* Define a digital output pin configuration,
|
||||
* gpio_pin_config_t config =
|
||||
* {
|
||||
* kGPIO_DigitalOutput,
|
||||
* 0,
|
||||
* }
|
||||
* @endcode
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param pin GPIO pin number
|
||||
* @param config GPIO pin configuration pointer
|
||||
*/
|
||||
void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config);
|
||||
|
||||
/*@}*/
|
||||
|
||||
/*! @name GPIO Output Operations */
|
||||
/*@{*/
|
||||
|
||||
/*!
|
||||
* @brief Sets the output level of the one GPIO pin to the logic 1 or 0.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param pin GPIO pin number
|
||||
* @param output GPIO pin output logic level.
|
||||
* - 0: corresponding pin output low-logic level.
|
||||
* - 1: corresponding pin output high-logic level.
|
||||
*/
|
||||
static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)
|
||||
{
|
||||
base->B[port][pin] = output;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
/*! @name GPIO Input Operations */
|
||||
/*@{*/
|
||||
|
||||
/*!
|
||||
* @brief Reads the current input value of the GPIO PIN.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param pin GPIO pin number
|
||||
* @retval GPIO port input value
|
||||
* - 0: corresponding pin input low-logic level.
|
||||
* - 1: corresponding pin input high-logic level.
|
||||
*/
|
||||
static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)
|
||||
{
|
||||
return (uint32_t)base->B[port][pin];
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Sets the output level of the multiple GPIO pins to the logic 1.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param mask GPIO pin number macro
|
||||
*/
|
||||
static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)
|
||||
{
|
||||
base->SET[port] = mask;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Sets the output level of the multiple GPIO pins to the logic 0.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param mask GPIO pin number macro
|
||||
*/
|
||||
static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)
|
||||
{
|
||||
base->CLR[port] = mask;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Reverses current output logic of the multiple GPIO pins.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param mask GPIO pin number macro
|
||||
*/
|
||||
static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)
|
||||
{
|
||||
base->NOT[port] = mask;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Reads the current input value of the whole GPIO port.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
*/
|
||||
static inline uint32_t GPIO_PortRead(GPIO_Type *base, uint32_t port)
|
||||
{
|
||||
return (uint32_t)base->PIN[port];
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
/*! @name GPIO Mask Operations */
|
||||
/*@{*/
|
||||
|
||||
/*!
|
||||
* @brief Sets port mask, 0 - enable pin, 1 - disable pin.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param mask GPIO pin number macro
|
||||
*/
|
||||
static inline void GPIO_PortMaskedSet(GPIO_Type *base, uint32_t port, uint32_t mask)
|
||||
{
|
||||
base->MASK[port] = mask;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Sets the output level of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be affected.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @param output GPIO port output value.
|
||||
*/
|
||||
static inline void GPIO_PortMaskedWrite(GPIO_Type *base, uint32_t port, uint32_t output)
|
||||
{
|
||||
base->MPIN[port] = output;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Reads the current input value of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be
|
||||
* affected.
|
||||
*
|
||||
* @param base GPIO peripheral base pointer(Typically GPIO)
|
||||
* @param port GPIO port number
|
||||
* @retval masked GPIO port value
|
||||
*/
|
||||
static inline uint32_t GPIO_PortMaskedRead(GPIO_Type *base, uint32_t port)
|
||||
{
|
||||
return (uint32_t)base->MPIN[port];
|
||||
}
|
||||
|
||||
#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT
|
||||
/*!
|
||||
* @brief Set the configuration of pin interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number
|
||||
* @param pin GPIO pin number.
|
||||
* @param config GPIO pin interrupt configuration..
|
||||
*/
|
||||
void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Enables multiple pins interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
|
||||
|
||||
/*!
|
||||
* @brief Disables multiple pins interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
|
||||
|
||||
/*!
|
||||
* @brief Clears pin interrupt flag. Status flags are cleared by
|
||||
* writing a 1 to the corresponding bit position.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param index GPIO interrupt number.
|
||||
* @param mask GPIO pin number macro.
|
||||
*/
|
||||
void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
|
||||
|
||||
/*!
|
||||
* @ Read port interrupt status.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number
|
||||
* @param index GPIO interrupt number.
|
||||
* @retval masked GPIO status value
|
||||
*/
|
||||
uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index);
|
||||
|
||||
/*!
|
||||
* @brief Enables the specific pin interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param pin GPIO pin number.
|
||||
* @param index GPIO interrupt number.
|
||||
*/
|
||||
void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
|
||||
|
||||
/*!
|
||||
* @brief Disables the specific pin interrupt.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param pin GPIO pin number.
|
||||
* @param index GPIO interrupt number.
|
||||
*/
|
||||
void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
|
||||
|
||||
/*!
|
||||
* @brief Clears the specific pin interrupt flag. Status flags are cleared by
|
||||
* writing a 1 to the corresponding bit position.
|
||||
*
|
||||
* @param base GPIO base pointer.
|
||||
* @param port GPIO port number.
|
||||
* @param pin GPIO pin number.
|
||||
* @param index GPIO interrupt number.
|
||||
*/
|
||||
void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
|
||||
|
||||
#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _LPC_GPIO_H_*/
|
||||
584
drivers/fsl_iap.c
Normal file
584
drivers/fsl_iap.c
Normal file
@@ -0,0 +1,584 @@
|
||||
/*
|
||||
* Copyright 2018-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_iap.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.iap"
|
||||
#endif
|
||||
|
||||
#define HZ_TO_KHZ_DIV 1000U
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
/*! @brief IAP_ENTRY API function type */
|
||||
typedef void (*IAP_ENTRY_T)(uint32_t cmd[], uint32_t stat[]);
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
/*!
|
||||
* @brief Translate the IAP return status.
|
||||
*
|
||||
* @param status IAP status return from the IAP function.
|
||||
*
|
||||
* @return sdk status code.
|
||||
*/
|
||||
static inline status_t translate_iap_status(uint32_t status);
|
||||
|
||||
/*!
|
||||
* @brief IAP_ENTRY API function type.
|
||||
*
|
||||
* Wrapper for rom iap call.
|
||||
*
|
||||
* @param cmd_param IAP command and relevant parameter array.
|
||||
* @param status_result IAP status result array.
|
||||
*/
|
||||
static inline void iap_entry(uint32_t *cmd_param, uint32_t *status_result);
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
static inline status_t translate_iap_status(uint32_t status)
|
||||
{
|
||||
status_t ret = (status_t)status;
|
||||
|
||||
/* Translate IAP return code to sdk status code */
|
||||
if (status != (uint32_t)kStatus_Success)
|
||||
{
|
||||
ret = MAKE_STATUS((int32_t)kStatusGroup_IAP, (int32_t)status);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void iap_entry(uint32_t *cmd_param, uint32_t *status_result)
|
||||
{
|
||||
__disable_irq();
|
||||
((IAP_ENTRY_T)FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION)(cmd_param, status_result);
|
||||
__enable_irq();
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Read part identification number.
|
||||
*
|
||||
* This function is used to read the part identification number.
|
||||
*
|
||||
* @param partID Address to store the part identification number.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ReadPartID(uint32_t *partID)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReadPartId;
|
||||
iap_entry(command, result);
|
||||
*partID = result[1];
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Read boot code version number.
|
||||
*
|
||||
* This function is used to read the boot code version number.
|
||||
*
|
||||
* @param bootCodeVersion Address to store the boot code version.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*
|
||||
* note Boot code version is two 32-bit words. Word 0 is the major version, word 1 is the minor version.
|
||||
*/
|
||||
status_t IAP_ReadBootCodeVersion(uint32_t *bootCodeVersion)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_Read_BootromVersion;
|
||||
iap_entry(command, result);
|
||||
bootCodeVersion[0] = result[1];
|
||||
bootCodeVersion[1] = result[2];
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Reinvoke ISP.
|
||||
*
|
||||
* This function is used to invoke the boot loader in ISP mode. It maps boot vectors and configures the peripherals for
|
||||
* ISP.
|
||||
*
|
||||
* @param ispTyoe ISP type selection.
|
||||
* @param status store the possible status.
|
||||
*
|
||||
* @retval kStatus_IAP_ReinvokeISPConfig reinvoke configuration error.
|
||||
*
|
||||
* note The error response will be returned when IAP is disabled or an invalid ISP type selection appears. The call
|
||||
* won't return unless an error occurs, so there can be no status code.
|
||||
*/
|
||||
void IAP_ReinvokeISP(uint8_t ispType, uint32_t *status)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
uint8_t ispParameterArray[8];
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReinvokeISP;
|
||||
(void)memset(ispParameterArray, 0, sizeof(uint8_t) * 8U);
|
||||
ispParameterArray[1] = ispType;
|
||||
ispParameterArray[7] = ispParameterArray[0] ^ ispParameterArray[1] ^ ispParameterArray[2] ^ ispParameterArray[3] ^
|
||||
ispParameterArray[4] ^ ispParameterArray[5] ^ ispParameterArray[6];
|
||||
command[1] = (uint32_t)ispParameterArray;
|
||||
iap_entry(command, result);
|
||||
*status = (uint32_t)translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Read unique identification.
|
||||
*
|
||||
* This function is used to read the unique id.
|
||||
*
|
||||
* @param uniqueID store the uniqueID.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ReadUniqueID(uint32_t *uniqueID)
|
||||
{
|
||||
#if defined(FSL_FEATURE_IAP_READ_UNIQUE_ID_NOWORK) && FSL_FEATURE_IAP_READ_UNIQUE_ID_NOWORK
|
||||
uint32_t *result = (uint32_t *)0x01000100;
|
||||
uint8_t i = 0;
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
uniqueID[i] = result[i];
|
||||
return kStatus_IAP_Success;
|
||||
#else
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReadUid;
|
||||
iap_entry(command, result);
|
||||
uniqueID[0] = result[1];
|
||||
uniqueID[1] = result[2];
|
||||
uniqueID[2] = result[3];
|
||||
uniqueID[3] = result[4];
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if defined(FLASH_CTRL_FLASHCFG_FLASHTIM_MASK)
|
||||
/*!
|
||||
* @brief Flash memory access time.
|
||||
*
|
||||
* This function is used to configure the access time to the flash memory.
|
||||
*
|
||||
* @param accessTime Flash memory access time FLASHTIM +1 is equal to the
|
||||
* number of system clocks used for flash access.
|
||||
*/
|
||||
void IAP_ConfigAccessFlashTime(uint32_t accessTime)
|
||||
{
|
||||
uint32_t temp;
|
||||
temp = FLASH_CTRL->FLASHCFG;
|
||||
temp &= ~FLASH_CTRL_FLASHCFG_FLASHTIM_MASK;
|
||||
FLASH_CTRL->FLASHCFG = temp | FLASH_CTRL_FLASHCFG_FLASHTIM(accessTime);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_READ_FACTORY_SETTINGS_FUNCTION) && FSL_FEATURE_IAP_HAS_READ_FACTORY_SETTINGS_FUNCTION
|
||||
/*!
|
||||
* @brief Read factory settings.
|
||||
*
|
||||
* This function reads the factory settings for calibration registers.
|
||||
*
|
||||
* @param dstRegAddr Address of the targeted calibration register.
|
||||
* @param factoryValue Store the factory value
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_ParamError Param0 is not one of the supported calibration registers.
|
||||
*/
|
||||
status_t IAP_ReadFactorySettings(uint32_t dstRegAddr, uint32_t *factoryValue)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReadFactorySettings;
|
||||
command[1] = dstRegAddr;
|
||||
iap_entry(command, result);
|
||||
*factoryValue = result[1];
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
#endif /* FSL_FEATURE_IAP_HAS_READ_FACTORY_SETTINGS_FUNCTION */
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FLASH_FUNCTION) && FSL_FEATURE_IAP_HAS_FLASH_FUNCTION
|
||||
/*!
|
||||
* @brief Prepare sector for write operation.
|
||||
*
|
||||
* This function prepares sector(s) for write/erase operation. This function must be called before calling the
|
||||
* IAP_CopyRamToFlash() or IAP_EraseSector() or IAP_ErasePage() function. The end sector number must be greater than or
|
||||
* equal to the start sector number.
|
||||
*
|
||||
* @param startSector Start sector number.
|
||||
* @param endSector End sector number.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid or end sector number is greater than start sector number.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_PrepareSectorForWrite(uint32_t startSector, uint32_t endSector)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_PrepareSectorforWrite;
|
||||
command[1] = startSector;
|
||||
command[2] = endSector;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Copy RAM to flash.
|
||||
*
|
||||
* This function programs the flash memory. Corresponding sectors must be prepared via IAP_PrepareSectorForWrite before
|
||||
* calling this function. The addresses should be a 256 byte boundary and the number of bytes should be 256 | 512 |
|
||||
* 1024 | 4096.
|
||||
*
|
||||
* @param dstAddr Destination flash address where data bytes are to be written.
|
||||
* @param srcAddr Source ram address from where data bytes are to be read.
|
||||
* @param numOfBytes Number of bytes to be written.
|
||||
* @param systemCoreClock SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the
|
||||
* flash controller has a fixed reference clock, this parameter is bypassed.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_SrcAddrError Source address is not on word boundary.
|
||||
* @retval kStatus_IAP_DstAddrError Destination address is not on a correct boundary.
|
||||
* @retval kStatus_IAP_SrcAddrNotMapped Source address is not mapped in the memory map.
|
||||
* @retval kStatus_IAP_DstAddrNotMapped Destination address is not mapped in the memory map.
|
||||
* @retval kStatus_IAP_CountError Byte count is not multiple of 4 or is not a permitted value.
|
||||
* @retval kStatus_IAP_NotPrepared Command to prepare sector for write operation has not been executed.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_CopyRamToFlash(uint32_t dstAddr, uint32_t *srcAddr, uint32_t numOfBytes, uint32_t systemCoreClock)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_CopyRamToFlash;
|
||||
command[1] = dstAddr;
|
||||
command[2] = (uint32_t)srcAddr;
|
||||
command[3] = numOfBytes;
|
||||
#if !(defined(FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK) && FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK)
|
||||
command[4] = systemCoreClock / HZ_TO_KHZ_DIV;
|
||||
#endif /* FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK */
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Erase sector.
|
||||
*
|
||||
* This function erases sector(s). The end sector number must be greater than or equal to the start sector number.
|
||||
*
|
||||
* @param startSector Start sector number.
|
||||
* @param endSector End sector number.
|
||||
* @param systemCoreClock SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the
|
||||
* flash controller has a fixed reference clock, this parameter is bypassed.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid or end sector number is greater than start sector number.
|
||||
* @retval kStatus_IAP_NotPrepared Command to prepare sector for write operation has not been executed.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_EraseSector(uint32_t startSector, uint32_t endSector, uint32_t systemCoreClock)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_EraseSector;
|
||||
command[1] = startSector;
|
||||
command[2] = endSector;
|
||||
#if !(defined(FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK) && FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK)
|
||||
command[3] = systemCoreClock / HZ_TO_KHZ_DIV;
|
||||
#endif /* FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK */
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Erase page.
|
||||
*
|
||||
* This function erases page(s). The end page number must be greater than or equal to the start page number.
|
||||
*
|
||||
* @param startPage Start page number.
|
||||
* @param endPage End page number.
|
||||
* @param systemCoreClock SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the
|
||||
* flash controller has a fixed reference clock, this parameter is bypassed.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_InvalidSector Page number is invalid or end page number is greater than start page number.
|
||||
* @retval kStatus_IAP_NotPrepared Command to prepare sector for write operation has not been executed.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_ErasePage(uint32_t startPage, uint32_t endPage, uint32_t systemCoreClock)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ErasePage;
|
||||
command[1] = startPage;
|
||||
command[2] = endPage;
|
||||
#if !(defined(FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK) && FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK)
|
||||
command[3] = systemCoreClock / HZ_TO_KHZ_DIV;
|
||||
#endif /* FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK */
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Blank check sector(s)
|
||||
*
|
||||
* Blank check single or multiples sectors of flash memory. The end sector number must be greater than or equal to the
|
||||
* start sector number. It can be used to verify the sector erasure after IAP_EraseSector call.
|
||||
*
|
||||
* @param startSector Start sector number.
|
||||
* @param endSector End sector number.
|
||||
* @retval kStatus_IAP_Success One or more sectors are in erased state.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_SectorNotblank One or more sectors are not blank.
|
||||
*/
|
||||
status_t IAP_BlankCheckSector(uint32_t startSector, uint32_t endSector)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_BlankCheckSector;
|
||||
command[1] = startSector;
|
||||
command[2] = endSector;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Compare memory contents of flash with ram.
|
||||
*
|
||||
* This function compares the contents of flash and ram. It can be used to verify the flash memory contents after
|
||||
* IAP_CopyRamToFlash call.
|
||||
*
|
||||
* @param dstAddr Destination flash address.
|
||||
* @param srcAddr Source ram address.
|
||||
* @param numOfBytes Number of bytes to be compared.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Contents of flash and ram match.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_AddrError Address is not on word boundary.
|
||||
* @retval kStatus_IAP_AddrNotMapped Address is not mapped in the memory map.
|
||||
* @retval kStatus_IAP_CountError Byte count is not multiple of 4 or is not a permitted value.
|
||||
* @retval kStatus_IAP_CompareError Destination and source memory contents do not match.
|
||||
*/
|
||||
status_t IAP_Compare(uint32_t dstAddr, uint32_t *srcAddr, uint32_t numOfBytes)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_Compare;
|
||||
command[1] = dstAddr;
|
||||
command[2] = (uint32_t)srcAddr;
|
||||
command[3] = numOfBytes;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ) && FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ
|
||||
/*!
|
||||
* @brief Extended Read signature.
|
||||
*
|
||||
* This function calculates the signature value for one or more pages of on-chip flash memory.
|
||||
*
|
||||
* @param startPage Start page number.
|
||||
* @param endPage End page number.
|
||||
* @param numOfStates Number of wait states.
|
||||
* @param signature Address to store the signature value.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ExtendedFlashSignatureRead(uint32_t startPage, uint32_t endPage, uint32_t numOfStates, uint32_t *signature)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ExtendedReadSignature;
|
||||
command[1] = startPage;
|
||||
command[2] = endPage;
|
||||
command[3] = numOfStates;
|
||||
command[4] = 0;
|
||||
iap_entry(command, result);
|
||||
signature[0] = result[4];
|
||||
signature[1] = result[3];
|
||||
signature[2] = result[2];
|
||||
signature[3] = result[1];
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ */
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ) && FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ
|
||||
/*!
|
||||
* @brief Read flash signature.
|
||||
*
|
||||
* This funtion is used to obtain a 32-bit signature value of the entire flash memory.
|
||||
*
|
||||
* @param signature Address to store the 32-bit generated signature value.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ReadFlashSignature(uint32_t *signature)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReadSignature;
|
||||
iap_entry(command, result);
|
||||
*signature = result[1];
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ */
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FLASH_FUNCTION */
|
||||
|
||||
#if (defined(FSL_FEATURE_IAP_HAS_EEPROM_FUNCTION) && (FSL_FEATURE_IAP_HAS_EEPROM_FUNCTION == 1))
|
||||
/*!
|
||||
* @brief Read EEPROM page.
|
||||
*
|
||||
* This function is used to read given page of EEPROM into the memory provided.
|
||||
*
|
||||
* @param pageNumber EEPROM page number.
|
||||
* @param dstAddr Memory address to store the value read from EEPROM.
|
||||
* @param systemCoreClock Current core clock frequency in kHz.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid.
|
||||
* @retval kStatus_IAP_DstAddrNotMapped Destination address is not mapped in the memory map.
|
||||
*
|
||||
* note Value 0xFFFFFFFF of systemCoreClock will retain the timing and clock settings for EEPROM.
|
||||
*/
|
||||
status_t IAP_ReadEEPROMPage(uint32_t pageNumber, uint32_t *dstAddr, uint32_t systemCoreClock)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReadEEPROMPage;
|
||||
command[1] = pageNumber;
|
||||
command[2] = (uint32_t)dstAddr;
|
||||
command[3] = systemCoreClock / HZ_TO_KHZ_DIV;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Write EEPROM page.
|
||||
*
|
||||
* This function is used to write given data in the provided memory to a page of EEPROM.
|
||||
*
|
||||
* @param pageNumber EEPROM page number.
|
||||
* @param srcAddr Memory address holding data to be stored on to EEPROM page.
|
||||
* @param systemCoreClock Current core clock frequency in kHz.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid.
|
||||
* @retval kStatus_IAP_SrcAddrNotMapped Source address is not mapped in the memory map.
|
||||
*
|
||||
* note Value 0xFFFFFFFF of systemCoreClock will retain the timing and clock settings for EEPROM
|
||||
*/
|
||||
status_t IAP_WriteEEPROMPage(uint32_t pageNumber, uint32_t *srcAddr, uint32_t systemCoreClock)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_WriteEEPROMPage;
|
||||
command[1] = pageNumber;
|
||||
command[2] = (uint32_t)srcAddr;
|
||||
command[3] = systemCoreClock / HZ_TO_KHZ_DIV;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
#endif /* FSL_FEATURE_IAP_HAS_EEPROM_FUNCTION */
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FAIM_FUNCTION) && FSL_FEATURE_IAP_HAS_FAIM_FUNCTION
|
||||
/*!
|
||||
* @brief Read FAIM page.
|
||||
*
|
||||
* This function is used to read given page of FAIM into the memory provided.
|
||||
*
|
||||
* @param pageNumber FAIM page number.
|
||||
* @param dstAddr Memory address to store the value read from FAIM.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_DstAddrNotMapped Destination address is not mapped in the memory map.
|
||||
*/
|
||||
status_t IAP_ReadFAIMPage(uint32_t pageNumber, uint32_t *dstAddr)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_ReadFAIMPage;
|
||||
command[1] = pageNumber;
|
||||
command[2] = (uint32_t)dstAddr;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Write FAIM page.
|
||||
*
|
||||
* This function is used to write given data in the provided memory to a page of G.
|
||||
*
|
||||
* @param pageNumber FAIM page number.
|
||||
* @param srcAddr Memory address holding data to be stored on to FAIM page.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_SrcAddrNotMapped Source address is not mapped in the memory map.
|
||||
*/
|
||||
status_t IAP_WriteFAIMPage(uint32_t pageNumber, uint32_t *srcAddr)
|
||||
{
|
||||
uint32_t command[5] = {0x00U};
|
||||
uint32_t result[5] = {0x00U};
|
||||
|
||||
command[0] = (uint32_t)kIapCmd_IAP_WriteFAIMPage;
|
||||
command[1] = pageNumber;
|
||||
command[2] = (uint32_t)srcAddr;
|
||||
iap_entry(command, result);
|
||||
|
||||
return translate_iap_status(result[0]);
|
||||
}
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FAIM_FUNCTION */
|
||||
435
drivers/fsl_iap.h
Normal file
435
drivers/fsl_iap.h
Normal file
@@ -0,0 +1,435 @@
|
||||
/*
|
||||
* Copyright 2018-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_IAP_H_
|
||||
#define _FSL_IAP_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup IAP_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
#define FSL_IAP_DRIVER_VERSION (MAKE_VERSION(2, 0, 5)) /*!< Version 2.0.5. */
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief iap status codes.
|
||||
*/
|
||||
enum
|
||||
{
|
||||
kStatus_IAP_Success = kStatus_Success, /*!< Api is executed successfully */
|
||||
kStatus_IAP_InvalidCommand = MAKE_STATUS(kStatusGroup_IAP, 1U), /*!< Invalid command */
|
||||
kStatus_IAP_SrcAddrError = MAKE_STATUS(kStatusGroup_IAP, 2U), /*!< Source address is not on word boundary */
|
||||
kStatus_IAP_DstAddrError =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 3U), /*!< Destination address is not on a correct boundary */
|
||||
kStatus_IAP_SrcAddrNotMapped =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 4U), /*!< Source address is not mapped in the memory map */
|
||||
kStatus_IAP_DstAddrNotMapped =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 5U), /*!< Destination address is not mapped in the memory map */
|
||||
kStatus_IAP_CountError =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 6U), /*!< Byte count is not multiple of 4 or is not a permitted value */
|
||||
kStatus_IAP_InvalidSector = MAKE_STATUS(
|
||||
kStatusGroup_IAP,
|
||||
7), /*!< Sector/page number is invalid or end sector/page number is greater than start sector/page number */
|
||||
kStatus_IAP_SectorNotblank = MAKE_STATUS(kStatusGroup_IAP, 8U), /*!< One or more sectors are not blank */
|
||||
kStatus_IAP_NotPrepared =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 9U), /*!< Command to prepare sector for write operation has not been executed */
|
||||
kStatus_IAP_CompareError =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 10U), /*!< Destination and source memory contents do not match */
|
||||
kStatus_IAP_Busy = MAKE_STATUS(kStatusGroup_IAP, 11U), /*!< Flash programming hardware interface is busy */
|
||||
kStatus_IAP_ParamError =
|
||||
MAKE_STATUS(kStatusGroup_IAP, 12U), /*!< Insufficient number of parameters or invalid parameter */
|
||||
kStatus_IAP_AddrError = MAKE_STATUS(kStatusGroup_IAP, 13U), /*!< Address is not on word boundary */
|
||||
kStatus_IAP_AddrNotMapped = MAKE_STATUS(kStatusGroup_IAP, 14U), /*!< Address is not mapped in the memory map */
|
||||
kStatus_IAP_NoPower = MAKE_STATUS(kStatusGroup_IAP, 24U), /*!< Flash memory block is powered down */
|
||||
kStatus_IAP_NoClock = MAKE_STATUS(kStatusGroup_IAP, 27U), /*!< Flash memory block or controller is not clocked */
|
||||
kStatus_IAP_ReinvokeISPConfig = MAKE_STATUS(kStatusGroup_IAP, 0x1CU), /*!< Reinvoke configuration error */
|
||||
};
|
||||
|
||||
/*!
|
||||
* @brief iap command codes.
|
||||
*/
|
||||
enum _iap_commands
|
||||
{
|
||||
kIapCmd_IAP_ReadFactorySettings = 40U, /*!< Read the factory settings */
|
||||
kIapCmd_IAP_PrepareSectorforWrite = 50U, /*!< Prepare Sector for write */
|
||||
kIapCmd_IAP_CopyRamToFlash = 51U, /*!< Copy RAM to flash */
|
||||
kIapCmd_IAP_EraseSector = 52U, /*!< Erase Sector */
|
||||
kIapCmd_IAP_BlankCheckSector = 53U, /*!< Blank check sector */
|
||||
kIapCmd_IAP_ReadPartId = 54U, /*!< Read part id */
|
||||
kIapCmd_IAP_Read_BootromVersion = 55U, /*!< Read bootrom version */
|
||||
kIapCmd_IAP_Compare = 56U, /*!< Compare */
|
||||
kIapCmd_IAP_ReinvokeISP = 57U, /*!< Reinvoke ISP */
|
||||
kIapCmd_IAP_ReadUid = 58U, /*!< Read Uid */
|
||||
kIapCmd_IAP_ErasePage = 59U, /*!< Erase Page */
|
||||
kIapCmd_IAP_ReadSignature = 70U, /*!< Read Signature */
|
||||
kIapCmd_IAP_ExtendedReadSignature = 73U, /*!< Extended Read Signature */
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FAIM_FUNCTION) && FSL_FEATURE_IAP_HAS_FAIM_FUNCTION
|
||||
kIapCmd_IAP_ReadFAIMPage = 80U, /*!< Read FAIM page */
|
||||
kIapCmd_IAP_WriteFAIMPage = 81U, /*!< Write FAIM page */
|
||||
#else
|
||||
kIapCmd_IAP_ReadEEPROMPage = 80U, /*!< Read EEPROM page */
|
||||
kIapCmd_IAP_WriteEEPROMPage = 81U, /*!< Write EEPROM page */
|
||||
#endif /*FSL_FEATURE_IAP_HAS_FAIM_FUNCTION */
|
||||
};
|
||||
|
||||
/*!
|
||||
* @brief Flash memory access time.
|
||||
*/
|
||||
enum _flash_access_time
|
||||
{
|
||||
kFlash_IAP_OneSystemClockTime = 0U, /*! 1 system clock flash access time */
|
||||
kFlash_IAP_TwoSystemClockTime = 1U, /*! 2 system clock flash access time */
|
||||
kFlash_IAP_ThreeSystemClockTime = 2U, /*! 3 system clock flash access time */
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @name Basic operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Read part identification number.
|
||||
*
|
||||
* This function is used to read the part identification number.
|
||||
*
|
||||
* @param partID Address to store the part identification number.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ReadPartID(uint32_t *partID);
|
||||
|
||||
/*!
|
||||
* @brief Read boot code version number.
|
||||
*
|
||||
* This function is used to read the boot code version number.
|
||||
*
|
||||
* @param bootCodeVersion Address to store the boot code version.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*
|
||||
* note Boot code version is two 32-bit words. Word 0 is the major version, word 1 is the minor version.
|
||||
*/
|
||||
status_t IAP_ReadBootCodeVersion(uint32_t *bootCodeVersion);
|
||||
|
||||
/*!
|
||||
* @brief Reinvoke ISP.
|
||||
*
|
||||
* This function is used to invoke the boot loader in ISP mode. It maps boot vectors and configures the peripherals for
|
||||
* ISP.
|
||||
*
|
||||
* @param ispType ISP type selection.
|
||||
* @param status store the possible status.
|
||||
*
|
||||
* @retval kStatus_IAP_ReinvokeISPConfig reinvoke configuration error.
|
||||
*
|
||||
* note The error response will be returned when IAP is disabled or an invalid ISP type selection appears. The call
|
||||
* won't return unless an error occurs, so there can be no status code.
|
||||
*/
|
||||
void IAP_ReinvokeISP(uint8_t ispType, uint32_t *status);
|
||||
|
||||
/*!
|
||||
* @brief Read unique identification.
|
||||
*
|
||||
* This function is used to read the unique id.
|
||||
*
|
||||
* @param uniqueID store the uniqueID.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ReadUniqueID(uint32_t *uniqueID);
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_READ_FACTORY_SETTINGS_FUNCTION) && FSL_FEATURE_IAP_HAS_READ_FACTORY_SETTINGS_FUNCTION
|
||||
/*!
|
||||
* @brief Read factory settings.
|
||||
*
|
||||
* This function reads the factory settings for calibration registers.
|
||||
*
|
||||
* @param dstRegAddr Address of the targeted calibration register.
|
||||
* @param factoryValue Store the factory value
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_ParamError Param0 is not one of the supported calibration registers.
|
||||
*/
|
||||
status_t IAP_ReadFactorySettings(uint32_t dstRegAddr, uint32_t *factoryValue);
|
||||
#endif /* FSL_FEATURE_IAP_HAS_READ_FACTORY_SETTINGS_FUNCTION */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FLASH_FUNCTION) && FSL_FEATURE_IAP_HAS_FLASH_FUNCTION
|
||||
/*!
|
||||
* @name Flash operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(FLASH_CTRL_FLASHCFG_FLASHTIM_MASK)
|
||||
/*!
|
||||
* @brief Flash memory access time.
|
||||
*
|
||||
* This function is used to configure the access time to the flash memory.
|
||||
*
|
||||
* @param accessTime Flash memory access time FLASHTIM +1 is equal to the
|
||||
* number of system clocks used for flash access.
|
||||
*/
|
||||
void IAP_ConfigAccessFlashTime(uint32_t accessTime);
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Prepare sector for write operation.
|
||||
*
|
||||
* This function prepares sector(s) for write/erase operation. This function must be called before calling the
|
||||
* IAP_CopyRamToFlash() or IAP_EraseSector() or IAP_ErasePage() function. The end sector number must be greater than or
|
||||
* equal to the start sector number.
|
||||
*
|
||||
* @param startSector Start sector number.
|
||||
* @param endSector End sector number.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid or end sector number is greater than start sector number.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_PrepareSectorForWrite(uint32_t startSector, uint32_t endSector);
|
||||
|
||||
/*!
|
||||
* @brief Copy RAM to flash.
|
||||
*
|
||||
* This function programs the flash memory. Corresponding sectors must be prepared via IAP_PrepareSectorForWrite before
|
||||
* calling this function. The addresses should be a 256 byte boundary and the number of bytes should be 256 | 512 |
|
||||
* 1024 | 4096.
|
||||
*
|
||||
* @param dstAddr Destination flash address where data bytes are to be written.
|
||||
* @param srcAddr Source ram address from where data bytes are to be read.
|
||||
* @param numOfBytes Number of bytes to be written.
|
||||
* @param systemCoreClock SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the
|
||||
* flash controller has a fixed reference clock, this parameter is bypassed.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_SrcAddrError Source address is not on word boundary.
|
||||
* @retval kStatus_IAP_DstAddrError Destination address is not on a correct boundary.
|
||||
* @retval kStatus_IAP_SrcAddrNotMapped Source address is not mapped in the memory map.
|
||||
* @retval kStatus_IAP_DstAddrNotMapped Destination address is not mapped in the memory map.
|
||||
* @retval kStatus_IAP_CountError Byte count is not multiple of 4 or is not a permitted value.
|
||||
* @retval kStatus_IAP_NotPrepared Command to prepare sector for write operation has not been executed.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_CopyRamToFlash(uint32_t dstAddr, uint32_t *srcAddr, uint32_t numOfBytes, uint32_t systemCoreClock);
|
||||
|
||||
/*!
|
||||
* @brief Erase sector.
|
||||
*
|
||||
* This function erases sector(s). The end sector number must be greater than or equal to the start sector number.
|
||||
*
|
||||
* @param startSector Start sector number.
|
||||
* @param endSector End sector number.
|
||||
* @param systemCoreClock SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the
|
||||
* flash controller has a fixed reference clock, this parameter is bypassed.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid or end sector number is greater than start sector number.
|
||||
* @retval kStatus_IAP_NotPrepared Command to prepare sector for write operation has not been executed.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_EraseSector(uint32_t startSector, uint32_t endSector, uint32_t systemCoreClock);
|
||||
|
||||
/*!
|
||||
* @brief Erase page.
|
||||
*
|
||||
* This function erases page(s). The end page number must be greater than or equal to the start page number.
|
||||
*
|
||||
* @param startPage Start page number.
|
||||
* @param endPage End page number.
|
||||
* @param systemCoreClock SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the
|
||||
* flash controller has a fixed reference clock, this parameter is bypassed.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_InvalidSector Page number is invalid or end page number is greater than start page number.
|
||||
* @retval kStatus_IAP_NotPrepared Command to prepare sector for write operation has not been executed.
|
||||
* @retval kStatus_IAP_Busy Flash programming hardware interface is busy.
|
||||
*/
|
||||
status_t IAP_ErasePage(uint32_t startPage, uint32_t endPage, uint32_t systemCoreClock);
|
||||
|
||||
/*!
|
||||
* @brief Blank check sector(s)
|
||||
*
|
||||
* Blank check single or multiples sectors of flash memory. The end sector number must be greater than or equal to the
|
||||
* start sector number. It can be used to verify the sector erasure after IAP_EraseSector call.
|
||||
*
|
||||
* @param startSector Start sector number.
|
||||
* @param endSector End sector number.
|
||||
* @retval kStatus_IAP_Success One or more sectors are in erased state.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_SectorNotblank One or more sectors are not blank.
|
||||
*/
|
||||
status_t IAP_BlankCheckSector(uint32_t startSector, uint32_t endSector);
|
||||
|
||||
/*!
|
||||
* @brief Compare memory contents of flash with ram.
|
||||
*
|
||||
* This function compares the contents of flash and ram. It can be used to verify the flash memory contents after
|
||||
* IAP_CopyRamToFlash call.
|
||||
*
|
||||
* @param dstAddr Destination flash address.
|
||||
* @param srcAddr Source ram address.
|
||||
* @param numOfBytes Number of bytes to be compared.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Contents of flash and ram match.
|
||||
* @retval kStatus_IAP_NoPower Flash memory block is powered down.
|
||||
* @retval kStatus_IAP_NoClock Flash memory block or controller is not clocked.
|
||||
* @retval kStatus_IAP_AddrError Address is not on word boundary.
|
||||
* @retval kStatus_IAP_AddrNotMapped Address is not mapped in the memory map.
|
||||
* @retval kStatus_IAP_CountError Byte count is not multiple of 4 or is not a permitted value.
|
||||
* @retval kStatus_IAP_CompareError Destination and source memory contents do not match.
|
||||
*/
|
||||
status_t IAP_Compare(uint32_t dstAddr, uint32_t *srcAddr, uint32_t numOfBytes);
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ) && FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ
|
||||
/*!
|
||||
* @brief Extended Read signature.
|
||||
*
|
||||
* This function calculates the signature value for one or more pages of on-chip flash memory.
|
||||
*
|
||||
* @param startPage Start page number.
|
||||
* @param endPage End page number.
|
||||
* @param numOfStates Number of wait states.
|
||||
* @param signature Address to store the signature value.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ExtendedFlashSignatureRead(uint32_t startPage,
|
||||
uint32_t endPage,
|
||||
uint32_t numOfStates,
|
||||
uint32_t *signature);
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ */
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ) && FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ
|
||||
/*!
|
||||
* @brief Read flash signature.
|
||||
*
|
||||
* This funtion is used to obtain a 32-bit signature value of the entire flash memory.
|
||||
*
|
||||
* @param signature Address to store the 32-bit generated signature value.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
*/
|
||||
status_t IAP_ReadFlashSignature(uint32_t *signature);
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ */
|
||||
|
||||
/*@}*/
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FLASH_FUNCTION */
|
||||
|
||||
#if (defined(FSL_FEATURE_IAP_HAS_EEPROM_FUNCTION) && (FSL_FEATURE_IAP_HAS_EEPROM_FUNCTION == 1))
|
||||
/*!
|
||||
* @name EEPROM operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Read EEPROM page.
|
||||
*
|
||||
* This function is used to read given page of EEPROM into the memory provided.
|
||||
*
|
||||
* @param pageNumber EEPROM page number.
|
||||
* @param dstAddr Memory address to store the value read from EEPROM.
|
||||
* @param systemCoreClock Current core clock frequency in kHz.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid.
|
||||
* @retval kStatus_IAP_DstAddrNotMapped Destination address is not mapped in the memory map.
|
||||
*
|
||||
* note Value 0xFFFFFFFF of systemCoreClock will retain the timing and clock settings for EEPROM.
|
||||
*/
|
||||
status_t IAP_ReadEEPROMPage(uint32_t pageNumber, uint32_t *dstAddr, uint32_t systemCoreClock);
|
||||
|
||||
/*!
|
||||
* @brief Write EEPROM page.
|
||||
*
|
||||
* This function is used to write given data in the provided memory to a page of EEPROM.
|
||||
*
|
||||
* @param pageNumber EEPROM page number.
|
||||
* @param srcAddr Memory address holding data to be stored on to EEPROM page.
|
||||
* @param systemCoreClock Current core clock frequency in kHz.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_InvalidSector Sector number is invalid.
|
||||
* @retval kStatus_IAP_SrcAddrNotMapped Source address is not mapped in the memory map.
|
||||
*
|
||||
* note Value 0xFFFFFFFF of systemCoreClock will retain the timing and clock settings for EEPROM
|
||||
*/
|
||||
status_t IAP_WriteEEPROMPage(uint32_t pageNumber, uint32_t *srcAddr, uint32_t systemCoreClock);
|
||||
|
||||
/*@}*/
|
||||
#endif /* FSL_FEATURE_IAP_HAS_EEPROM_FUNCTION */
|
||||
|
||||
#if defined(FSL_FEATURE_IAP_HAS_FAIM_FUNCTION) && FSL_FEATURE_IAP_HAS_FAIM_FUNCTION
|
||||
/*!
|
||||
* @name FAIM operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Read FAIM page.
|
||||
*
|
||||
* This function is used to read given page of FAIM into the memory provided.
|
||||
*
|
||||
* @param pageNumber FAIM page number.
|
||||
* @param dstAddr Memory address to store the value read from FAIM.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_DstAddrNotMapped Destination address is not mapped in the memory map.
|
||||
*/
|
||||
status_t IAP_ReadFAIMPage(uint32_t pageNumber, uint32_t *dstAddr);
|
||||
|
||||
/*!
|
||||
* @brief Write FAIM page.
|
||||
*
|
||||
* This function is used to write given data in the provided memory to a page of G.
|
||||
*
|
||||
* @param pageNumber FAIM page number.
|
||||
* @param srcAddr Memory address holding data to be stored on to FAIM page.
|
||||
*
|
||||
* @retval kStatus_IAP_Success Api has been executed successfully.
|
||||
* @retval kStatus_IAP_SrcAddrNotMapped Source address is not mapped in the memory map.
|
||||
*/
|
||||
status_t IAP_WriteFAIMPage(uint32_t pageNumber, uint32_t *srcAddr);
|
||||
#endif /* FSL_FEATURE_IAP_HAS_FAIM_FUNCTION */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _FSL_IAP_H_ */
|
||||
135
drivers/fsl_inputmux.c
Normal file
135
drivers/fsl_inputmux.c
Normal file
@@ -0,0 +1,135 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_inputmux.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.inputmux"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/*!
|
||||
* brief Initialize INPUTMUX peripheral.
|
||||
|
||||
* This function enables the INPUTMUX clock.
|
||||
*
|
||||
* param base Base address of the INPUTMUX peripheral.
|
||||
*
|
||||
* retval None.
|
||||
*/
|
||||
void INPUTMUX_Init(INPUTMUX_Type *base)
|
||||
{
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
#if defined(FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE) && FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE
|
||||
CLOCK_EnableClock(kCLOCK_Sct);
|
||||
CLOCK_EnableClock(kCLOCK_Dma);
|
||||
#else
|
||||
CLOCK_EnableClock(kCLOCK_InputMux);
|
||||
#endif /* FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE */
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Attaches a signal
|
||||
*
|
||||
* This function gates the INPUTPMUX clock.
|
||||
*
|
||||
* param base Base address of the INPUTMUX peripheral.
|
||||
* param index Destination peripheral to attach the signal to.
|
||||
* param connection Selects connection.
|
||||
*
|
||||
* retval None.
|
||||
*/
|
||||
void INPUTMUX_AttachSignal(INPUTMUX_Type *base, uint32_t index, inputmux_connection_t connection)
|
||||
{
|
||||
uint32_t pmux_id;
|
||||
uint32_t output_id;
|
||||
|
||||
/* extract pmux to be used */
|
||||
pmux_id = ((uint32_t)(connection)) >> PMUX_SHIFT;
|
||||
/* extract function number */
|
||||
output_id = ((uint32_t)(connection)) & ((1UL << PMUX_SHIFT) - 1U);
|
||||
/* programm signal */
|
||||
*(volatile uint32_t *)(((uint32_t)base) + pmux_id + (index * 4U)) = output_id;
|
||||
}
|
||||
|
||||
#if defined(FSL_FEATURE_INPUTMUX_HAS_SIGNAL_ENA)
|
||||
/*!
|
||||
* brief Enable/disable a signal
|
||||
*
|
||||
* This function gates the INPUTPMUX clock.
|
||||
*
|
||||
* param base Base address of the INPUTMUX peripheral.
|
||||
* param signal Enable signal register id and bit offset.
|
||||
* param enable Selects enable or disable.
|
||||
*
|
||||
* retval None.
|
||||
*/
|
||||
void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable)
|
||||
{
|
||||
uint32_t ena_id;
|
||||
uint32_t ena_id_mask = (1UL << (32U - ENA_SHIFT)) - 1U;
|
||||
uint32_t bit_offset;
|
||||
|
||||
#if defined(FSL_FEATURE_INPUTMUX_HAS_CHANNEL_MUX) && FSL_FEATURE_INPUTMUX_HAS_CHANNEL_MUX
|
||||
uint32_t chmux_offset;
|
||||
uint32_t chmux_value;
|
||||
|
||||
/* Only enable need to update channel mux */
|
||||
if (enable && ((((uint32_t)signal) & (1UL << CHMUX_AVL_SHIFT)) != 0U))
|
||||
{
|
||||
chmux_offset = (((uint32_t)signal) >> CHMUX_OFF_SHIFT) & ((1U << (CHMUX_AVL_SHIFT - CHMUX_OFF_SHIFT)) - 1);
|
||||
chmux_value = (((uint32_t)signal) >> CHMUX_VAL_SHIFT) & ((1U << (CHMUX_OFF_SHIFT - CHMUX_VAL_SHIFT)) - 1);
|
||||
*(volatile uint32_t *)(((uint32_t)base) + chmux_offset) = chmux_value;
|
||||
}
|
||||
ena_id_mask = (1UL << (CHMUX_VAL_SHIFT - ENA_SHIFT)) - 1U;
|
||||
#endif
|
||||
/* extract enable register to be used */
|
||||
ena_id = (((uint32_t)signal) >> ENA_SHIFT) & ena_id_mask;
|
||||
/* extract enable bit offset */
|
||||
bit_offset = ((uint32_t)signal) & ((1UL << ENA_SHIFT) - 1U);
|
||||
/* set signal */
|
||||
if (enable)
|
||||
{
|
||||
*(volatile uint32_t *)(((uint32_t)base) + ena_id) |= (1UL << bit_offset);
|
||||
}
|
||||
else
|
||||
{
|
||||
*(volatile uint32_t *)(((uint32_t)base) + ena_id) &= ~(1UL << bit_offset);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* brief Deinitialize INPUTMUX peripheral.
|
||||
|
||||
* This function disables the INPUTMUX clock.
|
||||
*
|
||||
* param base Base address of the INPUTMUX peripheral.
|
||||
*
|
||||
* retval None.
|
||||
*/
|
||||
void INPUTMUX_Deinit(INPUTMUX_Type *base)
|
||||
{
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
#if defined(FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE) && FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE
|
||||
CLOCK_DisableClock(kCLOCK_Sct);
|
||||
CLOCK_DisableClock(kCLOCK_Dma);
|
||||
#else
|
||||
CLOCK_DisableClock(kCLOCK_InputMux);
|
||||
#endif /* FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE */
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
97
drivers/fsl_inputmux.h
Normal file
97
drivers/fsl_inputmux.h
Normal file
@@ -0,0 +1,97 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_INPUTMUX_H_
|
||||
#define _FSL_INPUTMUX_H_
|
||||
|
||||
#include "fsl_inputmux_connections.h"
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup inputmux_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
/*! @file fsl_inputmux_connections.h */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief Group interrupt driver version for SDK */
|
||||
#define FSL_INPUTMUX_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
|
||||
/*@}*/
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Initialize INPUTMUX peripheral.
|
||||
|
||||
* This function enables the INPUTMUX clock.
|
||||
*
|
||||
* @param base Base address of the INPUTMUX peripheral.
|
||||
*
|
||||
* @retval None.
|
||||
*/
|
||||
void INPUTMUX_Init(INPUTMUX_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Attaches a signal
|
||||
*
|
||||
* This function gates the INPUTPMUX clock.
|
||||
*
|
||||
* @param base Base address of the INPUTMUX peripheral.
|
||||
* @param index Destination peripheral to attach the signal to.
|
||||
* @param connection Selects connection.
|
||||
*
|
||||
* @retval None.
|
||||
*/
|
||||
void INPUTMUX_AttachSignal(INPUTMUX_Type *base, uint32_t index, inputmux_connection_t connection);
|
||||
|
||||
#if defined(FSL_FEATURE_INPUTMUX_HAS_SIGNAL_ENA)
|
||||
/*!
|
||||
* @brief Enable/disable a signal
|
||||
*
|
||||
* This function gates the INPUTPMUX clock.
|
||||
*
|
||||
* @param base Base address of the INPUTMUX peripheral.
|
||||
* @param signal Enable signal register id and bit offset.
|
||||
* @param enable Selects enable or disable.
|
||||
*
|
||||
* @retval None.
|
||||
*/
|
||||
void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable);
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Deinitialize INPUTMUX peripheral.
|
||||
|
||||
* This function disables the INPUTMUX clock.
|
||||
*
|
||||
* @param base Base address of the INPUTMUX peripheral.
|
||||
*
|
||||
* @retval None.
|
||||
*/
|
||||
void INPUTMUX_Deinit(INPUTMUX_Type *base);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _FSL_INPUTMUX_H_ */
|
||||
157
drivers/fsl_inputmux_connections.h
Normal file
157
drivers/fsl_inputmux_connections.h
Normal file
@@ -0,0 +1,157 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016, NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_INPUTMUX_CONNECTIONS_
|
||||
#define _FSL_INPUTMUX_CONNECTIONS_
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.inputmux_connections"
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @addtogroup inputmux_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @brief Periphinmux IDs */
|
||||
#define PINTSEL_PMUX_ID 0xC0U
|
||||
#define DMA_TRIG0_PMUX_ID 0xE0U
|
||||
#define DMA_OTRIG_PMUX_ID 0x160U
|
||||
#define FREQMEAS_PMUX_ID 0x180U
|
||||
#define PMUX_SHIFT 20U
|
||||
|
||||
/*! @brief INPUTMUX connections type */
|
||||
typedef enum _inputmux_connection_t
|
||||
{
|
||||
/*!< Frequency measure. */
|
||||
kINPUTMUX_MainOscToFreqmeas = 0U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Fro12MhzToFreqmeas = 1U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_WdtOscToFreqmeas = 2U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_32KhzOscToFreqmeas = 3U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_MainClkToFreqmeas = 4U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin4ToFreqmeas = 5U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin20ToFreqmeas = 6U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin24ToFreqmeas = 7U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin4ToFreqmeas = 8U + (FREQMEAS_PMUX_ID << PMUX_SHIFT),
|
||||
/*!< Pin Interrupt. */
|
||||
kINPUTMUX_GpioPort0Pin0ToPintsel = 0U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin1ToPintsel = 1U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin2ToPintsel = 2U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin3ToPintsel = 3U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin4ToPintsel = 4U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin5ToPintsel = 5U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin6ToPintsel = 6U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin7ToPintsel = 7U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin8ToPintsel = 8U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin9ToPintsel = 9U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin10ToPintsel = 10U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin11ToPintsel = 11U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin12ToPintsel = 12U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin13ToPintsel = 13U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin14ToPintsel = 14U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin15ToPintsel = 15U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin16ToPintsel = 16U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin17ToPintsel = 17U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin18ToPintsel = 18U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin19ToPintsel = 19U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin20ToPintsel = 20U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin21ToPintsel = 21U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin22ToPintsel = 22U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin23ToPintsel = 23U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin24ToPintsel = 24U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin25ToPintsel = 25U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin26ToPintsel = 26U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin27ToPintsel = 27U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin28ToPintsel = 28U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin29ToPintsel = 29U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin30ToPintsel = 30U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort0Pin31ToPintsel = 31U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin0ToPintsel = 32U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin1ToPintsel = 33U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin2ToPintsel = 34U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin3ToPintsel = 35U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin4ToPintsel = 36U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin5ToPintsel = 37U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin6ToPintsel = 38U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin7ToPintsel = 39U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin8ToPintsel = 40U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin9ToPintsel = 41U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin10ToPintsel = 42U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin11ToPintsel = 43U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin12ToPintsel = 44U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin13ToPintsel = 45U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin14ToPintsel = 46U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin15ToPintsel = 47U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin16ToPintsel = 48U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin17ToPintsel = 49U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin18ToPintsel = 50U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin19ToPintsel = 51U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin20ToPintsel = 52U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin21ToPintsel = 53U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin22ToPintsel = 54U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin23ToPintsel = 55U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin24ToPintsel = 56U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin25ToPintsel = 57U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin26ToPintsel = 58U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin27ToPintsel = 59U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin28ToPintsel = 60U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin29ToPintsel = 61U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin30ToPintsel = 62U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_GpioPort1Pin31ToPintsel = 63U + (PINTSEL_PMUX_ID << PMUX_SHIFT),
|
||||
/*!< DMA ITRIG. */
|
||||
kINPUTMUX_Adc0SeqaIrqToDma = 0U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_ADC0SeqbIrqToDma = 1U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Sct0DmaReq0ToDma = 2U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Sct0DmaReq1ToDma = 3U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer0M0ToDma = 4U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer0M1ToDma = 5U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer1M0ToDma = 6U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer2M0ToDma = 7U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer2M1ToDma = 8U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer3M0ToDma = 9U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer4M0ToDma = 10U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Ctimer4M1ToDma = 11U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_PinInt0ToDma = 12U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_PinInt1ToDma = 13U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_PinInt2ToDma = 14U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_PinInt3ToDma = 15U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Otrig0ToDma = 16U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Otrig1ToDma = 17U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Otrig2ToDma = 18U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Otrig3ToDma = 19U + (DMA_TRIG0_PMUX_ID << PMUX_SHIFT),
|
||||
/*!< DMA OTRIG. */
|
||||
kINPUTMUX_DmaFlexcomm0RxTrigoutToTriginChannels = 0U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm0TxTrigoutToTriginChannels = 1U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm1RxTrigoutToTriginChannels = 2U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm1TxTrigoutToTriginChannels = 3U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm2RxTrigoutToTriginChannels = 4U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm2TxTrigoutToTriginChannels = 5U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm3RxTrigoutToTriginChannels = 6U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm3TxTrigoutToTriginChannels = 7U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm4RxTrigoutToTriginChannels = 8U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm4TxTrigoutToTriginChannels = 9U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm5RxTrigoutToTriginChannels = 10U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm5TxTrigoutToTriginChannels = 11U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm6RxTrigoutToTriginChannels = 12U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm6TxTrigoutToTriginChannels = 13U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm7RxTrigoutToTriginChannels = 14U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaFlexcomm7TxTrigoutToTriginChannels = 15U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaDmic0Ch0TrigoutToTriginChannels = 16U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_Dmamic0Ch1TrigoutToTriginChannels = 17U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaSpifi0TrigoutToTriginChannels = 18U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
kINPUTMUX_DmaChannel19_TrigoutToTriginChannels = 19U + (DMA_OTRIG_PMUX_ID << PMUX_SHIFT),
|
||||
} inputmux_connection_t;
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _FSL_INPUTMUX_CONNECTIONS_ */
|
||||
288
drivers/fsl_iocon.h
Normal file
288
drivers/fsl_iocon.h
Normal file
@@ -0,0 +1,288 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_IOCON_H_
|
||||
#define _FSL_IOCON_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup lpc_iocon
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.lpc_iocon"
|
||||
#endif
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief IOCON driver version. */
|
||||
#define FSL_IOCON_DRIVER_VERSION (MAKE_VERSION(2, 1, 2))
|
||||
/*@}*/
|
||||
|
||||
/**
|
||||
* @brief Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format
|
||||
*/
|
||||
typedef struct _iocon_group
|
||||
{
|
||||
uint8_t port; /* Pin port */
|
||||
uint8_t pin; /* Pin number */
|
||||
uint8_t ionumber; /* IO number */
|
||||
uint16_t modefunc; /* Function and mode */
|
||||
} iocon_group_t;
|
||||
|
||||
/**
|
||||
* @brief IOCON function and mode selection definitions
|
||||
* @note See the User Manual for specific modes and functions supported by the various pins.
|
||||
*/
|
||||
#if defined(FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH) && (FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH == 4)
|
||||
#define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
|
||||
#define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
|
||||
#define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
|
||||
#define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
|
||||
#define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
|
||||
#define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
|
||||
#define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
|
||||
#define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
|
||||
#define IOCON_FUNC8 0x8 /*!< Selects pin function 8 */
|
||||
#define IOCON_FUNC9 0x9 /*!< Selects pin function 9 */
|
||||
#define IOCON_FUNC10 0xA /*!< Selects pin function 10 */
|
||||
#define IOCON_FUNC11 0xB /*!< Selects pin function 11 */
|
||||
#define IOCON_FUNC12 0xC /*!< Selects pin function 12 */
|
||||
#define IOCON_FUNC13 0xD /*!< Selects pin function 13 */
|
||||
#define IOCON_FUNC14 0xE /*!< Selects pin function 14 */
|
||||
#define IOCON_FUNC15 0xF /*!< Selects pin function 15 */
|
||||
#if defined(IOCON_PIO_MODE_SHIFT)
|
||||
#define IOCON_MODE_INACT (0x0 << IOCON_PIO_MODE_SHIFT) /*!< No addition pin function */
|
||||
#define IOCON_MODE_PULLDOWN (0x1 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-down function */
|
||||
#define IOCON_MODE_PULLUP (0x2 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-up function */
|
||||
#define IOCON_MODE_REPEATER (0x3 << IOCON_PIO_MODE_SHIFT) /*!< Selects pin repeater function */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_I2CSLEW_SHIFT)
|
||||
#define IOCON_GPIO_MODE (0x1 << IOCON_PIO_I2CSLEW_SHIFT) /*!< GPIO Mode */
|
||||
#define IOCON_I2C_SLEW (0x0 << IOCON_PIO_I2CSLEW_SHIFT) /*!< I2C Slew Rate Control */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_EGP_SHIFT)
|
||||
#define IOCON_GPIO_MODE (0x1 << IOCON_PIO_EGP_SHIFT) /*!< GPIO Mode */
|
||||
#define IOCON_I2C_SLEW (0x0 << IOCON_PIO_EGP_SHIFT) /*!< I2C Slew Rate Control */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_SLEW_SHIFT)
|
||||
#define IOCON_SLEW_STANDARD (0x0 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
|
||||
#define IOCON_SLEW_FAST (0x1 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_INVERT_SHIFT)
|
||||
#define IOCON_INV_EN (0x1 << IOCON_PIO_INVERT_SHIFT) /*!< Enables invert function on input */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_DIGIMODE_SHIFT)
|
||||
#define IOCON_ANALOG_EN (0x0 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables analog function by setting 0 to bit 7 */
|
||||
#define IOCON_DIGITAL_EN \
|
||||
(0x1 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables digital function by setting 1 to bit 7(default) */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_FILTEROFF_SHIFT)
|
||||
#define IOCON_INPFILT_OFF (0x1 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter Off for GPIO pins */
|
||||
#define IOCON_INPFILT_ON (0x0 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter On for GPIO pins */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_I2CDRIVE_SHIFT)
|
||||
#define IOCON_I2C_LOWDRIVER (0x0 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< Low drive, Output drive sink is 4 mA */
|
||||
#define IOCON_I2C_HIGHDRIVER (0x1 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< High drive, Output drive sink is 20 mA */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_OD_SHIFT)
|
||||
#define IOCON_OPENDRAIN_EN (0x1 << IOCON_PIO_OD_SHIFT) /*!< Enables open-drain function */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_I2CFILTER_SHIFT)
|
||||
#define IOCON_I2CFILTER_OFF (0x1 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter enabled */
|
||||
#define IOCON_I2CFILTER_ON (0x0 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter not enabled, */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_ASW_SHIFT)
|
||||
#define IOCON_AWS_EN (0x1 << IOCON_PIO_ASW_SHIFT) /*!< Enables analog switch function */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_SSEL_SHIFT)
|
||||
#define IOCON_SSEL_3V3 (0x0 << IOCON_PIO_SSEL_SHIFT) /*!< 3V3 signaling in I2C mode */
|
||||
#define IOCON_SSEL_1V8 (0x1 << IOCON_PIO_SSEL_SHIFT) /*!< 1V8 signaling in I2C mode */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_ECS_SHIFT)
|
||||
#define IOCON_ECS_OFF (0x0 << IOCON_PIO_ECS_SHIFT) /*!< IO is an open drain cell */
|
||||
#define IOCON_ECS_ON (0x1 << IOCON_PIO_ECS_SHIFT) /*!< Pull-up resistor is connected */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_S_MODE_SHIFT)
|
||||
#define IOCON_S_MODE_0CLK (0x0 << IOCON_PIO_S_MODE_SHIFT) /*!< Bypass input filter */
|
||||
#define IOCON_S_MODE_1CLK \
|
||||
(0x1 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 1 filter clock are rejected \ \ \ \ \
|
||||
*/
|
||||
#define IOCON_S_MODE_2CLK \
|
||||
(0x2 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 2 filter clock2 are rejected \ \ \ \ \
|
||||
*/
|
||||
#define IOCON_S_MODE_3CLK \
|
||||
(0x3 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 3 filter clock2 are rejected \ \ \ \ \
|
||||
*/
|
||||
#define IOCON_S_MODE(clks) ((clks) << IOCON_PIO_S_MODE_SHIFT) /*!< Select clocks for digital input filter mode */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_CLK_DIV_SHIFT)
|
||||
#define IOCON_CLKDIV(div) \
|
||||
((div) \
|
||||
<< IOCON_PIO_CLK_DIV_SHIFT) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
|
||||
#endif
|
||||
|
||||
#else
|
||||
#define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
|
||||
#define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
|
||||
#define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
|
||||
#define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
|
||||
#define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
|
||||
#define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
|
||||
#define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
|
||||
#define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
|
||||
|
||||
#if defined(IOCON_PIO_MODE_SHIFT)
|
||||
#define IOCON_MODE_INACT (0x0 << IOCON_PIO_MODE_SHIFT) /*!< No addition pin function */
|
||||
#define IOCON_MODE_PULLDOWN (0x1 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-down function */
|
||||
#define IOCON_MODE_PULLUP (0x2 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-up function */
|
||||
#define IOCON_MODE_REPEATER (0x3 << IOCON_PIO_MODE_SHIFT) /*!< Selects pin repeater function */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_I2CSLEW_SHIFT)
|
||||
#define IOCON_GPIO_MODE (0x1 << IOCON_PIO_I2CSLEW_SHIFT) /*!< GPIO Mode */
|
||||
#define IOCON_I2C_SLEW (0x0 << IOCON_PIO_I2CSLEW_SHIFT) /*!< I2C Slew Rate Control */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_EGP_SHIFT)
|
||||
#define IOCON_GPIO_MODE (0x1 << IOCON_PIO_EGP_SHIFT) /*!< GPIO Mode */
|
||||
#define IOCON_I2C_SLEW (0x0 << IOCON_PIO_EGP_SHIFT) /*!< I2C Slew Rate Control */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_INVERT_SHIFT)
|
||||
#define IOCON_INV_EN (0x1 << IOCON_PIO_INVERT_SHIFT) /*!< Enables invert function on input */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_DIGIMODE_SHIFT)
|
||||
#define IOCON_ANALOG_EN (0x0 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables analog function by setting 0 to bit 7 */
|
||||
#define IOCON_DIGITAL_EN \
|
||||
(0x1 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables digital function by setting 1 to bit 7(default) */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_FILTEROFF_SHIFT)
|
||||
#define IOCON_INPFILT_OFF (0x1 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter Off for GPIO pins */
|
||||
#define IOCON_INPFILT_ON (0x0 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter On for GPIO pins */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_I2CDRIVE_SHIFT)
|
||||
#define IOCON_I2C_LOWDRIVER (0x0 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< Low drive, Output drive sink is 4 mA */
|
||||
#define IOCON_I2C_HIGHDRIVER (0x1 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< High drive, Output drive sink is 20 mA */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_OD_SHIFT)
|
||||
#define IOCON_OPENDRAIN_EN (0x1 << IOCON_PIO_OD_SHIFT) /*!< Enables open-drain function */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_I2CFILTER_SHIFT)
|
||||
#define IOCON_I2CFILTER_OFF (0x1 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter enabled */
|
||||
#define IOCON_I2CFILTER_ON (0x0 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter not enabled */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_S_MODE_SHIFT)
|
||||
#define IOCON_S_MODE_0CLK (0x0 << IOCON_PIO_S_MODE_SHIFT) /*!< Bypass input filter */
|
||||
#define IOCON_S_MODE_1CLK \
|
||||
(0x1 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 1 filter clock are rejected \ \ \ \ \
|
||||
*/
|
||||
#define IOCON_S_MODE_2CLK \
|
||||
(0x2 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 2 filter clock2 are rejected \ \ \ \ \
|
||||
*/
|
||||
#define IOCON_S_MODE_3CLK \
|
||||
(0x3 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 3 filter clock2 are rejected \ \ \ \ \
|
||||
*/
|
||||
#define IOCON_S_MODE(clks) ((clks) << IOCON_PIO_S_MODE_SHIFT) /*!< Select clocks for digital input filter mode */
|
||||
#endif
|
||||
|
||||
#if defined(IOCON_PIO_CLK_DIV_SHIFT)
|
||||
#define IOCON_CLKDIV(div) \
|
||||
((div) \
|
||||
<< IOCON_PIO_CLK_DIV_SHIFT) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
|
||||
/**
|
||||
* @brief Sets I/O Control pin mux
|
||||
* @param base : The base of IOCON peripheral on the chip
|
||||
* @param ionumber : GPIO number to mux
|
||||
* @param modefunc : OR'ed values of type IOCON_*
|
||||
* @return Nothing
|
||||
*/
|
||||
__STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t ionumber, uint32_t modefunc)
|
||||
{
|
||||
base->PIO[ionumber] = modefunc;
|
||||
}
|
||||
#else
|
||||
/**
|
||||
* @brief Sets I/O Control pin mux
|
||||
* @param base : The base of IOCON peripheral on the chip
|
||||
* @param port : GPIO port to mux
|
||||
* @param pin : GPIO pin to mux
|
||||
* @param modefunc : OR'ed values of type IOCON_*
|
||||
* @return Nothing
|
||||
*/
|
||||
__STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)
|
||||
{
|
||||
base->PIO[port][pin] = modefunc;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Set all I/O Control pin muxing
|
||||
* @param base : The base of IOCON peripheral on the chip
|
||||
* @param pinArray : Pointer to array of pin mux selections
|
||||
* @param arrayLength : Number of entries in pinArray
|
||||
* @return Nothing
|
||||
*/
|
||||
__STATIC_INLINE void IOCON_SetPinMuxing(IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < arrayLength; i++)
|
||||
{
|
||||
#if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
|
||||
IOCON_PinMuxSet(base, pinArray[i].ionumber, pinArray[i].modefunc);
|
||||
#else
|
||||
IOCON_PinMuxSet(base, pinArray[i].port, pinArray[i].pin, pinArray[i].modefunc);
|
||||
#endif /* FSL_FEATURE_IOCON_ONE_DIMENSION */
|
||||
}
|
||||
}
|
||||
|
||||
/* @} */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _FSL_IOCON_H_ */
|
||||
185
drivers/fsl_reset.c
Normal file
185
drivers/fsl_reset.c
Normal file
@@ -0,0 +1,185 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016, NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_reset.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.reset"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \
|
||||
(defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))
|
||||
|
||||
/*!
|
||||
* brief Assert reset to peripheral.
|
||||
*
|
||||
* Asserts reset signal to specified peripheral module.
|
||||
*
|
||||
* param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
|
||||
* and reset bit position in the reset register.
|
||||
*/
|
||||
void RESET_SetPeripheralReset(reset_ip_name_t peripheral)
|
||||
{
|
||||
const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
|
||||
const uint32_t bitPos = ((uint32_t)peripheral & 0x0000FFFFu);
|
||||
const uint32_t bitMask = 1UL << bitPos;
|
||||
|
||||
assert(bitPos < 32UL);
|
||||
|
||||
/* ASYNC_SYSCON registers have offset 1024 */
|
||||
if (regIndex >= SYSCON_PRESETCTRL_COUNT)
|
||||
{
|
||||
/* reset register is in ASYNC_SYSCON */
|
||||
|
||||
/* set bit */
|
||||
ASYNC_SYSCON->ASYNCPRESETCTRLSET = bitMask;
|
||||
/* wait until it reads 0b1 */
|
||||
while (0u == (ASYNC_SYSCON->ASYNCPRESETCTRL & bitMask))
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* reset register is in SYSCON */
|
||||
|
||||
/* set bit */
|
||||
SYSCON->PRESETCTRLSET[regIndex] = bitMask;
|
||||
/* wait until it reads 0b1 */
|
||||
while (0u == (SYSCON->PRESETCTRL[regIndex] & bitMask))
|
||||
{
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Clear reset to peripheral.
|
||||
*
|
||||
* Clears reset signal to specified peripheral module, allows it to operate.
|
||||
*
|
||||
* param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
|
||||
* and reset bit position in the reset register.
|
||||
*/
|
||||
void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)
|
||||
{
|
||||
const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
|
||||
const uint32_t bitPos = ((uint32_t)peripheral & 0x0000FFFFu);
|
||||
const uint32_t bitMask = 1UL << bitPos;
|
||||
|
||||
assert(bitPos < 32UL);
|
||||
|
||||
/* ASYNC_SYSCON registers have offset 1024 */
|
||||
if (regIndex >= SYSCON_PRESETCTRL_COUNT)
|
||||
{
|
||||
/* reset register is in ASYNC_SYSCON */
|
||||
|
||||
/* clear bit */
|
||||
ASYNC_SYSCON->ASYNCPRESETCTRLCLR = bitMask;
|
||||
/* wait until it reads 0b0 */
|
||||
while (bitMask == (ASYNC_SYSCON->ASYNCPRESETCTRL & bitMask))
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* reset register is in SYSCON */
|
||||
|
||||
/* clear bit */
|
||||
SYSCON->PRESETCTRLCLR[regIndex] = bitMask;
|
||||
/* wait until it reads 0b0 */
|
||||
while (bitMask == (SYSCON->PRESETCTRL[regIndex] & bitMask))
|
||||
{
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Reset peripheral module.
|
||||
*
|
||||
* Reset peripheral module.
|
||||
*
|
||||
* param peripheral Peripheral to reset. The enum argument contains encoding of reset register
|
||||
* and reset bit position in the reset register.
|
||||
*/
|
||||
void RESET_PeripheralReset(reset_ip_name_t peripheral)
|
||||
{
|
||||
RESET_SetPeripheralReset(peripheral);
|
||||
RESET_ClearPeripheralReset(peripheral);
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Set slave core to reset state and hold.
|
||||
*/
|
||||
void RESET_SetSlaveCoreReset(void)
|
||||
{
|
||||
uint32_t cpuctrl = (SYSCON->CPUCTRL & ~0x7F80U) | 0xC0C48000U;
|
||||
|
||||
/* CM4 is the master. */
|
||||
if (SYSCON_CPUCTRL_MASTERCPU_MASK == (cpuctrl & SYSCON_CPUCTRL_MASTERCPU_MASK))
|
||||
{
|
||||
SYSCON->CPUCTRL = cpuctrl | SYSCON_CPUCTRL_CM0RSTEN_MASK;
|
||||
}
|
||||
/* CM0 is the master. */
|
||||
else
|
||||
{
|
||||
SYSCON->CPUCTRL = cpuctrl | SYSCON_CPUCTRL_CM4RSTEN_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Release slave core from reset state.
|
||||
*/
|
||||
void RESET_ClearSlaveCoreReset(void)
|
||||
{
|
||||
uint32_t cpuctrl = (SYSCON->CPUCTRL & ~0x7F80U) | 0xC0C48000U;
|
||||
|
||||
/* CM4 is the master. */
|
||||
if (SYSCON_CPUCTRL_MASTERCPU_MASK == (cpuctrl & SYSCON_CPUCTRL_MASTERCPU_MASK))
|
||||
{
|
||||
SYSCON->CPUCTRL = cpuctrl & ~SYSCON_CPUCTRL_CM0RSTEN_MASK;
|
||||
}
|
||||
/* CM0 is the master. */
|
||||
else
|
||||
{
|
||||
SYSCON->CPUCTRL = cpuctrl & ~SYSCON_CPUCTRL_CM4RSTEN_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Reset slave core with the boot entry.
|
||||
*/
|
||||
void RESET_SlaveCoreReset(uint32_t bootAddr, uint32_t bootStackPointer)
|
||||
{
|
||||
volatile uint32_t i = 10U;
|
||||
|
||||
SYSCON->CPSTACK = bootStackPointer;
|
||||
SYSCON->CPBOOT = bootAddr;
|
||||
|
||||
RESET_SetSlaveCoreReset();
|
||||
while(0U != i--){}
|
||||
RESET_ClearSlaveCoreReset();
|
||||
}
|
||||
|
||||
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT || FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT */
|
||||
205
drivers/fsl_reset.h
Normal file
205
drivers/fsl_reset.h
Normal file
@@ -0,0 +1,205 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016, NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _FSL_RESET_H_
|
||||
#define _FSL_RESET_H_
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include "fsl_device_registers.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup reset
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief reset driver version 2.0.1. */
|
||||
#define FSL_RESET_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Enumeration for peripheral reset control bits
|
||||
*
|
||||
* Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers
|
||||
*/
|
||||
typedef enum _SYSCON_RSTn
|
||||
{
|
||||
kFLASH_RST_SHIFT_RSTn = 0 | 7U, /**< Flash controller reset control */
|
||||
kFMC_RST_SHIFT_RSTn = 0 | 8U, /**< Flash accelerator reset control */
|
||||
kMUX_RST_SHIFT_RSTn = 0 | 11U, /**< Input mux reset control */
|
||||
kIOCON_RST_SHIFT_RSTn = 0 | 13U, /**< IOCON reset control */
|
||||
kGPIO0_RST_SHIFT_RSTn = 0 | 14U, /**< GPIO0 reset control */
|
||||
kGPIO1_RST_SHIFT_RSTn = 0 | 15U, /**< GPIO1 reset control */
|
||||
kPINT_RST_SHIFT_RSTn = 0 | 18U, /**< Pin interrupt (PINT) reset control */
|
||||
kGINT_RST_SHIFT_RSTn = 0 | 19U, /**< Grouped interrupt (PINT) reset control. */
|
||||
kDMA_RST_SHIFT_RSTn = 0 | 20U, /**< DMA reset control */
|
||||
kCRC_RST_SHIFT_RSTn = 0 | 21U, /**< CRC reset control */
|
||||
kWWDT_RST_SHIFT_RSTn = 0 | 22U, /**< Watchdog timer reset control */
|
||||
kADC0_RST_SHIFT_RSTn = 0 | 27U, /**< ADC0 reset control */
|
||||
kMRT_RST_SHIFT_RSTn = 65536 | 0U, /**< Multi-rate timer (MRT) reset control */
|
||||
kSCT0_RST_SHIFT_RSTn = 65536 | 2U, /**< SCTimer/PWM 0 (SCT0) reset control */
|
||||
kUTICK_RST_SHIFT_RSTn = 65536 | 10U, /**< Micro-tick timer reset control */
|
||||
kFC0_RST_SHIFT_RSTn = 65536 | 11U, /**< Flexcomm Interface 0 reset control */
|
||||
kFC1_RST_SHIFT_RSTn = 65536 | 12U, /**< Flexcomm Interface 1 reset control */
|
||||
kFC2_RST_SHIFT_RSTn = 65536 | 13U, /**< Flexcomm Interface 2 reset control */
|
||||
kFC3_RST_SHIFT_RSTn = 65536 | 14U, /**< Flexcomm Interface 3 reset control */
|
||||
kFC4_RST_SHIFT_RSTn = 65536 | 15U, /**< Flexcomm Interface 4 reset control */
|
||||
kFC5_RST_SHIFT_RSTn = 65536 | 16U, /**< Flexcomm Interface 5 reset control */
|
||||
kFC6_RST_SHIFT_RSTn = 65536 | 17U, /**< Flexcomm Interface 6 reset control */
|
||||
kFC7_RST_SHIFT_RSTn = 65536 | 18U, /**< Flexcomm Interface 7 reset control */
|
||||
kDMIC_RST_SHIFT_RSTn = 65536 | 19U, /**< Digital microphone interface reset control */
|
||||
kCT32B2_RST_SHIFT_RSTn = 65536 | 22U, /**< CT32B2 reset control */
|
||||
kUSB_RST_SHIFT_RSTn = 65536 | 25U, /**< USB reset control */
|
||||
kCT32B0_RST_SHIFT_RSTn = 65536 | 26U, /**< CT32B0 reset control */
|
||||
kCT32B1_RST_SHIFT_RSTn = 65536 | 27U, /**< CT32B1 reset control */
|
||||
kCT32B3_RST_SHIFT_RSTn = 67108864 | 13U, /**< CT32B3 reset control */
|
||||
kCT32B4_RST_SHIFT_RSTn = 67108864 | 14U, /**< CT32B4 reset control */
|
||||
} SYSCON_RSTn_t;
|
||||
|
||||
/** Array initializers with peripheral reset bits **/
|
||||
#define ADC_RSTS \
|
||||
{ \
|
||||
kADC0_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for ADC peripheral */
|
||||
#define CRC_RSTS \
|
||||
{ \
|
||||
kCRC_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for CRC peripheral */
|
||||
#define DMA_RSTS_N \
|
||||
{ \
|
||||
kDMA_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for DMA peripheral */
|
||||
#define DMIC_RSTS \
|
||||
{ \
|
||||
kDMIC_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for ADC peripheral */
|
||||
#define FLEXCOMM_RSTS \
|
||||
{ \
|
||||
kFC0_RST_SHIFT_RSTn, kFC1_RST_SHIFT_RSTn, kFC2_RST_SHIFT_RSTn, kFC3_RST_SHIFT_RSTn, kFC4_RST_SHIFT_RSTn, \
|
||||
kFC5_RST_SHIFT_RSTn, kFC6_RST_SHIFT_RSTn, kFC7_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for FLEXCOMM peripheral */
|
||||
#define GINT_RSTS \
|
||||
{ \
|
||||
kGINT_RST_SHIFT_RSTn, kGINT_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for GINT peripheral. GINT0 & GINT1 share same slot */
|
||||
#define GPIO_RSTS_N \
|
||||
{ \
|
||||
kGPIO0_RST_SHIFT_RSTn, kGPIO1_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for GPIO peripheral */
|
||||
#define INPUTMUX_RSTS \
|
||||
{ \
|
||||
kMUX_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for INPUTMUX peripheral */
|
||||
#define IOCON_RSTS \
|
||||
{ \
|
||||
kIOCON_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for IOCON peripheral */
|
||||
#define FLASH_RSTS \
|
||||
{ \
|
||||
kFLASH_RST_SHIFT_RSTn, kFMC_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for Flash peripheral */
|
||||
#define MRT_RSTS \
|
||||
{ \
|
||||
kMRT_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for MRT peripheral */
|
||||
#define PINT_RSTS \
|
||||
{ \
|
||||
kPINT_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for PINT peripheral */
|
||||
#define SCT_RSTS \
|
||||
{ \
|
||||
kSCT0_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for SCT peripheral */
|
||||
#define CTIMER_RSTS \
|
||||
{ \
|
||||
kCT32B0_RST_SHIFT_RSTn, kCT32B1_RST_SHIFT_RSTn, kCT32B2_RST_SHIFT_RSTn, kCT32B3_RST_SHIFT_RSTn, \
|
||||
kCT32B4_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for TIMER peripheral */
|
||||
#define USB_RSTS \
|
||||
{ \
|
||||
kUSB_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for USB peripheral */
|
||||
#define UTICK_RSTS \
|
||||
{ \
|
||||
kUTICK_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for UTICK peripheral */
|
||||
#define WWDT_RSTS \
|
||||
{ \
|
||||
kWWDT_RST_SHIFT_RSTn \
|
||||
} /* Reset bits for WWDT peripheral */
|
||||
|
||||
typedef SYSCON_RSTn_t reset_ip_name_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Assert reset to peripheral.
|
||||
*
|
||||
* Asserts reset signal to specified peripheral module.
|
||||
*
|
||||
* @param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
|
||||
* and reset bit position in the reset register.
|
||||
*/
|
||||
void RESET_SetPeripheralReset(reset_ip_name_t peripheral);
|
||||
|
||||
/*!
|
||||
* @brief Clear reset to peripheral.
|
||||
*
|
||||
* Clears reset signal to specified peripheral module, allows it to operate.
|
||||
*
|
||||
* @param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
|
||||
* and reset bit position in the reset register.
|
||||
*/
|
||||
void RESET_ClearPeripheralReset(reset_ip_name_t peripheral);
|
||||
|
||||
/*!
|
||||
* @brief Reset peripheral module.
|
||||
*
|
||||
* Reset peripheral module.
|
||||
*
|
||||
* @param peripheral Peripheral to reset. The enum argument contains encoding of reset register
|
||||
* and reset bit position in the reset register.
|
||||
*/
|
||||
void RESET_PeripheralReset(reset_ip_name_t peripheral);
|
||||
|
||||
/*!
|
||||
* @brief Set slave core to reset state and hold.
|
||||
*/
|
||||
void RESET_SetSlaveCoreReset(void);
|
||||
|
||||
/*!
|
||||
* @brief Release slave core from reset state.
|
||||
*/
|
||||
void RESET_ClearSlaveCoreReset(void);
|
||||
|
||||
/*!
|
||||
* @brief Reset slave core with the boot entry.
|
||||
*/
|
||||
void RESET_SlaveCoreReset(uint32_t bootAddr, uint32_t bootStackPointer);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @} */
|
||||
|
||||
#endif /* _FSL_RESET_H_ */
|
||||
803
drivers/fsl_sctimer.c
Normal file
803
drivers/fsl_sctimer.c
Normal file
@@ -0,0 +1,803 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_sctimer.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.sctimer"
|
||||
#endif
|
||||
|
||||
/*! @brief Typedef for interrupt handler. */
|
||||
typedef void (*sctimer_isr_t)(SCT_Type *base);
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
/*!
|
||||
* @brief Gets the instance from the base address
|
||||
*
|
||||
* @param base SCTimer peripheral base address
|
||||
*
|
||||
* @return The SCTimer instance
|
||||
*/
|
||||
static uint32_t SCTIMER_GetInstance(SCT_Type *base);
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
/*! @brief Pointers to SCT bases for each instance. */
|
||||
static SCT_Type *const s_sctBases[] = SCT_BASE_PTRS;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/*! @brief Pointers to SCT clocks for each instance. */
|
||||
static const clock_ip_name_t s_sctClocks[] = SCT_CLOCKS;
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_RESET_CONTROL) && FSL_SDK_DISABLE_DRIVER_RESET_CONTROL)
|
||||
#if defined(FSL_FEATURE_SCT_WRITE_ZERO_ASSERT_RESET) && FSL_FEATURE_SCT_WRITE_ZERO_ASSERT_RESET
|
||||
/*! @brief Pointers to SCT resets for each instance, writing a zero asserts the reset */
|
||||
static const reset_ip_name_t s_sctResets[] = SCT_RSTS_N;
|
||||
#else
|
||||
/*! @brief Pointers to SCT resets for each instance, writing a one asserts the reset */
|
||||
static const reset_ip_name_t s_sctResets[] = SCT_RSTS;
|
||||
#endif
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_RESET_CONTROL */
|
||||
|
||||
/*!< @brief SCTimer event Callback function. */
|
||||
static sctimer_event_callback_t s_eventCallback[FSL_FEATURE_SCT_NUMBER_OF_EVENTS];
|
||||
|
||||
/*!< @brief Keep track of SCTimer event number */
|
||||
static uint32_t s_currentEvent;
|
||||
|
||||
/*!< @brief Keep track of SCTimer state number */
|
||||
static uint32_t s_currentState;
|
||||
|
||||
/*!< @brief Keep track of SCTimer unify 32-bit or low 16-bit match/capture register number. */
|
||||
static uint32_t s_currentMatch;
|
||||
/*!< @brief Keep track of SCTimer high 16-bit match/capture register number. */
|
||||
static uint32_t s_currentMatchhigh;
|
||||
|
||||
/*! @brief Pointer to SCTimer IRQ handler */
|
||||
static sctimer_isr_t s_sctimerIsr;
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
static uint32_t SCTIMER_GetInstance(SCT_Type *base)
|
||||
{
|
||||
uint32_t instance;
|
||||
uint32_t sctArrayCount = (sizeof(s_sctBases) / sizeof(s_sctBases[0]));
|
||||
|
||||
/* Find the instance index from base address mappings. */
|
||||
for (instance = 0; instance < sctArrayCount; instance++)
|
||||
{
|
||||
if (s_sctBases[instance] == base)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
assert(instance < sctArrayCount);
|
||||
|
||||
return instance;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Ungates the SCTimer clock and configures the peripheral for basic operation.
|
||||
*
|
||||
* note This API should be called at the beginning of the application using the SCTimer driver.
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param config Pointer to the user configuration structure.
|
||||
*
|
||||
* return kStatus_Success indicates success; Else indicates failure.
|
||||
*/
|
||||
status_t SCTIMER_Init(SCT_Type *base, const sctimer_config_t *config)
|
||||
{
|
||||
assert(NULL != config);
|
||||
|
||||
uint32_t i;
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Enable the SCTimer clock*/
|
||||
CLOCK_EnableClock(s_sctClocks[SCTIMER_GetInstance(base)]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_RESET_CONTROL) && FSL_SDK_DISABLE_DRIVER_RESET_CONTROL)
|
||||
/* Reset the module. */
|
||||
RESET_PeripheralReset(s_sctResets[SCTIMER_GetInstance(base)]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_RESET_CONTROL */
|
||||
|
||||
/* Setup the counter operation. For Current Driver interface SCTIMER_Init don't know detail
|
||||
* frequency of input clock, but User know it. So the INSYNC have to set by user level. */
|
||||
base->CONFIG = SCT_CONFIG_CKSEL(config->clockSelect) | SCT_CONFIG_CLKMODE(config->clockMode) |
|
||||
SCT_CONFIG_UNIFY(config->enableCounterUnify) | SCT_CONFIG_INSYNC(config->inputsync);
|
||||
|
||||
/* Write to the control register, keep the counters halted. */
|
||||
base->CTRL =
|
||||
SCT_CTRL_BIDIR_L(config->enableBidirection_l) | SCT_CTRL_PRE_L(config->prescale_l) | SCT_CTRL_HALT_L_MASK;
|
||||
/* Clear the counter after changing the PRE value. */
|
||||
base->CTRL |= SCT_CTRL_CLRCTR_L_MASK;
|
||||
|
||||
if (!(config->enableCounterUnify))
|
||||
{
|
||||
base->CTRL |=
|
||||
SCT_CTRL_BIDIR_H(config->enableBidirection_h) | SCT_CTRL_PRE_H(config->prescale_h) | SCT_CTRL_HALT_H_MASK;
|
||||
base->CTRL |= SCT_CTRL_CLRCTR_H_MASK;
|
||||
}
|
||||
|
||||
/* Initial state of channel output */
|
||||
base->OUTPUT = config->outInitState;
|
||||
|
||||
/* Clear the global variables */
|
||||
s_currentEvent = 0U;
|
||||
s_currentState = 0U;
|
||||
s_currentMatch = 0U;
|
||||
s_currentMatchhigh = 0U;
|
||||
|
||||
/* Clear the callback array */
|
||||
for (i = 0; i < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS; i++)
|
||||
{
|
||||
s_eventCallback[i] = NULL;
|
||||
}
|
||||
|
||||
/* Save interrupt handler */
|
||||
s_sctimerIsr = SCTIMER_EventHandleIRQ;
|
||||
|
||||
return kStatus_Success;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Gates the SCTimer clock.
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
*/
|
||||
void SCTIMER_Deinit(SCT_Type *base)
|
||||
{
|
||||
/* Halt the counters */
|
||||
base->CTRL |= (SCT_CTRL_HALT_L_MASK | SCT_CTRL_HALT_H_MASK);
|
||||
|
||||
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
|
||||
/* Disable the SCTimer clock*/
|
||||
CLOCK_DisableClock(s_sctClocks[SCTIMER_GetInstance(base)]);
|
||||
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Fills in the SCTimer configuration structure with the default settings.
|
||||
*
|
||||
* The default values are:
|
||||
* code
|
||||
* config->enableCounterUnify = true;
|
||||
* config->clockMode = kSCTIMER_System_ClockMode;
|
||||
* config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0;
|
||||
* config->enableBidirection_l = false;
|
||||
* config->enableBidirection_h = false;
|
||||
* config->prescale_l = 0U;
|
||||
* config->prescale_h = 0U;
|
||||
* config->outInitState = 0U;
|
||||
* config->inputsync = 0xFU;
|
||||
* endcode
|
||||
* param config Pointer to the user configuration structure.
|
||||
*/
|
||||
void SCTIMER_GetDefaultConfig(sctimer_config_t *config)
|
||||
{
|
||||
assert(NULL != config);
|
||||
|
||||
/* Initializes the configure structure to zero. */
|
||||
(void)memset(config, 0, sizeof(*config));
|
||||
|
||||
/* SCT operates as a unified 32-bit counter */
|
||||
config->enableCounterUnify = true;
|
||||
/* System clock clocks the entire SCT module */
|
||||
config->clockMode = kSCTIMER_System_ClockMode;
|
||||
/* This is used only by certain clock modes */
|
||||
config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0;
|
||||
/* Up count mode only for the unified counter */
|
||||
config->enableBidirection_l = false;
|
||||
/* Up count mode only for Counte_H */
|
||||
config->enableBidirection_h = false;
|
||||
/* Prescale factor of 1 */
|
||||
config->prescale_l = 0U;
|
||||
/* Prescale factor of 1 for Counter_H*/
|
||||
config->prescale_h = 0U;
|
||||
/* Clear outputs */
|
||||
config->outInitState = 0U;
|
||||
/* Default value is 0xFU, it can be clear as 0 when speical conditions met.
|
||||
* Condition can be clear as 0: (for all Clock Modes):
|
||||
* (1) The corresponding input is already synchronous to the SCTimer/PWM clock.
|
||||
* (2) The SCTimer/PWM clock frequency does not exceed 100 MHz.
|
||||
* Note: The SCTimer/PWM clock is the bus/system clock for CKMODE 0-2 or asynchronous input
|
||||
* clock for CKMODE3.
|
||||
* Another condition can be clear as 0: (for CKMODE2 only)
|
||||
* (1) The corresponding input is synchronous to the designated CKMODE2 input clock.
|
||||
* (2) The CKMODE2 input clock frequency is less than one-third the frequency of the bus/system clock.
|
||||
* Default value set as 0U, input0~input3 are set as bypasses. */
|
||||
config->inputsync = 0xFU;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Configures the PWM signal parameters.
|
||||
*
|
||||
* Call this function to configure the PWM signal period, mode, duty cycle, and edge. This
|
||||
* function will create 2 events; one of the events will trigger on match with the pulse value
|
||||
* and the other will trigger when the counter matches the PWM period. The PWM period event is
|
||||
* also used as a limit event to reset the counter or change direction. Both events are enabled
|
||||
* for the same state. The state number can be retrieved by calling the function
|
||||
* SCTIMER_GetCurrentStateNumber().
|
||||
* The counter is set to operate as one 32-bit counter (unify bit is set to 1).
|
||||
* The counter operates in bi-directional mode when generating a center-aligned PWM.
|
||||
*
|
||||
* note When setting PWM output from multiple output pins, they all should use the same PWM mode
|
||||
* i.e all PWM's should be either edge-aligned or center-aligned.
|
||||
* When using this API, the PWM signal frequency of all the initialized channels must be the same.
|
||||
* Otherwise all the initialized channels' PWM signal frequency is equal to the last call to the
|
||||
* API's pwmFreq_Hz.
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param pwmParams PWM parameters to configure the output
|
||||
* param mode PWM operation mode, options available in enumeration ::sctimer_pwm_mode_t
|
||||
* param pwmFreq_Hz PWM signal frequency in Hz
|
||||
* param srcClock_Hz SCTimer counter clock in Hz
|
||||
* param event Pointer to a variable where the PWM period event number is stored
|
||||
*
|
||||
* return kStatus_Success on success
|
||||
* kStatus_Fail If we have hit the limit in terms of number of events created or if
|
||||
* an incorrect PWM dutycylce is passed in.
|
||||
*/
|
||||
status_t SCTIMER_SetupPwm(SCT_Type *base,
|
||||
const sctimer_pwm_signal_param_t *pwmParams,
|
||||
sctimer_pwm_mode_t mode,
|
||||
uint32_t pwmFreq_Hz,
|
||||
uint32_t srcClock_Hz,
|
||||
uint32_t *event)
|
||||
{
|
||||
assert(NULL != pwmParams);
|
||||
assert(0U != srcClock_Hz);
|
||||
assert(0U != pwmFreq_Hz);
|
||||
assert((uint32_t)pwmParams->output < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS);
|
||||
assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
|
||||
|
||||
/* If we do not have enough events available (this function will create two events),
|
||||
* the function will return fail.
|
||||
*/
|
||||
status_t status = kStatus_Fail;
|
||||
status_t status2;
|
||||
uint32_t period, pulsePeriod = 0;
|
||||
uint32_t sctClock = srcClock_Hz / (((base->CTRL & SCT_CTRL_PRE_L_MASK) >> SCT_CTRL_PRE_L_SHIFT) + 1U);
|
||||
uint32_t periodEvent = 0, pulseEvent = 0;
|
||||
uint32_t reg;
|
||||
|
||||
if ((s_currentEvent + 2U) <= (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS)
|
||||
{
|
||||
/* Use bi-directional mode for center-aligned PWM */
|
||||
if (mode == kSCTIMER_CenterAlignedPwm)
|
||||
{
|
||||
base->CTRL |= SCT_CTRL_BIDIR_L_MASK;
|
||||
}
|
||||
|
||||
/* Calculate PWM period match value */
|
||||
if (mode == kSCTIMER_EdgeAlignedPwm)
|
||||
{
|
||||
period = (sctClock / pwmFreq_Hz) - 1U;
|
||||
}
|
||||
else
|
||||
{
|
||||
period = sctClock / (pwmFreq_Hz * 2U);
|
||||
}
|
||||
|
||||
/* Calculate pulse width and period match value:
|
||||
* For EdgeAlignedPwm, "pulsePeriod = 0" results in 0% dutycyle, "pulsePeriod = period - 1U" results in 100%
|
||||
* dutycyle. For CenterAlignedPwm, , "pulsePeriod = 0" results in 0% dutycyle, "pulsePeriod = period + 2U"
|
||||
* results in 100% dutycyle.
|
||||
*/
|
||||
|
||||
pulsePeriod = (uint32_t)(((uint64_t)period * pwmParams->dutyCyclePercent) / 100U);
|
||||
|
||||
if (pwmParams->dutyCyclePercent >= 100U)
|
||||
{
|
||||
if (mode == kSCTIMER_EdgeAlignedPwm)
|
||||
{
|
||||
pulsePeriod = period + 2U;
|
||||
}
|
||||
else
|
||||
{
|
||||
pulsePeriod = period - 1U;
|
||||
}
|
||||
}
|
||||
|
||||
/* Schedule an event when we reach the PWM period */
|
||||
status =
|
||||
SCTIMER_CreateAndScheduleEvent(base, kSCTIMER_MatchEventOnly, period, 0, kSCTIMER_Counter_U, &periodEvent);
|
||||
|
||||
/* Schedule an event when we reach the pulse width */
|
||||
status2 = SCTIMER_CreateAndScheduleEvent(base, kSCTIMER_MatchEventOnly, pulsePeriod, 0, kSCTIMER_Counter_U,
|
||||
&pulseEvent);
|
||||
|
||||
if ((kStatus_Success == status) && (kStatus_Success == status2))
|
||||
{
|
||||
/* Reset the counter when we reach the PWM period */
|
||||
SCTIMER_SetupCounterLimitAction(base, kSCTIMER_Counter_U, periodEvent);
|
||||
|
||||
/* Return the period event to the user */
|
||||
*event = periodEvent;
|
||||
|
||||
/* For high-true level */
|
||||
if ((uint32_t)pwmParams->level == (uint32_t)kSCTIMER_HighTrue)
|
||||
{
|
||||
/* Set the initial output level to low which is the inactive state */
|
||||
base->OUTPUT &= ~(1UL << (uint32_t)pwmParams->output);
|
||||
|
||||
if (mode == kSCTIMER_EdgeAlignedPwm)
|
||||
{
|
||||
/* Set the output when we reach the PWM period */
|
||||
SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, periodEvent);
|
||||
/* Clear the output when we reach the PWM pulse value */
|
||||
SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, pulseEvent);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear the output when we reach the PWM pulse event */
|
||||
SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, pulseEvent);
|
||||
/* Reverse output when down counting */
|
||||
reg = base->OUTPUTDIRCTRL;
|
||||
reg &= ~((uint32_t)SCT_OUTPUTDIRCTRL_SETCLR0_MASK << (2U * (uint32_t)pwmParams->output));
|
||||
reg |= (1UL << (2U * (uint32_t)pwmParams->output));
|
||||
base->OUTPUTDIRCTRL = reg;
|
||||
}
|
||||
}
|
||||
/* For low-true level */
|
||||
else
|
||||
{
|
||||
/* Set the initial output level to high which is the inactive state */
|
||||
base->OUTPUT |= (1UL << (uint32_t)pwmParams->output);
|
||||
|
||||
if (mode == kSCTIMER_EdgeAlignedPwm)
|
||||
{
|
||||
/* Clear the output when we reach the PWM period */
|
||||
SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, periodEvent);
|
||||
/* Set the output when we reach the PWM pulse value */
|
||||
SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, pulseEvent);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the output when we reach the PWM pulse event */
|
||||
SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, pulseEvent);
|
||||
/* Reverse output when down counting */
|
||||
reg = base->OUTPUTDIRCTRL;
|
||||
reg &= ~((uint32_t)SCT_OUTPUTDIRCTRL_SETCLR0_MASK << (2U * (uint32_t)pwmParams->output));
|
||||
reg |= (1UL << (2U * (uint32_t)pwmParams->output));
|
||||
base->OUTPUTDIRCTRL = reg;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Updates the duty cycle of an active PWM signal.
|
||||
*
|
||||
* Before calling this function, the counter is set to operate as one 32-bit counter (unify bit is set to 1).
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param output The output to configure
|
||||
* param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
|
||||
* param event Event number associated with this PWM signal. This was returned to the user by the
|
||||
* function SCTIMER_SetupPwm().
|
||||
*/
|
||||
void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t event)
|
||||
|
||||
{
|
||||
assert(dutyCyclePercent <= 100U);
|
||||
assert((uint32_t)output < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS);
|
||||
assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
|
||||
|
||||
uint32_t periodMatchReg, pulseMatchReg;
|
||||
uint32_t pulsePeriod = 0, period;
|
||||
|
||||
/* Retrieve the match register number for the PWM period */
|
||||
periodMatchReg = base->EV[event].CTRL & SCT_EV_CTRL_MATCHSEL_MASK;
|
||||
|
||||
/* Retrieve the match register number for the PWM pulse period */
|
||||
pulseMatchReg = base->EV[event + 1U].CTRL & SCT_EV_CTRL_MATCHSEL_MASK;
|
||||
|
||||
period = base->MATCH[periodMatchReg];
|
||||
|
||||
/* Calculate pulse width and period match value:
|
||||
* For EdgeAlignedPwm, "pulsePeriod = 0" results in 0% dutycyle, "pulsePeriod = period - 1U" results in 100%
|
||||
* dutycyle. For CenterAlignedPwm, , "pulsePeriod = 0" results in 0% dutycyle, "pulsePeriod = period + 2U"
|
||||
* results in 100% dutycyle.
|
||||
*/
|
||||
pulsePeriod = (uint32_t)(((uint64_t)period * dutyCyclePercent) / 100U);
|
||||
|
||||
if (dutyCyclePercent == 100U)
|
||||
{
|
||||
if (0U == (base->CTRL & SCT_CTRL_BIDIR_L_MASK))
|
||||
{
|
||||
pulsePeriod = period + 2U;
|
||||
}
|
||||
else
|
||||
{
|
||||
pulsePeriod = period - 1U;
|
||||
}
|
||||
}
|
||||
|
||||
/* Stop the counter before updating match register */
|
||||
SCTIMER_StopTimer(base, (uint32_t)kSCTIMER_Counter_U);
|
||||
|
||||
/* Update dutycycle */
|
||||
base->MATCH[pulseMatchReg] = SCT_MATCH_MATCHn_L(pulsePeriod);
|
||||
base->MATCHREL[pulseMatchReg] = SCT_MATCHREL_RELOADn_L(pulsePeriod);
|
||||
|
||||
/* Restart the counter */
|
||||
SCTIMER_StartTimer(base, (uint32_t)kSCTIMER_Counter_U);
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Create an event that is triggered on a match or IO and schedule in current state.
|
||||
*
|
||||
* This function will configure an event using the options provided by the user. If the event type uses
|
||||
* the counter match, then the function will set the user provided match value into a match register
|
||||
* and put this match register number into the event control register.
|
||||
* The event is enabled for the current state and the event number is increased by one at the end.
|
||||
* The function returns the event number; this event number can be used to configure actions to be
|
||||
* done when this event is triggered.
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param howToMonitor Event type; options are available in the enumeration ::sctimer_interrupt_enable_t
|
||||
* param matchValue The match value that will be programmed to a match register
|
||||
* param whichIO The input or output that will be involved in event triggering. This field
|
||||
* is ignored if the event type is "match only"
|
||||
* param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
|
||||
* In 32-bit mode, we can select Counter_U.
|
||||
* param event Pointer to a variable where the new event number is stored
|
||||
*
|
||||
* return kStatus_Success on success
|
||||
* kStatus_Error if we have hit the limit in terms of number of events created or
|
||||
if we have reached the limit in terms of number of match registers
|
||||
*/
|
||||
status_t SCTIMER_CreateAndScheduleEvent(SCT_Type *base,
|
||||
sctimer_event_t howToMonitor,
|
||||
uint32_t matchValue,
|
||||
uint32_t whichIO,
|
||||
sctimer_counter_t whichCounter,
|
||||
uint32_t *event)
|
||||
{
|
||||
uint32_t combMode = (((uint32_t)howToMonitor & SCT_EV_CTRL_COMBMODE_MASK) >> SCT_EV_CTRL_COMBMODE_SHIFT);
|
||||
uint32_t currentCtrlVal = (uint32_t)howToMonitor;
|
||||
status_t status = kStatus_Success;
|
||||
|
||||
if (s_currentEvent < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS)
|
||||
{
|
||||
if (2U == combMode)
|
||||
{
|
||||
base->EV[s_currentEvent].CTRL = currentCtrlVal | SCT_EV_CTRL_IOSEL(whichIO);
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((0U == combMode) || (3U == combMode))
|
||||
{
|
||||
currentCtrlVal |= SCT_EV_CTRL_IOSEL(whichIO);
|
||||
}
|
||||
|
||||
if ((kSCTIMER_Counter_L == whichCounter) && (0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)))
|
||||
{
|
||||
if (s_currentMatch < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE)
|
||||
{
|
||||
currentCtrlVal |= SCT_EV_CTRL_MATCHSEL(s_currentMatch);
|
||||
|
||||
/* Use Counter_L bits if user wants to setup the Low counter */
|
||||
base->MATCH_ACCESS16BIT[s_currentMatch].MATCHL = (uint16_t)matchValue;
|
||||
base->MATCHREL_ACCESS16BIT[s_currentMatch].MATCHRELL = (uint16_t)matchValue;
|
||||
base->EV[s_currentEvent].CTRL = currentCtrlVal;
|
||||
|
||||
/* Increment the match register number */
|
||||
s_currentMatch++;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* An error would occur if we have hit the limit in terms of number of match registers */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
else if ((kSCTIMER_Counter_H == whichCounter) && (0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)))
|
||||
{
|
||||
if (s_currentMatchhigh < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE)
|
||||
{
|
||||
currentCtrlVal |= SCT_EV_CTRL_MATCHSEL(s_currentMatchhigh);
|
||||
|
||||
/* Use Counter_H bits if user wants to setup the High counter */
|
||||
currentCtrlVal |= SCT_EV_CTRL_HEVENT(1U);
|
||||
base->MATCH_ACCESS16BIT[s_currentMatchhigh].MATCHH = (uint16_t)matchValue;
|
||||
base->MATCHREL_ACCESS16BIT[s_currentMatchhigh].MATCHRELH = (uint16_t)matchValue;
|
||||
|
||||
base->EV[s_currentEvent].CTRL = currentCtrlVal;
|
||||
/* Increment the match register number */
|
||||
s_currentMatchhigh++;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* An error would occur if we have hit the limit in terms of number of match registers */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
else if ((kSCTIMER_Counter_U == whichCounter) && (0U != (base->CONFIG & SCT_CONFIG_UNIFY_MASK)))
|
||||
{
|
||||
if (s_currentMatch < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE)
|
||||
{
|
||||
/* Use Counter_L bits if counter is operating in 32-bit mode */
|
||||
currentCtrlVal |= SCT_EV_CTRL_MATCHSEL(s_currentMatch);
|
||||
|
||||
base->MATCH[s_currentMatch] = matchValue;
|
||||
base->MATCHREL[s_currentMatch] = matchValue;
|
||||
base->EV[s_currentEvent].CTRL = currentCtrlVal;
|
||||
|
||||
/* Increment the match register number */
|
||||
s_currentMatch++;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* An error would occur if we have hit the limit in terms of number of match registers */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The used counter must match the CONFIG[UNIFY] bit selection */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
|
||||
if (kStatus_Success == status)
|
||||
{
|
||||
/* Enable the event in the current state */
|
||||
base->EV[s_currentEvent].STATE = (1UL << s_currentState);
|
||||
|
||||
/* Return the event number */
|
||||
*event = s_currentEvent;
|
||||
|
||||
/* Increment the event number */
|
||||
s_currentEvent++;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* An error would occur if we have hit the limit in terms of number of events created */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Enable an event in the current state.
|
||||
*
|
||||
* This function will allow the event passed in to trigger in the current state. The event must
|
||||
* be created earlier by either calling the function SCTIMER_SetupPwm() or function
|
||||
* SCTIMER_CreateAndScheduleEvent() .
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param event Event number to enable in the current state
|
||||
*
|
||||
*/
|
||||
void SCTIMER_ScheduleEvent(SCT_Type *base, uint32_t event)
|
||||
{
|
||||
/* Enable event in the current state */
|
||||
base->EV[event].STATE |= (1UL << s_currentState);
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Increase the state by 1
|
||||
*
|
||||
* All future events created by calling the function SCTIMER_ScheduleEvent() will be enabled in this new
|
||||
* state.
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
*
|
||||
* return kStatus_Success on success
|
||||
* kStatus_Error if we have hit the limit in terms of states used
|
||||
|
||||
*/
|
||||
status_t SCTIMER_IncreaseState(SCT_Type *base)
|
||||
{
|
||||
status_t status = kStatus_Success;
|
||||
|
||||
/* Return an error if we have hit the limit in terms of states used */
|
||||
if (s_currentState >= (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_STATES)
|
||||
{
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
else
|
||||
{
|
||||
s_currentState++;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Provides the current state
|
||||
*
|
||||
* User can use this to set the next state by calling the function SCTIMER_SetupNextStateAction().
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
*
|
||||
* return The current state
|
||||
*/
|
||||
uint32_t SCTIMER_GetCurrentState(SCT_Type *base)
|
||||
{
|
||||
return s_currentState;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Toggle the output level.
|
||||
*
|
||||
* This change in the output level is triggered by the event number that is passed in by the user.
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param whichIO The output to toggle
|
||||
* param event Event number that will trigger the output change
|
||||
*/
|
||||
void SCTIMER_SetupOutputToggleAction(SCT_Type *base, uint32_t whichIO, uint32_t event)
|
||||
{
|
||||
assert(whichIO < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS);
|
||||
|
||||
uint32_t reg;
|
||||
|
||||
/* Set the same event to set and clear the output */
|
||||
base->OUT[whichIO].CLR |= (1UL << event);
|
||||
base->OUT[whichIO].SET |= (1UL << event);
|
||||
|
||||
/* Set the conflict resolution to toggle output */
|
||||
reg = base->RES;
|
||||
reg &= ~(((uint32_t)SCT_RES_O0RES_MASK) << (2U * whichIO));
|
||||
reg |= ((uint32_t)(kSCTIMER_ResolveToggle)) << (2U * whichIO);
|
||||
base->RES = reg;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Setup capture of the counter value on trigger of a selected event
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
|
||||
* In 32-bit mode, we can select Counter_U.
|
||||
* param captureRegister Pointer to a variable where the capture register number will be returned. User
|
||||
* can read the captured value from this register when the specified event is triggered.
|
||||
* param event Event number that will trigger the capture
|
||||
*
|
||||
* return kStatus_Success on success
|
||||
* kStatus_Error if we have hit the limit in terms of number of match/capture registers available
|
||||
*/
|
||||
status_t SCTIMER_SetupCaptureAction(SCT_Type *base,
|
||||
sctimer_counter_t whichCounter,
|
||||
uint32_t *captureRegister,
|
||||
uint32_t event)
|
||||
{
|
||||
status_t status;
|
||||
|
||||
if ((kSCTIMER_Counter_L == whichCounter) || (kSCTIMER_Counter_U == whichCounter))
|
||||
{
|
||||
if (s_currentMatch < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE)
|
||||
{
|
||||
/* Set the bit to enable event */
|
||||
base->CAPCTRL_ACCESS16BIT[s_currentMatch].CAPCTRLL |= SCT_CAPCTRLL_CAPCTRLL(1UL << event);
|
||||
|
||||
/* Set this resource to be a capture rather than match */
|
||||
base->REGMODE_ACCESS16BIT.REGMODEL |= SCT_REGMODEL_REGMODEL(1UL << s_currentMatch);
|
||||
|
||||
/* Return the match register number */
|
||||
*captureRegister = s_currentMatch;
|
||||
|
||||
/* Increase the match register number */
|
||||
s_currentMatch++;
|
||||
|
||||
status = kStatus_Success;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return an error if we have hit the limit in terms of number of capture/match registers used */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (s_currentMatchhigh < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE)
|
||||
{
|
||||
/* Set bit to enable event */
|
||||
base->CAPCTRL_ACCESS16BIT[s_currentMatchhigh].CAPCTRLH |= SCT_CAPCTRLL_CAPCTRLL(1UL << event);
|
||||
|
||||
/* Set this resource to be a capture rather than match */
|
||||
base->REGMODE_ACCESS16BIT.REGMODEH |= SCT_REGMODEL_REGMODEL(1UL << s_currentMatchhigh);
|
||||
|
||||
/* Return the match register number */
|
||||
*captureRegister = s_currentMatchhigh;
|
||||
|
||||
/* Increase the match register number */
|
||||
s_currentMatchhigh++;
|
||||
|
||||
status = kStatus_Success;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return an error if we have hit the limit in terms of number of capture/match registers used */
|
||||
status = kStatus_Fail;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief Receive noticification when the event trigger an interrupt.
|
||||
*
|
||||
* If the interrupt for the event is enabled by the user, then a callback can be registered
|
||||
* which will be invoked when the event is triggered
|
||||
*
|
||||
* param base SCTimer peripheral base address
|
||||
* param event Event number that will trigger the interrupt
|
||||
* param callback Function to invoke when the event is triggered
|
||||
*/
|
||||
|
||||
void SCTIMER_SetCallback(SCT_Type *base, sctimer_event_callback_t callback, uint32_t event)
|
||||
{
|
||||
s_eventCallback[event] = callback;
|
||||
}
|
||||
|
||||
/*!
|
||||
* brief SCTimer interrupt handler.
|
||||
*
|
||||
* param base SCTimer peripheral base address.
|
||||
*/
|
||||
void SCTIMER_EventHandleIRQ(SCT_Type *base)
|
||||
{
|
||||
uint32_t eventFlag = SCT0->EVFLAG;
|
||||
/* Only clear the flags whose interrupt field is enabled */
|
||||
uint32_t clearFlag = (eventFlag & SCT0->EVEN);
|
||||
uint32_t mask = eventFlag;
|
||||
uint32_t i;
|
||||
|
||||
/* Invoke the callback for certain events */
|
||||
for (i = 0; i < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS; i++)
|
||||
{
|
||||
if ((mask & 0x1U) != 0U)
|
||||
{
|
||||
if (s_eventCallback[i] != NULL)
|
||||
{
|
||||
s_eventCallback[i]();
|
||||
}
|
||||
}
|
||||
mask >>= 1UL;
|
||||
|
||||
if (0U == mask)
|
||||
{
|
||||
/* All events have been handled. */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear event interrupt flag */
|
||||
SCT0->EVFLAG = clearFlag;
|
||||
}
|
||||
|
||||
void SCT0_DriverIRQHandler(void);
|
||||
void SCT0_DriverIRQHandler(void)
|
||||
{
|
||||
s_sctimerIsr(SCT0);
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
1258
drivers/fsl_sctimer.h
Normal file
1258
drivers/fsl_sctimer.h
Normal file
File diff suppressed because it is too large
Load Diff
1072
drivers/fsl_spi.c
Normal file
1072
drivers/fsl_spi.c
Normal file
File diff suppressed because it is too large
Load Diff
746
drivers/fsl_spi.h
Normal file
746
drivers/fsl_spi.h
Normal file
@@ -0,0 +1,746 @@
|
||||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_SPI_H_
|
||||
#define _FSL_SPI_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_flexcomm.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup spi_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief SPI driver version. */
|
||||
#define FSL_SPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 1))
|
||||
/*@}*/
|
||||
|
||||
/*! @brief Global variable for dummy data value setting. */
|
||||
extern volatile uint8_t s_dummyData[];
|
||||
|
||||
#ifndef SPI_DUMMYDATA
|
||||
/*! @brief SPI dummy transfer data, the data is sent while txBuff is NULL. */
|
||||
#define SPI_DUMMYDATA (0xFFU)
|
||||
#endif
|
||||
|
||||
/*! @brief Retry times for waiting flag. */
|
||||
#ifndef SPI_RETRY_TIMES
|
||||
#define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
|
||||
#endif
|
||||
|
||||
#define SPI_DATA(n) (((uint32_t)(n)) & 0xFFFFUL)
|
||||
#define SPI_CTRLMASK (0xFFFF0000U)
|
||||
|
||||
#define SPI_ASSERTNUM_SSEL(n) ((~(1UL << ((n) + 16UL))) & 0xF0000UL)
|
||||
#define SPI_DEASSERTNUM_SSEL(n) (1UL << ((n) + 16UL))
|
||||
#define SPI_DEASSERT_ALL (0xF0000UL)
|
||||
|
||||
#define SPI_FIFOWR_FLAGS_MASK (~(SPI_DEASSERT_ALL | SPI_FIFOWR_TXDATA_MASK | SPI_FIFOWR_LEN_MASK))
|
||||
|
||||
#define SPI_FIFOTRIG_TXLVL_GET(base) (((base)->FIFOTRIG & SPI_FIFOTRIG_TXLVL_MASK) >> SPI_FIFOTRIG_TXLVL_SHIFT)
|
||||
#define SPI_FIFOTRIG_RXLVL_GET(base) (((base)->FIFOTRIG & SPI_FIFOTRIG_RXLVL_MASK) >> SPI_FIFOTRIG_RXLVL_SHIFT)
|
||||
|
||||
/*! @brief SPI transfer option.*/
|
||||
typedef enum _spi_xfer_option
|
||||
{
|
||||
kSPI_FrameDelay = (SPI_FIFOWR_EOF_MASK), /*!< A delay may be inserted, defined in the DLY register.*/
|
||||
kSPI_FrameAssert = (SPI_FIFOWR_EOT_MASK), /*!< SSEL will be deasserted at the end of a transfer */
|
||||
} spi_xfer_option_t;
|
||||
|
||||
/*! @brief SPI data shifter direction options.*/
|
||||
typedef enum _spi_shift_direction
|
||||
{
|
||||
kSPI_MsbFirst = 0U, /*!< Data transfers start with most significant bit. */
|
||||
kSPI_LsbFirst = 1U /*!< Data transfers start with least significant bit. */
|
||||
} spi_shift_direction_t;
|
||||
|
||||
/*! @brief SPI clock polarity configuration.*/
|
||||
typedef enum _spi_clock_polarity
|
||||
{
|
||||
kSPI_ClockPolarityActiveHigh = 0x0U, /*!< Active-high SPI clock (idles low). */
|
||||
kSPI_ClockPolarityActiveLow /*!< Active-low SPI clock (idles high). */
|
||||
} spi_clock_polarity_t;
|
||||
|
||||
/*! @brief SPI clock phase configuration.*/
|
||||
typedef enum _spi_clock_phase
|
||||
{
|
||||
kSPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SCK occurs at the middle of the first
|
||||
* cycle of a data transfer. */
|
||||
kSPI_ClockPhaseSecondEdge /*!< First edge on SCK occurs at the start of the
|
||||
* first cycle of a data transfer. */
|
||||
} spi_clock_phase_t;
|
||||
|
||||
/*! @brief txFIFO watermark values */
|
||||
typedef enum _spi_txfifo_watermark
|
||||
{
|
||||
kSPI_TxFifo0 = 0, /*!< SPI tx watermark is empty */
|
||||
kSPI_TxFifo1 = 1, /*!< SPI tx watermark at 1 item */
|
||||
kSPI_TxFifo2 = 2, /*!< SPI tx watermark at 2 items */
|
||||
kSPI_TxFifo3 = 3, /*!< SPI tx watermark at 3 items */
|
||||
kSPI_TxFifo4 = 4, /*!< SPI tx watermark at 4 items */
|
||||
kSPI_TxFifo5 = 5, /*!< SPI tx watermark at 5 items */
|
||||
kSPI_TxFifo6 = 6, /*!< SPI tx watermark at 6 items */
|
||||
kSPI_TxFifo7 = 7, /*!< SPI tx watermark at 7 items */
|
||||
} spi_txfifo_watermark_t;
|
||||
|
||||
/*! @brief rxFIFO watermark values */
|
||||
typedef enum _spi_rxfifo_watermark
|
||||
{
|
||||
kSPI_RxFifo1 = 0, /*!< SPI rx watermark at 1 item */
|
||||
kSPI_RxFifo2 = 1, /*!< SPI rx watermark at 2 items */
|
||||
kSPI_RxFifo3 = 2, /*!< SPI rx watermark at 3 items */
|
||||
kSPI_RxFifo4 = 3, /*!< SPI rx watermark at 4 items */
|
||||
kSPI_RxFifo5 = 4, /*!< SPI rx watermark at 5 items */
|
||||
kSPI_RxFifo6 = 5, /*!< SPI rx watermark at 6 items */
|
||||
kSPI_RxFifo7 = 6, /*!< SPI rx watermark at 7 items */
|
||||
kSPI_RxFifo8 = 7, /*!< SPI rx watermark at 8 items */
|
||||
} spi_rxfifo_watermark_t;
|
||||
|
||||
/*! @brief Transfer data width */
|
||||
typedef enum _spi_data_width
|
||||
{
|
||||
kSPI_Data4Bits = 3, /*!< 4 bits data width */
|
||||
kSPI_Data5Bits = 4, /*!< 5 bits data width */
|
||||
kSPI_Data6Bits = 5, /*!< 6 bits data width */
|
||||
kSPI_Data7Bits = 6, /*!< 7 bits data width */
|
||||
kSPI_Data8Bits = 7, /*!< 8 bits data width */
|
||||
kSPI_Data9Bits = 8, /*!< 9 bits data width */
|
||||
kSPI_Data10Bits = 9, /*!< 10 bits data width */
|
||||
kSPI_Data11Bits = 10, /*!< 11 bits data width */
|
||||
kSPI_Data12Bits = 11, /*!< 12 bits data width */
|
||||
kSPI_Data13Bits = 12, /*!< 13 bits data width */
|
||||
kSPI_Data14Bits = 13, /*!< 14 bits data width */
|
||||
kSPI_Data15Bits = 14, /*!< 15 bits data width */
|
||||
kSPI_Data16Bits = 15, /*!< 16 bits data width */
|
||||
} spi_data_width_t;
|
||||
|
||||
/*! @brief Slave select */
|
||||
typedef enum _spi_ssel
|
||||
{
|
||||
kSPI_Ssel0 = 0, /*!< Slave select 0 */
|
||||
kSPI_Ssel1 = 1, /*!< Slave select 1 */
|
||||
kSPI_Ssel2 = 2, /*!< Slave select 2 */
|
||||
kSPI_Ssel3 = 3, /*!< Slave select 3 */
|
||||
} spi_ssel_t;
|
||||
|
||||
/*! @brief ssel polarity */
|
||||
typedef enum _spi_spol
|
||||
{
|
||||
kSPI_Spol0ActiveHigh = SPI_CFG_SPOL0(1),
|
||||
kSPI_Spol1ActiveHigh = SPI_CFG_SPOL1(1),
|
||||
kSPI_Spol2ActiveHigh = SPI_CFG_SPOL2(1),
|
||||
#if defined(FSL_FEATURE_SPI_IS_SSEL_PIN_COUNT_EQUAL_TO_THREE) && (FSL_FEATURE_SPI_IS_SSEL_PIN_COUNT_EQUAL_TO_THREE)
|
||||
kSPI_SpolActiveAllHigh = (kSPI_Spol0ActiveHigh | kSPI_Spol1ActiveHigh | kSPI_Spol2ActiveHigh),
|
||||
#else
|
||||
kSPI_Spol3ActiveHigh = SPI_CFG_SPOL3(1),
|
||||
kSPI_SpolActiveAllHigh =
|
||||
(kSPI_Spol0ActiveHigh | kSPI_Spol1ActiveHigh | kSPI_Spol2ActiveHigh | kSPI_Spol3ActiveHigh),
|
||||
#endif
|
||||
kSPI_SpolActiveAllLow = 0,
|
||||
} spi_spol_t;
|
||||
|
||||
/*!
|
||||
* @brief SPI delay time configure structure.
|
||||
* Note:
|
||||
* The DLY register controls several programmable delays related to SPI signalling,
|
||||
* it stands for how many SPI clock time will be inserted.
|
||||
* The maxinun value of these delay time is 15.
|
||||
*/
|
||||
typedef struct _spi_delay_config
|
||||
{
|
||||
uint8_t preDelay; /*!< Delay between SSEL assertion and the beginning of transfer. */
|
||||
uint8_t postDelay; /*!< Delay between the end of transfer and SSEL deassertion. */
|
||||
uint8_t frameDelay; /*!< Delay between frame to frame. */
|
||||
uint8_t transferDelay; /*!< Delay between transfer to transfer. */
|
||||
} spi_delay_config_t;
|
||||
|
||||
/*! @brief SPI master user configure structure.*/
|
||||
typedef struct _spi_master_config
|
||||
{
|
||||
bool enableLoopback; /*!< Enable loopback for test purpose */
|
||||
bool enableMaster; /*!< Enable SPI at initialization time */
|
||||
spi_clock_polarity_t polarity; /*!< Clock polarity */
|
||||
spi_clock_phase_t phase; /*!< Clock phase */
|
||||
spi_shift_direction_t direction; /*!< MSB or LSB */
|
||||
uint32_t baudRate_Bps; /*!< Baud Rate for SPI in Hz */
|
||||
spi_data_width_t dataWidth; /*!< Width of the data */
|
||||
spi_ssel_t sselNum; /*!< Slave select number */
|
||||
spi_spol_t sselPol; /*!< Configure active CS polarity */
|
||||
uint8_t txWatermark; /*!< txFIFO watermark */
|
||||
uint8_t rxWatermark; /*!< rxFIFO watermark */
|
||||
spi_delay_config_t delayConfig; /*!< Delay configuration. */
|
||||
} spi_master_config_t;
|
||||
|
||||
/*! @brief SPI slave user configure structure.*/
|
||||
typedef struct _spi_slave_config
|
||||
{
|
||||
bool enableSlave; /*!< Enable SPI at initialization time */
|
||||
spi_clock_polarity_t polarity; /*!< Clock polarity */
|
||||
spi_clock_phase_t phase; /*!< Clock phase */
|
||||
spi_shift_direction_t direction; /*!< MSB or LSB */
|
||||
spi_data_width_t dataWidth; /*!< Width of the data */
|
||||
spi_spol_t sselPol; /*!< Configure active CS polarity */
|
||||
uint8_t txWatermark; /*!< txFIFO watermark */
|
||||
uint8_t rxWatermark; /*!< rxFIFO watermark */
|
||||
} spi_slave_config_t;
|
||||
|
||||
/*! @brief SPI transfer status.*/
|
||||
enum
|
||||
{
|
||||
kStatus_SPI_Busy = MAKE_STATUS(kStatusGroup_LPC_SPI, 0), /*!< SPI bus is busy */
|
||||
kStatus_SPI_Idle = MAKE_STATUS(kStatusGroup_LPC_SPI, 1), /*!< SPI is idle */
|
||||
kStatus_SPI_Error = MAKE_STATUS(kStatusGroup_LPC_SPI, 2), /*!< SPI error */
|
||||
kStatus_SPI_BaudrateNotSupport =
|
||||
MAKE_STATUS(kStatusGroup_LPC_SPI, 3), /*!< Baudrate is not support in current clock source */
|
||||
kStatus_SPI_Timeout = MAKE_STATUS(kStatusGroup_LPC_SPI, 4) /*!< SPI timeout polling status flags. */
|
||||
};
|
||||
|
||||
/*! @brief SPI interrupt sources.*/
|
||||
enum _spi_interrupt_enable
|
||||
{
|
||||
kSPI_RxLvlIrq = SPI_FIFOINTENSET_RXLVL_MASK, /*!< Rx level interrupt */
|
||||
kSPI_TxLvlIrq = SPI_FIFOINTENSET_TXLVL_MASK, /*!< Tx level interrupt */
|
||||
};
|
||||
|
||||
/*! @brief SPI status flags.*/
|
||||
enum _spi_statusflags
|
||||
{
|
||||
kSPI_TxEmptyFlag = SPI_FIFOSTAT_TXEMPTY_MASK, /*!< txFifo is empty */
|
||||
kSPI_TxNotFullFlag = SPI_FIFOSTAT_TXNOTFULL_MASK, /*!< txFifo is not full */
|
||||
kSPI_RxNotEmptyFlag = SPI_FIFOSTAT_RXNOTEMPTY_MASK, /*!< rxFIFO is not empty */
|
||||
kSPI_RxFullFlag = SPI_FIFOSTAT_RXFULL_MASK, /*!< rxFIFO is full */
|
||||
};
|
||||
|
||||
/*! @brief SPI transfer structure */
|
||||
typedef struct _spi_transfer
|
||||
{
|
||||
uint8_t *txData; /*!< Send buffer */
|
||||
uint8_t *rxData; /*!< Receive buffer */
|
||||
uint32_t configFlags; /*!< Additional option to control transfer, @ref spi_xfer_option_t. */
|
||||
size_t dataSize; /*!< Transfer bytes */
|
||||
} spi_transfer_t;
|
||||
|
||||
/*! @brief SPI half-duplex(master only) transfer structure */
|
||||
typedef struct _spi_half_duplex_transfer
|
||||
{
|
||||
uint8_t *txData; /*!< Send buffer */
|
||||
uint8_t *rxData; /*!< Receive buffer */
|
||||
size_t txDataSize; /*!< Transfer bytes for transmit */
|
||||
size_t rxDataSize; /*!< Transfer bytes */
|
||||
uint32_t configFlags; /*!< Transfer configuration flags, @ref spi_xfer_option_t. */
|
||||
bool isPcsAssertInTransfer; /*!< If PCS pin keep assert between transmit and receive. true for assert and false for
|
||||
deassert. */
|
||||
bool isTransmitFirst; /*!< True for transmit first and false for receive first. */
|
||||
} spi_half_duplex_transfer_t;
|
||||
|
||||
/*! @brief Internal configuration structure used in 'spi' and 'spi_dma' driver */
|
||||
typedef struct _spi_config
|
||||
{
|
||||
spi_data_width_t dataWidth;
|
||||
spi_ssel_t sselNum;
|
||||
} spi_config_t;
|
||||
|
||||
/*! @brief Master handle type */
|
||||
typedef struct _spi_master_handle spi_master_handle_t;
|
||||
|
||||
/*! @brief Slave handle type */
|
||||
typedef spi_master_handle_t spi_slave_handle_t;
|
||||
|
||||
/*! @brief SPI master callback for finished transmit */
|
||||
typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData);
|
||||
|
||||
/*! @brief SPI slave callback for finished transmit */
|
||||
typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData);
|
||||
|
||||
/*! @brief SPI transfer handle structure */
|
||||
struct _spi_master_handle
|
||||
{
|
||||
uint8_t *volatile txData; /*!< Transfer buffer */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer */
|
||||
volatile size_t txRemainingBytes; /*!< Number of data to be transmitted [in bytes] */
|
||||
volatile size_t rxRemainingBytes; /*!< Number of data to be received [in bytes] */
|
||||
volatile int8_t toReceiveCount; /*!< The number of data expected to receive in data width. Since the received count
|
||||
and sent count should be the same to complete the transfer, if the sent count is
|
||||
x and the received count is y, toReceiveCount is x-y. */
|
||||
size_t totalByteCount; /*!< A number of transfer bytes */
|
||||
volatile uint32_t state; /*!< SPI internal state */
|
||||
spi_master_callback_t callback; /*!< SPI callback */
|
||||
void *userData; /*!< Callback parameter */
|
||||
uint8_t dataWidth; /*!< Width of the data [Valid values: 1 to 16] */
|
||||
uint8_t sselNum; /*!< Slave select number to be asserted when transferring data [Valid values: 0 to 3] */
|
||||
uint32_t configFlags; /*!< Additional option to control transfer */
|
||||
uint8_t txWatermark; /*!< txFIFO watermark */
|
||||
uint8_t rxWatermark; /*!< rxFIFO watermark */
|
||||
};
|
||||
|
||||
/*! @brief Typedef for master interrupt handler. */
|
||||
typedef void (*flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle);
|
||||
|
||||
/*! @brief Typedef for slave interrupt handler. */
|
||||
typedef void (*flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle);
|
||||
/*! @} */
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*! @brief Returns instance number for SPI peripheral base address. */
|
||||
uint32_t SPI_GetInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
* @name Initialization and deinitialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Sets the SPI master configuration structure to default values.
|
||||
*
|
||||
* The purpose of this API is to get the configuration structure initialized for use in SPI_MasterInit().
|
||||
* User may use the initialized structure unchanged in SPI_MasterInit(), or modify
|
||||
* some fields of the structure before calling SPI_MasterInit(). After calling this API,
|
||||
* the master is ready to transfer.
|
||||
* Example:
|
||||
@code
|
||||
spi_master_config_t config;
|
||||
SPI_MasterGetDefaultConfig(&config);
|
||||
@endcode
|
||||
*
|
||||
* @param config pointer to master config structure
|
||||
*/
|
||||
void SPI_MasterGetDefaultConfig(spi_master_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Initializes the SPI with master configuration.
|
||||
*
|
||||
* The configuration structure can be filled by user from scratch, or be set with default
|
||||
* values by SPI_MasterGetDefaultConfig(). After calling this API, the slave is ready to transfer.
|
||||
* Example
|
||||
@code
|
||||
spi_master_config_t config = {
|
||||
.baudRate_Bps = 400000,
|
||||
...
|
||||
};
|
||||
SPI_MasterInit(SPI0, &config);
|
||||
@endcode
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param config pointer to master configuration structure
|
||||
* @param srcClock_Hz Source clock frequency.
|
||||
*/
|
||||
status_t SPI_MasterInit(SPI_Type *base, const spi_master_config_t *config, uint32_t srcClock_Hz);
|
||||
|
||||
/*!
|
||||
* @brief Sets the SPI slave configuration structure to default values.
|
||||
*
|
||||
* The purpose of this API is to get the configuration structure initialized for use in SPI_SlaveInit().
|
||||
* Modify some fields of the structure before calling SPI_SlaveInit().
|
||||
* Example:
|
||||
@code
|
||||
spi_slave_config_t config;
|
||||
SPI_SlaveGetDefaultConfig(&config);
|
||||
@endcode
|
||||
*
|
||||
* @param config pointer to slave configuration structure
|
||||
*/
|
||||
void SPI_SlaveGetDefaultConfig(spi_slave_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Initializes the SPI with slave configuration.
|
||||
*
|
||||
* The configuration structure can be filled by user from scratch or be set with
|
||||
* default values by SPI_SlaveGetDefaultConfig().
|
||||
* After calling this API, the slave is ready to transfer.
|
||||
* Example
|
||||
@code
|
||||
spi_slave_config_t config = {
|
||||
.polarity = flexSPIClockPolarity_ActiveHigh;
|
||||
.phase = flexSPIClockPhase_FirstEdge;
|
||||
.direction = flexSPIMsbFirst;
|
||||
...
|
||||
};
|
||||
SPI_SlaveInit(SPI0, &config);
|
||||
@endcode
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param config pointer to slave configuration structure
|
||||
*/
|
||||
status_t SPI_SlaveInit(SPI_Type *base, const spi_slave_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief De-initializes the SPI.
|
||||
*
|
||||
* Calling this API resets the SPI module, gates the SPI clock.
|
||||
* The SPI module can't work unless calling the SPI_MasterInit/SPI_SlaveInit to initialize module.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
*/
|
||||
void SPI_Deinit(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Enable or disable the SPI Master or Slave
|
||||
* @param base SPI base pointer
|
||||
* @param enable or disable ( true = enable, false = disable)
|
||||
*/
|
||||
static inline void SPI_Enable(SPI_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->CFG |= SPI_CFG_ENABLE_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->CFG &= ~SPI_CFG_ENABLE_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*! @} */
|
||||
|
||||
/*!
|
||||
* @name Status
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Gets the status flag.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @return SPI Status, use status flag to AND @ref _spi_statusflags could get the related status.
|
||||
*/
|
||||
static inline uint32_t SPI_GetStatusFlags(SPI_Type *base)
|
||||
{
|
||||
assert(NULL != base);
|
||||
return base->FIFOSTAT;
|
||||
}
|
||||
|
||||
/*! @} */
|
||||
|
||||
/*!
|
||||
* @name Interrupts
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enables the interrupt for the SPI.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param irqs SPI interrupt source. The parameter can be any combination of the following values:
|
||||
* @arg kSPI_RxLvlIrq
|
||||
* @arg kSPI_TxLvlIrq
|
||||
*/
|
||||
static inline void SPI_EnableInterrupts(SPI_Type *base, uint32_t irqs)
|
||||
{
|
||||
assert(NULL != base);
|
||||
base->FIFOINTENSET = irqs;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disables the interrupt for the SPI.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param irqs SPI interrupt source. The parameter can be any combination of the following values:
|
||||
* @arg kSPI_RxLvlIrq
|
||||
* @arg kSPI_TxLvlIrq
|
||||
*/
|
||||
static inline void SPI_DisableInterrupts(SPI_Type *base, uint32_t irqs)
|
||||
{
|
||||
assert(NULL != base);
|
||||
base->FIFOINTENCLR = irqs;
|
||||
}
|
||||
|
||||
/*! @} */
|
||||
|
||||
/*!
|
||||
* @name DMA Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enables the DMA request from SPI txFIFO.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param enable True means enable DMA, false means disable DMA
|
||||
*/
|
||||
void SPI_EnableTxDMA(SPI_Type *base, bool enable);
|
||||
|
||||
/*!
|
||||
* @brief Enables the DMA request from SPI rxFIFO.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param enable True means enable DMA, false means disable DMA
|
||||
*/
|
||||
void SPI_EnableRxDMA(SPI_Type *base, bool enable);
|
||||
|
||||
/*! @} */
|
||||
|
||||
/*!
|
||||
* @name Bus Operations
|
||||
* @{
|
||||
*/
|
||||
/*!
|
||||
* @brief Returns the configurations.
|
||||
*
|
||||
* @param base SPI peripheral address.
|
||||
* @return return configurations which contain datawidth and SSEL numbers.
|
||||
* return data type is a pointer of spi_config_t.
|
||||
*/
|
||||
void *SPI_GetConfig(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Sets the baud rate for SPI transfer. This is only used in master.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param baudrate_Bps baud rate needed in Hz.
|
||||
* @param srcClock_Hz SPI source clock frequency in Hz.
|
||||
*/
|
||||
status_t SPI_MasterSetBaud(SPI_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz);
|
||||
|
||||
/*!
|
||||
* @brief Writes a data into the SPI data register.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param data needs to be write.
|
||||
* @param configFlags transfer configuration options @ref spi_xfer_option_t
|
||||
*/
|
||||
void SPI_WriteData(SPI_Type *base, uint16_t data, uint32_t configFlags);
|
||||
|
||||
/*!
|
||||
* @brief Gets a data from the SPI data register.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @return Data in the register.
|
||||
*/
|
||||
static inline uint32_t SPI_ReadData(SPI_Type *base)
|
||||
{
|
||||
assert(NULL != base);
|
||||
return base->FIFORD;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set delay time for transfer.
|
||||
* the delay uint is SPI clock time, maximum value is 0xF.
|
||||
* @param base SPI base pointer
|
||||
* @param config configuration for delay option @ref spi_delay_config_t.
|
||||
*/
|
||||
static inline void SPI_SetTransferDelay(SPI_Type *base, const spi_delay_config_t *config)
|
||||
{
|
||||
assert(NULL != base);
|
||||
assert(NULL != config);
|
||||
base->DLY = (SPI_DLY_PRE_DELAY(config->preDelay) | SPI_DLY_POST_DELAY(config->postDelay) |
|
||||
SPI_DLY_FRAME_DELAY(config->frameDelay) | SPI_DLY_TRANSFER_DELAY(config->transferDelay));
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set up the dummy data.
|
||||
*
|
||||
* @param base SPI peripheral address.
|
||||
* @param dummyData Data to be transferred when tx buffer is NULL.
|
||||
*/
|
||||
void SPI_SetDummyData(SPI_Type *base, uint8_t dummyData);
|
||||
|
||||
/*! @} */
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Initializes the SPI master handle.
|
||||
*
|
||||
* This function initializes the SPI master handle which can be used for other SPI master transactional APIs. Usually,
|
||||
* for a specified SPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle SPI handle pointer.
|
||||
* @param callback Callback function.
|
||||
* @param userData User data.
|
||||
*/
|
||||
status_t SPI_MasterTransferCreateHandle(SPI_Type *base,
|
||||
spi_master_handle_t *handle,
|
||||
spi_master_callback_t callback,
|
||||
void *userData);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a polling method.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param xfer pointer to spi_xfer_config_t structure
|
||||
* @retval kStatus_Success Successfully start a transfer.
|
||||
* @retval kStatus_InvalidArgument Input argument is invalid.
|
||||
* @retval kStatus_SPI_Timeout The transfer timed out and was aborted.
|
||||
*/
|
||||
status_t SPI_MasterTransferBlocking(SPI_Type *base, spi_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking SPI interrupt transfer.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle pointer to spi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to spi_xfer_config_t structure
|
||||
* @retval kStatus_Success Successfully start a transfer.
|
||||
* @retval kStatus_InvalidArgument Input argument is invalid.
|
||||
* @retval kStatus_SPI_Busy SPI is not idle, is running another transfer.
|
||||
*/
|
||||
status_t SPI_MasterTransferNonBlocking(SPI_Type *base, spi_master_handle_t *handle, spi_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a polling method.
|
||||
*
|
||||
* This function will do a half-duplex transfer for SPI master, This is a blocking function,
|
||||
* which does not retuen until all transfer have been completed. And data transfer mechanism is half-duplex,
|
||||
* users can set transmit first or receive first.
|
||||
*
|
||||
* @param base SPI base pointer
|
||||
* @param xfer pointer to spi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t SPI_MasterHalfDuplexTransferBlocking(SPI_Type *base, spi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking SPI interrupt transfer.
|
||||
*
|
||||
* This function using polling way to do the first half transimission and using interrupts to
|
||||
* do the second half transimission, the transfer mechanism is half-duplex.
|
||||
* When do the second half transimission, code will return right away. When all data is transferred,
|
||||
* the callback function is called.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle pointer to spi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to spi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t SPI_MasterHalfDuplexTransferNonBlocking(SPI_Type *base,
|
||||
spi_master_handle_t *handle,
|
||||
spi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master transfer count.
|
||||
*
|
||||
* This function gets the master transfer count.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle Pointer to the spi_master_handle_t structure which stores the transfer state.
|
||||
* @param count The number of bytes transferred by using the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t SPI_MasterTransferGetCount(SPI_Type *base, spi_master_handle_t *handle, size_t *count);
|
||||
|
||||
/*!
|
||||
* @brief SPI master aborts a transfer using an interrupt.
|
||||
*
|
||||
* This function aborts a transfer using an interrupt.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle Pointer to the spi_master_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void SPI_MasterTransferAbort(SPI_Type *base, spi_master_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Interrupts the handler for the SPI.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle pointer to spi_master_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void SPI_MasterTransferHandleIRQ(SPI_Type *base, spi_master_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Initializes the SPI slave handle.
|
||||
*
|
||||
* This function initializes the SPI slave handle which can be used for other SPI slave transactional APIs. Usually,
|
||||
* for a specified SPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle SPI handle pointer.
|
||||
* @param callback Callback function.
|
||||
* @param userData User data.
|
||||
*/
|
||||
static inline status_t SPI_SlaveTransferCreateHandle(SPI_Type *base,
|
||||
spi_slave_handle_t *handle,
|
||||
spi_slave_callback_t callback,
|
||||
void *userData)
|
||||
{
|
||||
return SPI_MasterTransferCreateHandle(base, handle, callback, userData);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking SPI slave interrupt transfer.
|
||||
*
|
||||
* @note The API returns immediately after the transfer initialization is finished.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle pointer to spi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to spi_xfer_config_t structure
|
||||
* @retval kStatus_Success Successfully start a transfer.
|
||||
* @retval kStatus_InvalidArgument Input argument is invalid.
|
||||
* @retval kStatus_SPI_Busy SPI is not idle, is running another transfer.
|
||||
*/
|
||||
static inline status_t SPI_SlaveTransferNonBlocking(SPI_Type *base, spi_slave_handle_t *handle, spi_transfer_t *xfer)
|
||||
{
|
||||
return SPI_MasterTransferNonBlocking(base, handle, xfer);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Gets the slave transfer count.
|
||||
*
|
||||
* This function gets the slave transfer count.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle Pointer to the spi_master_handle_t structure which stores the transfer state.
|
||||
* @param count The number of bytes transferred by using the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
static inline status_t SPI_SlaveTransferGetCount(SPI_Type *base, spi_slave_handle_t *handle, size_t *count)
|
||||
{
|
||||
return SPI_MasterTransferGetCount(base, (spi_master_handle_t *)handle, count);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief SPI slave aborts a transfer using an interrupt.
|
||||
*
|
||||
* This function aborts a transfer using an interrupt.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle Pointer to the spi_slave_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
static inline void SPI_SlaveTransferAbort(SPI_Type *base, spi_slave_handle_t *handle)
|
||||
{
|
||||
SPI_MasterTransferAbort(base, (spi_master_handle_t *)handle);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Interrupts a handler for the SPI slave.
|
||||
*
|
||||
* @param base SPI peripheral base address.
|
||||
* @param handle pointer to spi_slave_handle_t structure which stores the transfer state
|
||||
*/
|
||||
static inline void SPI_SlaveTransferHandleIRQ(SPI_Type *base, spi_slave_handle_t *handle)
|
||||
{
|
||||
SPI_MasterTransferHandleIRQ(base, handle);
|
||||
}
|
||||
|
||||
/*! @} */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @} */
|
||||
|
||||
#endif /* _FSL_SPI_H_*/
|
||||
1160
drivers/fsl_usart.c
Normal file
1160
drivers/fsl_usart.c
Normal file
File diff suppressed because it is too large
Load Diff
811
drivers/fsl_usart.h
Normal file
811
drivers/fsl_usart.h
Normal file
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_USART_H_
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#define _FSL_USART_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup usart_driver
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief USART driver version. */
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#define FSL_USART_DRIVER_VERSION (MAKE_VERSION(2, 4, 0))
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/*@}*/
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#define USART_FIFOTRIG_TXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_TXLVL_MASK) >> USART_FIFOTRIG_TXLVL_SHIFT)
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#define USART_FIFOTRIG_RXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_RXLVL_MASK) >> USART_FIFOTRIG_RXLVL_SHIFT)
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/*! @brief Retry times for waiting flag. */
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#ifndef UART_RETRY_TIMES
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#define UART_RETRY_TIMES 0U /* Defining to zero means to keep waiting for the flag until it is assert/deassert. */
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#endif
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||||
/*! @brief Error codes for the USART driver. */
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enum
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{
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kStatus_USART_TxBusy = MAKE_STATUS(kStatusGroup_LPC_USART, 0), /*!< Transmitter is busy. */
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kStatus_USART_RxBusy = MAKE_STATUS(kStatusGroup_LPC_USART, 1), /*!< Receiver is busy. */
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||||
kStatus_USART_TxIdle = MAKE_STATUS(kStatusGroup_LPC_USART, 2), /*!< USART transmitter is idle. */
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||||
kStatus_USART_RxIdle = MAKE_STATUS(kStatusGroup_LPC_USART, 3), /*!< USART receiver is idle. */
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||||
kStatus_USART_TxError = MAKE_STATUS(kStatusGroup_LPC_USART, 7), /*!< Error happens on txFIFO. */
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||||
kStatus_USART_RxError = MAKE_STATUS(kStatusGroup_LPC_USART, 9), /*!< Error happens on rxFIFO. */
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kStatus_USART_RxRingBufferOverrun = MAKE_STATUS(kStatusGroup_LPC_USART, 8), /*!< Error happens on rx ring buffer */
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kStatus_USART_NoiseError = MAKE_STATUS(kStatusGroup_LPC_USART, 10), /*!< USART noise error. */
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kStatus_USART_FramingError = MAKE_STATUS(kStatusGroup_LPC_USART, 11), /*!< USART framing error. */
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kStatus_USART_ParityError = MAKE_STATUS(kStatusGroup_LPC_USART, 12), /*!< USART parity error. */
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kStatus_USART_BaudrateNotSupport =
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MAKE_STATUS(kStatusGroup_LPC_USART, 13), /*!< Baudrate is not support in current clock source */
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kStatus_USART_Timeout = MAKE_STATUS(kStatusGroup_LPC_USART, 14), /*!< USART time out. */
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};
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/*! @brief USART synchronous mode. */
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typedef enum _usart_sync_mode
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{
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kUSART_SyncModeDisabled = 0x0U, /*!< Asynchronous mode. */
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kUSART_SyncModeSlave = 0x2U, /*!< Synchronous slave mode. */
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kUSART_SyncModeMaster = 0x3U, /*!< Synchronous master mode. */
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} usart_sync_mode_t;
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/*! @brief USART parity mode. */
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typedef enum _usart_parity_mode
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{
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kUSART_ParityDisabled = 0x0U, /*!< Parity disabled */
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kUSART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
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kUSART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */
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} usart_parity_mode_t;
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/*! @brief USART stop bit count. */
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typedef enum _usart_stop_bit_count
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{
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kUSART_OneStopBit = 0U, /*!< One stop bit */
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kUSART_TwoStopBit = 1U, /*!< Two stop bits */
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} usart_stop_bit_count_t;
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/*! @brief USART data size. */
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typedef enum _usart_data_len
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{
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kUSART_7BitsPerChar = 0U, /*!< Seven bit mode */
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kUSART_8BitsPerChar = 1U, /*!< Eight bit mode */
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} usart_data_len_t;
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/*! @brief USART clock polarity configuration, used in sync mode.*/
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typedef enum _usart_clock_polarity
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{
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kUSART_RxSampleOnFallingEdge = 0x0U, /*!< Un_RXD is sampled on the falling edge of SCLK. */
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kUSART_RxSampleOnRisingEdge = 0x1U, /*!< Un_RXD is sampled on the rising edge of SCLK. */
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} usart_clock_polarity_t;
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/*! @brief txFIFO watermark values */
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typedef enum _usart_txfifo_watermark
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{
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kUSART_TxFifo0 = 0, /*!< USART tx watermark is empty */
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kUSART_TxFifo1 = 1, /*!< USART tx watermark at 1 item */
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kUSART_TxFifo2 = 2, /*!< USART tx watermark at 2 items */
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kUSART_TxFifo3 = 3, /*!< USART tx watermark at 3 items */
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kUSART_TxFifo4 = 4, /*!< USART tx watermark at 4 items */
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kUSART_TxFifo5 = 5, /*!< USART tx watermark at 5 items */
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kUSART_TxFifo6 = 6, /*!< USART tx watermark at 6 items */
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kUSART_TxFifo7 = 7, /*!< USART tx watermark at 7 items */
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} usart_txfifo_watermark_t;
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/*! @brief rxFIFO watermark values */
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typedef enum _usart_rxfifo_watermark
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{
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kUSART_RxFifo1 = 0, /*!< USART rx watermark at 1 item */
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kUSART_RxFifo2 = 1, /*!< USART rx watermark at 2 items */
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kUSART_RxFifo3 = 2, /*!< USART rx watermark at 3 items */
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kUSART_RxFifo4 = 3, /*!< USART rx watermark at 4 items */
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kUSART_RxFifo5 = 4, /*!< USART rx watermark at 5 items */
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kUSART_RxFifo6 = 5, /*!< USART rx watermark at 6 items */
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kUSART_RxFifo7 = 6, /*!< USART rx watermark at 7 items */
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kUSART_RxFifo8 = 7, /*!< USART rx watermark at 8 items */
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} usart_rxfifo_watermark_t;
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/*!
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* @brief USART interrupt configuration structure, default settings all disabled.
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*/
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enum _usart_interrupt_enable
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{
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kUSART_TxErrorInterruptEnable = (USART_FIFOINTENSET_TXERR_MASK),
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kUSART_RxErrorInterruptEnable = (USART_FIFOINTENSET_RXERR_MASK),
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kUSART_TxLevelInterruptEnable = (USART_FIFOINTENSET_TXLVL_MASK),
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kUSART_RxLevelInterruptEnable = (USART_FIFOINTENSET_RXLVL_MASK),
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};
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/*!
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* @brief USART status flags.
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*
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* This provides constants for the USART status flags for use in the USART functions.
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*/
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enum _usart_flags
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{
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kUSART_TxError = (USART_FIFOSTAT_TXERR_MASK), /*!< TEERR bit, sets if TX buffer is error */
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kUSART_RxError = (USART_FIFOSTAT_RXERR_MASK), /*!< RXERR bit, sets if RX buffer is error */
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kUSART_TxFifoEmptyFlag = (USART_FIFOSTAT_TXEMPTY_MASK), /*!< TXEMPTY bit, sets if TX buffer is empty */
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kUSART_TxFifoNotFullFlag = (USART_FIFOSTAT_TXNOTFULL_MASK), /*!< TXNOTFULL bit, sets if TX buffer is not full */
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kUSART_RxFifoNotEmptyFlag = (USART_FIFOSTAT_RXNOTEMPTY_MASK), /*!< RXNOEMPTY bit, sets if RX buffer is not empty */
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kUSART_RxFifoFullFlag = (USART_FIFOSTAT_RXFULL_MASK), /*!< RXFULL bit, sets if RX buffer is full */
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};
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/*! @brief USART configuration structure. */
|
||||
typedef struct _usart_config
|
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{
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uint32_t baudRate_Bps; /*!< USART baud rate */
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usart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
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usart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
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usart_data_len_t bitCountPerChar; /*!< Data length - 7 bit, 8 bit */
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bool loopback; /*!< Enable peripheral loopback */
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bool enableRx; /*!< Enable RX */
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bool enableTx; /*!< Enable TX */
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bool enableContinuousSCLK; /*!< USART continuous Clock generation enable in synchronous master mode. */
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bool enableMode32k; /*!< USART uses 32 kHz clock from the RTC oscillator as the clock source. */
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bool enableHardwareFlowControl; /*!< Enable hardware control RTS/CTS */
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usart_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */
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usart_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */
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usart_sync_mode_t syncMode; /*!< Transfer mode select - asynchronous, synchronous master, synchronous slave. */
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usart_clock_polarity_t clockPolarity; /*!< Selects the clock polarity and sampling edge in synchronous mode. */
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} usart_config_t;
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/*! @brief USART transfer structure. */
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typedef struct _usart_transfer
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{
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uint8_t *data; /*!< The buffer of data to be transfer.*/
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size_t dataSize; /*!< The byte count to be transfer. */
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} usart_transfer_t;
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/* Forward declaration of the handle typedef. */
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typedef struct _usart_handle usart_handle_t;
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/*! @brief USART transfer callback function. */
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typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData);
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/*! @brief USART handle structure. */
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struct _usart_handle
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{
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uint8_t *volatile txData; /*!< Address of remaining data to send. */
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volatile size_t txDataSize; /*!< Size of the remaining data to send. */
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size_t txDataSizeAll; /*!< Size of the data to send out. */
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uint8_t *volatile rxData; /*!< Address of remaining data to receive. */
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volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */
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size_t rxDataSizeAll; /*!< Size of the data to receive. */
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uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */
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size_t rxRingBufferSize; /*!< Size of the ring buffer. */
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volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */
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volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */
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usart_transfer_callback_t callback; /*!< Callback function. */
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void *userData; /*!< USART callback function parameter.*/
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volatile uint8_t txState; /*!< TX transfer state. */
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volatile uint8_t rxState; /*!< RX transfer state */
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uint8_t txWatermark; /*!< txFIFO watermark */
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uint8_t rxWatermark; /*!< rxFIFO watermark */
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};
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/*! @brief Typedef for usart interrupt handler. */
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typedef void (*flexcomm_usart_irq_handler_t)(USART_Type *base, usart_handle_t *handle);
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* _cplusplus */
|
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/*! @brief Returns instance number for USART peripheral base address. */
|
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uint32_t USART_GetInstance(USART_Type *base);
|
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/*!
|
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* @name Initialization and deinitialization
|
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* @{
|
||||
*/
|
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/*!
|
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* @brief Initializes a USART instance with user configuration structure and peripheral clock.
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*
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* This function configures the USART module with the user-defined settings. The user can configure the configuration
|
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* structure and also get the default configuration by using the USART_GetDefaultConfig() function.
|
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* Example below shows how to use this API to configure USART.
|
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* @code
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* usart_config_t usartConfig;
|
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* usartConfig.baudRate_Bps = 115200U;
|
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* usartConfig.parityMode = kUSART_ParityDisabled;
|
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* usartConfig.stopBitCount = kUSART_OneStopBit;
|
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* USART_Init(USART1, &usartConfig, 20000000U);
|
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* @endcode
|
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*
|
||||
* @param base USART peripheral base address.
|
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* @param config Pointer to user-defined configuration structure.
|
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* @param srcClock_Hz USART clock source frequency in HZ.
|
||||
* @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
|
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* @retval kStatus_InvalidArgument USART base address is not valid
|
||||
* @retval kStatus_Success Status USART initialize succeed
|
||||
*/
|
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status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz);
|
||||
|
||||
/*!
|
||||
* @brief Deinitializes a USART instance.
|
||||
*
|
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* This function waits for TX complete, disables TX and RX, and disables the USART clock.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
*/
|
||||
void USART_Deinit(USART_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Gets the default configuration structure.
|
||||
*
|
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* This function initializes the USART configuration structure to a default value. The default
|
||||
* values are:
|
||||
* usartConfig->baudRate_Bps = 115200U;
|
||||
* usartConfig->parityMode = kUSART_ParityDisabled;
|
||||
* usartConfig->stopBitCount = kUSART_OneStopBit;
|
||||
* usartConfig->bitCountPerChar = kUSART_8BitsPerChar;
|
||||
* usartConfig->loopback = false;
|
||||
* usartConfig->enableTx = false;
|
||||
* usartConfig->enableRx = false;
|
||||
*
|
||||
* @param config Pointer to configuration structure.
|
||||
*/
|
||||
void USART_GetDefaultConfig(usart_config_t *config);
|
||||
|
||||
/*!
|
||||
* @brief Sets the USART instance baud rate.
|
||||
*
|
||||
* This function configures the USART module baud rate. This function is used to update
|
||||
* the USART module baud rate after the USART module is initialized by the USART_Init.
|
||||
* @code
|
||||
* USART_SetBaudRate(USART1, 115200U, 20000000U);
|
||||
* @endcode
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param baudrate_Bps USART baudrate to be set.
|
||||
* @param srcClock_Hz USART clock source frequency in HZ.
|
||||
* @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
|
||||
* @retval kStatus_Success Set baudrate succeed.
|
||||
* @retval kStatus_InvalidArgument One or more arguments are invalid.
|
||||
*/
|
||||
status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz);
|
||||
|
||||
/*!
|
||||
* @brief Enable 32 kHz mode which USART uses clock from the RTC oscillator as the clock source
|
||||
*
|
||||
* Please note that in order to use a 32 kHz clock to operate USART properly, the RTC oscillator
|
||||
* and its 32 kHz output must be manully enabled by user, by calling RTC_Init and setting
|
||||
* SYSCON_RTCOSCCTRL_EN bit to 1.
|
||||
* And in 32kHz clocking mode the USART can only work at 9600 baudrate or at the baudrate that
|
||||
* 9600 can evenly divide, eg: 4800, 3200.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param baudRate_Bps USART baudrate to be set..
|
||||
* @param enableMode32k true is 32k mode, false is normal mode.
|
||||
* @param srcClock_Hz USART clock source frequency in HZ.
|
||||
* @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
|
||||
* @retval kStatus_Success Set baudrate succeed.
|
||||
* @retval kStatus_InvalidArgument One or more arguments are invalid.
|
||||
*/
|
||||
status_t USART_Enable32kMode(USART_Type *base, uint32_t baudRate_Bps, bool enableMode32k, uint32_t srcClock_Hz);
|
||||
|
||||
/*!
|
||||
* @brief Enable 9-bit data mode for USART.
|
||||
*
|
||||
* This function set the 9-bit mode for USART module. The 9th bit is not used for parity thus can be modified by user.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param enable true to enable, false to disable.
|
||||
*/
|
||||
void USART_Enable9bitMode(USART_Type *base, bool enable);
|
||||
|
||||
/*!
|
||||
* @brief Set the USART slave address.
|
||||
*
|
||||
* This function configures the address for USART module that works as slave in 9-bit data mode. When the address
|
||||
* detection is enabled, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is
|
||||
* considered as data frame. Once the address frame matches slave's own addresses, this slave is addressed. This
|
||||
* address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded.
|
||||
* To un-address a slave, just send an address frame with unmatched address.
|
||||
*
|
||||
* @note Any USART instance joined in the multi-slave system can work as slave. The position of the address mark is the
|
||||
* same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param address USART slave address.
|
||||
*/
|
||||
static inline void USART_SetMatchAddress(USART_Type *base, uint8_t address)
|
||||
{
|
||||
/* Configure match address. */
|
||||
base->ADDR = (uint32_t)address;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable the USART match address feature.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param match true to enable match address, false to disable.
|
||||
*/
|
||||
static inline void USART_EnableMatchAddress(USART_Type *base, bool match)
|
||||
{
|
||||
/* Configure match address enable bit. */
|
||||
if (match)
|
||||
{
|
||||
base->CFG |= (uint32_t)USART_CFG_AUTOADDR_MASK;
|
||||
base->CTL |= (uint32_t)USART_CTL_ADDRDET_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->CFG &= ~(uint32_t)USART_CFG_AUTOADDR_MASK;
|
||||
base->CTL &= ~(uint32_t)USART_CTL_ADDRDET_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Status
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Get USART status flags.
|
||||
*
|
||||
* This function get all USART status flags, the flags are returned as the logical
|
||||
* OR value of the enumerators @ref _usart_flags. To check a specific status,
|
||||
* compare the return value with enumerators in @ref _usart_flags.
|
||||
* For example, to check whether the TX is empty:
|
||||
* @code
|
||||
* if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1))
|
||||
* {
|
||||
* ...
|
||||
* }
|
||||
* @endcode
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @return USART status flags which are ORed by the enumerators in the _usart_flags.
|
||||
*/
|
||||
static inline uint32_t USART_GetStatusFlags(USART_Type *base)
|
||||
{
|
||||
return base->FIFOSTAT;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Clear USART status flags.
|
||||
*
|
||||
* This function clear supported USART status flags
|
||||
* Flags that can be cleared or set are:
|
||||
* kUSART_TxError
|
||||
* kUSART_RxError
|
||||
* For example:
|
||||
* @code
|
||||
* USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError)
|
||||
* @endcode
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param mask status flags to be cleared.
|
||||
*/
|
||||
static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)
|
||||
{
|
||||
/* Only TXERR, RXERR fields support write. Remaining fields should be set to zero */
|
||||
base->FIFOSTAT = mask & (USART_FIFOSTAT_TXERR_MASK | USART_FIFOSTAT_RXERR_MASK);
|
||||
}
|
||||
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Interrupts
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Enables USART interrupts according to the provided mask.
|
||||
*
|
||||
* This function enables the USART interrupts according to the provided mask. The mask
|
||||
* is a logical OR of enumeration members. See @ref _usart_interrupt_enable.
|
||||
* For example, to enable TX empty interrupt and RX full interrupt:
|
||||
* @code
|
||||
* USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);
|
||||
* @endcode
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param mask The interrupts to enable. Logical OR of @ref _usart_interrupt_enable.
|
||||
*/
|
||||
static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)
|
||||
{
|
||||
base->FIFOINTENSET = mask & 0xFUL;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Disables USART interrupts according to a provided mask.
|
||||
*
|
||||
* This function disables the USART interrupts according to a provided mask. The mask
|
||||
* is a logical OR of enumeration members. See @ref _usart_interrupt_enable.
|
||||
* This example shows how to disable the TX empty interrupt and RX full interrupt:
|
||||
* @code
|
||||
* USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);
|
||||
* @endcode
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param mask The interrupts to disable. Logical OR of @ref _usart_interrupt_enable.
|
||||
*/
|
||||
static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)
|
||||
{
|
||||
base->FIFOINTENCLR = mask & 0xFUL;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Returns enabled USART interrupts.
|
||||
*
|
||||
* This function returns the enabled USART interrupts.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
*/
|
||||
static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)
|
||||
{
|
||||
return base->FIFOINTENSET;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable DMA for Tx
|
||||
*/
|
||||
static inline void USART_EnableTxDMA(USART_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->FIFOCFG |= USART_FIFOCFG_DMATX_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->FIFOCFG &= ~(USART_FIFOCFG_DMATX_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable DMA for Rx
|
||||
*/
|
||||
static inline void USART_EnableRxDMA(USART_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->FIFOCFG |= USART_FIFOCFG_DMARX_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->FIFOCFG &= ~(USART_FIFOCFG_DMARX_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable CTS.
|
||||
* This function will determine whether CTS is used for flow control.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param enable Enable CTS or not, true for enable and false for disable.
|
||||
*/
|
||||
static inline void USART_EnableCTS(USART_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->CFG |= USART_CFG_CTSEN_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->CFG &= ~USART_CFG_CTSEN_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Continuous Clock generation.
|
||||
* By default, SCLK is only output while data is being transmitted in synchronous mode.
|
||||
* Enable this funciton, SCLK will run continuously in synchronous mode, allowing
|
||||
* characters to be received on Un_RxD independently from transmission on Un_TXD).
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param enable Enable Continuous Clock generation mode or not, true for enable and false for disable.
|
||||
*/
|
||||
static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->CTL |= USART_CTL_CC_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->CTL &= ~USART_CTL_CC_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Enable Continuous Clock generation bit auto clear.
|
||||
* While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete
|
||||
* character has been received. This bit is cleared at the same time.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param enable Enable auto clear or not, true for enable and false for disable.
|
||||
*/
|
||||
static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
base->CTL |= USART_CTL_CLRCCONRX_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
base->CTL &= ~USART_CTL_CLRCCONRX_MASK;
|
||||
}
|
||||
}
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Bus Operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Writes to the FIFOWR register.
|
||||
*
|
||||
* This function writes data to the txFIFO directly. The upper layer must ensure
|
||||
* that txFIFO has space for data to write before calling this function.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param data The byte to write.
|
||||
*/
|
||||
static inline void USART_WriteByte(USART_Type *base, uint8_t data)
|
||||
{
|
||||
base->FIFOWR = data;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Reads the FIFORD register directly.
|
||||
*
|
||||
* This function reads data from the rxFIFO directly. The upper layer must
|
||||
* ensure that the rxFIFO is not empty before calling this function.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @return The byte read from USART data register.
|
||||
*/
|
||||
static inline uint8_t USART_ReadByte(USART_Type *base)
|
||||
{
|
||||
return (uint8_t)base->FIFORD;
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Transmit an address frame in 9-bit data mode.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param address USART slave address.
|
||||
*/
|
||||
void USART_SendAddress(USART_Type *base, uint8_t address);
|
||||
|
||||
/*!
|
||||
* @brief Writes to the TX register using a blocking method.
|
||||
*
|
||||
* This function polls the TX register, waits for the TX register to be empty or for the TX FIFO
|
||||
* to have room and writes data to the TX buffer.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param data Start address of the data to write.
|
||||
* @param length Size of the data to write.
|
||||
* @retval kStatus_USART_Timeout Transmission timed out and was aborted.
|
||||
* @retval kStatus_InvalidArgument Invalid argument.
|
||||
* @retval kStatus_Success Successfully wrote all data.
|
||||
*/
|
||||
status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length);
|
||||
|
||||
/*!
|
||||
* @brief Read RX data register using a blocking method.
|
||||
*
|
||||
* This function polls the RX register, waits for the RX register to be full or for RX FIFO to
|
||||
* have data and read data from the TX register.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param data Start address of the buffer to store the received data.
|
||||
* @param length Size of the buffer.
|
||||
* @retval kStatus_USART_FramingError Receiver overrun happened while receiving data.
|
||||
* @retval kStatus_USART_ParityError Noise error happened while receiving data.
|
||||
* @retval kStatus_USART_NoiseError Framing error happened while receiving data.
|
||||
* @retval kStatus_USART_RxError Overflow or underflow rxFIFO happened.
|
||||
* @retval kStatus_USART_Timeout Transmission timed out and was aborted.
|
||||
* @retval kStatus_Success Successfully received all data.
|
||||
*/
|
||||
status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length);
|
||||
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Initializes the USART handle.
|
||||
*
|
||||
* This function initializes the USART handle which can be used for other USART
|
||||
* transactional APIs. Usually, for a specified USART instance,
|
||||
* call this API once to get the initialized handle.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
* @param callback The callback function.
|
||||
* @param userData The parameter of the callback function.
|
||||
*/
|
||||
status_t USART_TransferCreateHandle(USART_Type *base,
|
||||
usart_handle_t *handle,
|
||||
usart_transfer_callback_t callback,
|
||||
void *userData);
|
||||
|
||||
/*!
|
||||
* @brief Transmits a buffer of data using the interrupt method.
|
||||
*
|
||||
* This function sends data using an interrupt method. This is a non-blocking function, which
|
||||
* returns directly without waiting for all data to be written to the TX register. When
|
||||
* all data is written to the TX register in the IRQ handler, the USART driver calls the callback
|
||||
* function and passes the @ref kStatus_USART_TxIdle as status parameter.
|
||||
*
|
||||
* @note The kStatus_USART_TxIdle is passed to the upper layer when all data is written
|
||||
* to the TX register. However it does not ensure that all data are sent out. Before disabling the TX,
|
||||
* check the kUSART_TransmissionCompleteFlag to ensure that the TX is finished.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
* @param xfer USART transfer structure. See #usart_transfer_t.
|
||||
* @retval kStatus_Success Successfully start the data transmission.
|
||||
* @retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet.
|
||||
* @retval kStatus_InvalidArgument Invalid argument.
|
||||
*/
|
||||
status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Sets up the RX ring buffer.
|
||||
*
|
||||
* This function sets up the RX ring buffer to a specific USART handle.
|
||||
*
|
||||
* When the RX ring buffer is used, data received are stored into the ring buffer even when the
|
||||
* user doesn't call the USART_TransferReceiveNonBlocking() API. If there is already data received
|
||||
* in the ring buffer, the user can get the received data from the ring buffer directly.
|
||||
*
|
||||
* @note When using the RX ring buffer, one byte is reserved for internal use. In other
|
||||
* words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
* @param ringBuffer Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.
|
||||
* @param ringBufferSize size of the ring buffer.
|
||||
*/
|
||||
void USART_TransferStartRingBuffer(USART_Type *base,
|
||||
usart_handle_t *handle,
|
||||
uint8_t *ringBuffer,
|
||||
size_t ringBufferSize);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the background transfer and uninstalls the ring buffer.
|
||||
*
|
||||
* This function aborts the background transfer and uninstalls the ring buffer.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
*/
|
||||
void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Get the length of received data in RX ring buffer.
|
||||
*
|
||||
* @param handle USART handle pointer.
|
||||
* @return Length of received data in RX ring buffer.
|
||||
*/
|
||||
size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the interrupt-driven data transmit.
|
||||
*
|
||||
* This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
|
||||
* how many bytes are still not sent out.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
*/
|
||||
void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Get the number of bytes that have been sent out to bus.
|
||||
*
|
||||
* This function gets the number of bytes that have been sent out to bus by interrupt method.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
* @param count Send bytes count.
|
||||
* @retval kStatus_NoTransferInProgress No send in progress.
|
||||
* @retval kStatus_InvalidArgument Parameter is invalid.
|
||||
* @retval kStatus_Success Get successfully through the parameter \p count;
|
||||
*/
|
||||
status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count);
|
||||
|
||||
/*!
|
||||
* @brief Receives a buffer of data using an interrupt method.
|
||||
*
|
||||
* This function receives data using an interrupt method. This is a non-blocking function, which
|
||||
* returns without waiting for all data to be received.
|
||||
* If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
|
||||
* the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
|
||||
* After copying, if the data in the ring buffer is not enough to read, the receive
|
||||
* request is saved by the USART driver. When the new data arrives, the receive request
|
||||
* is serviced first. When all data is received, the USART driver notifies the upper layer
|
||||
* through a callback function and passes the status parameter @ref kStatus_USART_RxIdle.
|
||||
* For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer.
|
||||
* The 5 bytes are copied to the xfer->data and this function returns with the
|
||||
* parameter @p receivedBytes set to 5. For the left 5 bytes, newly arrived data is
|
||||
* saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer.
|
||||
* If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
|
||||
* to receive data to the xfer->data. When all data is received, the upper layer is notified.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
* @param xfer USART transfer structure, see #usart_transfer_t.
|
||||
* @param receivedBytes Bytes received from the ring buffer directly.
|
||||
* @retval kStatus_Success Successfully queue the transfer into transmit queue.
|
||||
* @retval kStatus_USART_RxBusy Previous receive request is not finished.
|
||||
* @retval kStatus_InvalidArgument Invalid argument.
|
||||
*/
|
||||
status_t USART_TransferReceiveNonBlocking(USART_Type *base,
|
||||
usart_handle_t *handle,
|
||||
usart_transfer_t *xfer,
|
||||
size_t *receivedBytes);
|
||||
|
||||
/*!
|
||||
* @brief Aborts the interrupt-driven data receiving.
|
||||
*
|
||||
* This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
|
||||
* how many bytes not received yet.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
*/
|
||||
void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Get the number of bytes that have been received.
|
||||
*
|
||||
* This function gets the number of bytes that have been received.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
* @param count Receive bytes count.
|
||||
* @retval kStatus_NoTransferInProgress No receive in progress.
|
||||
* @retval kStatus_InvalidArgument Parameter is invalid.
|
||||
* @retval kStatus_Success Get successfully through the parameter \p count;
|
||||
*/
|
||||
status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count);
|
||||
|
||||
/*!
|
||||
* @brief USART IRQ handle function.
|
||||
*
|
||||
* This function handles the USART transmit and receive IRQ request.
|
||||
*
|
||||
* @param base USART peripheral base address.
|
||||
* @param handle USART handle pointer.
|
||||
*/
|
||||
void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle);
|
||||
|
||||
/* @} */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#endif /* _FSL_USART_H_ */
|
||||
572
lpcxpresso54114_spi_polling_b2b_transfer_master.mex
Normal file
572
lpcxpresso54114_spi_polling_b2b_transfer_master.mex
Normal file
@@ -0,0 +1,572 @@
|
||||
<?xml version="1.0" encoding= "UTF-8" ?>
|
||||
<configuration name="LPC54114J256" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="e9557829-218e-43c4-ae01-475aa374ee6f" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<common>
|
||||
<processor>LPC54114J256</processor>
|
||||
<package>LPC54114J256BD64</package>
|
||||
<board>LPCXpresso54114</board>
|
||||
<mcu_data>ksdk2_0</mcu_data>
|
||||
<cores selected="cm4">
|
||||
<core name="Cortex-M0P" id="cm0plus" description=""/>
|
||||
<core name="Cortex-M4F" id="cm4" description=""/>
|
||||
</cores>
|
||||
<description>Configuration imported from lpcxpresso54114_spi_polling_b2b_transfer_master</description>
|
||||
</common>
|
||||
<preferences>
|
||||
<validate_boot_init_only>true</validate_boot_init_only>
|
||||
<generate_extended_information>false</generate_extended_information>
|
||||
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
|
||||
<update_include_paths>true</update_include_paths>
|
||||
<generate_registers_defines>false</generate_registers_defines>
|
||||
</preferences>
|
||||
<tools>
|
||||
<pins name="Pins" version="13.1" enabled="true" update_project_code="true">
|
||||
<generated_project_files>
|
||||
<file path="board/pin_mux.c" update_enabled="true"/>
|
||||
<file path="board/pin_mux.h" update_enabled="true"/>
|
||||
</generated_project_files>
|
||||
<pins_profile>
|
||||
<processor_version>13.0.1</processor_version>
|
||||
<pin_labels>
|
||||
<pin_label pin_num="3" pin_signal="PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1" label="J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX" identifier="SFTKY4"/>
|
||||
<pin_label pin_num="2" pin_signal="PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0" label="J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP" identifier="SFTKY3"/>
|
||||
<pin_label pin_num="1" pin_signal="PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1" label="J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL" identifier="RST_RF"/>
|
||||
<pin_label pin_num="4" pin_signal="PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3" label="J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX" identifier="RF_BUSY"/>
|
||||
<pin_label pin_num="7" pin_signal="PIO1_16/PDM0_DATA/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1" label="J1[19]/P1_16-CT32B0_MAT0-GYRO_INT1" identifier="CTL_PSU"/>
|
||||
<pin_label pin_num="10" pin_signal="PIO1_17/MCLK/UTICK_CAP3" label="J9[9]/P1_17-IR_LEARN_EN" identifier="E_STOP"/>
|
||||
<pin_label pin_num="11" pin_signal="PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0" label="J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED" identifier="I_OUT1"/>
|
||||
<pin_label pin_num="12" pin_signal="PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1" label="J9[2]/P0_30-ADC1" identifier="V_OUT1"/>
|
||||
<pin_label pin_num="14" pin_signal="PIO1_0/PDM0_DATA/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3" label="J2[3]/P1_0-PDM0_DATA-CT32B3_MAT1" identifier="PSU_MON"/>
|
||||
<pin_label pin_num="15" pin_signal="PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4" label="J1[15]/P1_1-FC5_SSEL2" identifier="VBAT_MON"/>
|
||||
<pin_label pin_num="16" pin_signal="PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5" label="J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3" identifier="ID1"/>
|
||||
<pin_label pin_num="17" pin_signal="PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6" label="J2[20]/P1_3-FC7_SSEL2-CT32B0_CAP1" identifier="ID2"/>
|
||||
<pin_label pin_num="18" pin_signal="PIO1_4/PDM1_CLK/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7" label="J2[18]/J9[10]/P1_4-ADC7-PDM1_CLK-FC7_RTS-FC3_TXD" identifier="V_CHK"/>
|
||||
<pin_label pin_num="19" pin_signal="PIO1_5/PDM1_DATA/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8" label="J2[16]/J9[12]/P1_5-ADC8-PDM1_DAT-FC7_CTS" identifier="TEMP"/>
|
||||
<pin_label pin_num="27" pin_signal="PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10" label="J1[10]/P1_7-FC7_RXD_SDA_MOSI_DATA" identifier="BAT_ID"/>
|
||||
<pin_label pin_num="28" pin_signal="PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11" label="J1[12]/J9[6]/P1_8-ADC11-FC7_TXD_SCL_MISO_FRAME" identifier="LCD_CD"/>
|
||||
<pin_label pin_num="29" pin_signal="PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED" label="J9[5]/D2[3]/P1_9-BLUE_LED" identifier="SIG_EN"/>
|
||||
<pin_label pin_num="30" pin_signal="PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME" label="J9[8]/D2[4]/P1_10-SCT4-LED_GREEN" identifier="SD_EN"/>
|
||||
<pin_label pin_num="31" pin_signal="PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3" label="U18[4]/TO_MUX_P0_0-ISP_RX" identifier="FC0_MOSI"/>
|
||||
<pin_label pin_num="32" pin_signal="PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1" label="U6[4]/U22[3]/P0_1-ISP_TX" identifier="FC0_MISO"/>
|
||||
<pin_label pin_num="36" pin_signal="PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3/CTIMER2_CAP1" label="J9[1]/P0_2-GPIO_SPI_CS" identifier="SFTKY1"/>
|
||||
<pin_label pin_num="37" pin_signal="PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3" label="J9[3]/P0_3-GPIO_SPI_CS" identifier="SFTKY2"/>
|
||||
<pin_label pin_num="39" pin_signal="PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0" label="J1[20]/P0_5-FC6_RXD_SDA_MOSI_DATA" identifier="RXD"/>
|
||||
<pin_label pin_num="40" pin_signal="PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0" label="J1[18]/P0_6-FC6_TXD_SCL_MISO_FRAME" identifier="TXD"/>
|
||||
<pin_label pin_num="41" pin_signal="PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2" label="J1[16]/P0_7-FC6_SCK" identifier="POT_CS"/>
|
||||
<pin_label pin_num="42" pin_signal="PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS" label="J2[19]/P1_11-FC6_RTS_SSEL1-MAG_DRDY" identifier="RAMP_EN"/>
|
||||
<pin_label pin_num="43" pin_signal="PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3" label="J2[15]/P0_8-FC2_RXD_SDA_MOSI" identifier="PWM_BAR"/>
|
||||
<pin_label pin_num="44" pin_signal="PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0" label="J2[13]/P0_9-FC2_TXD_SCL_MISO" identifier="PWM_CPU"/>
|
||||
<pin_label pin_num="45" pin_signal="PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0" label="J2[11]/P0_10-FC2_SCK-CT32B3_MAT0" identifier="CS_EEP"/>
|
||||
<pin_label pin_num="46" pin_signal="PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1" label="J4[4]/U9[13]/BRIDGE_T_SCK" identifier="SCLK"/>
|
||||
<pin_label pin_num="47" pin_signal="PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3" label="J4[2]/U9[11]/BRIDGE_T_MOSI" identifier="SDATA"/>
|
||||
<pin_label pin_num="48" pin_signal="PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0" label="J4[3]/U15[4]/BRIDGE_T_MISO" identifier="SDIN"/>
|
||||
<pin_label pin_num="49" pin_signal="PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/CTIMER2_MAT1/FC1_SCK" label="J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3" identifier="SFTKY0"/>
|
||||
<pin_label pin_num="50" pin_signal="PIO0_15/FC3_RTS_SCL_SSEL1/SWO/CTIMER2_MAT2/FC4_SCK" label="J2[10]/JS30/U4[12]/TDO-SWO_TRGT-SPIFI_IO2" identifier="LCD_CS"/>
|
||||
<pin_label pin_num="51" pin_signal="PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2" label="J2[9]/P1_12-CT32B1_MAT0-ACCl_INT1" identifier="SIG_RST"/>
|
||||
<pin_label pin_num="54" pin_signal="PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA" label="J2[7]/P1_13-CT32B1_MAT1" identifier="SD_RST"/>
|
||||
<pin_label pin_num="57" pin_signal="PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS" label="J2[1]/P1_14-SCTO7" identifier="RAMP_RST"/>
|
||||
<pin_label pin_num="58" pin_signal="PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0" label="J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO" identifier="WRITE"/>
|
||||
<pin_label pin_num="59" pin_signal="PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1" label="J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn" identifier="PORT_LE"/>
|
||||
<pin_label pin_num="60" pin_signal="PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0" label="J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI" identifier="FC0_SCK"/>
|
||||
<pin_label pin_num="61" pin_signal="PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0" label="J2[2]/P0_21-CLKOUT-SPIFI_CLK" identifier="POT_CS2"/>
|
||||
<pin_label pin_num="62" pin_signal="PIO1_15/PDM0_CLK/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0" label="J1[17]/P1_15-SCTO5-FC7_CTS" identifier="ON_POLL"/>
|
||||
<pin_label pin_num="63" pin_signal="PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3" label="J4[8]/P0_22-BRIDGE_GPIO" identifier="SYS_CLK"/>
|
||||
</pin_labels>
|
||||
</pins_profile>
|
||||
<functions_list>
|
||||
<function name="BOARD_InitPins">
|
||||
<description>Configures pin routing and optionally pin electrical features.</description>
|
||||
<options>
|
||||
<callFromInitBoot>true</callFromInitBoot>
|
||||
<coreID>cm4</coreID>
|
||||
<enableClock>true</enableClock>
|
||||
</options>
|
||||
<dependencies>
|
||||
<dependency resourceType="Peripheral" resourceId="FLEXCOMM0" description="Peripheral FLEXCOMM0 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="FLEXCOMM3" description="Peripheral FLEXCOMM3 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="ADC0" description="Peripheral ADC0 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="FLEXCOMM6" description="Peripheral FLEXCOMM6 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="SCT0" description="Peripheral SCT0 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="USB0" description="Peripheral USB0 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<pins>
|
||||
<pin peripheral="FLEXCOMM0" signal="RXD_SDA_MOSI" pin_num="31" pin_signal="PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3">
|
||||
<pin_features>
|
||||
<pin_feature name="mode" value="inactive"/>
|
||||
<pin_feature name="invert" value="disabled"/>
|
||||
<pin_feature name="glitch_filter" value="disabled"/>
|
||||
<pin_feature name="slew_rate" value="standard"/>
|
||||
<pin_feature name="open_drain" value="disabled"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="FLEXCOMM0" signal="TXD_SCL_MISO" pin_num="32" pin_signal="PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1">
|
||||
<pin_features>
|
||||
<pin_feature name="mode" value="inactive"/>
|
||||
<pin_feature name="invert" value="disabled"/>
|
||||
<pin_feature name="glitch_filter" value="disabled"/>
|
||||
<pin_feature name="slew_rate" value="standard"/>
|
||||
<pin_feature name="open_drain" value="disabled"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="FLEXCOMM3" signal="SCK" pin_num="46" pin_signal="PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1">
|
||||
<pin_features>
|
||||
<pin_feature name="mode" value="pullUp"/>
|
||||
<pin_feature name="invert" value="disabled"/>
|
||||
<pin_feature name="glitch_filter" value="disabled"/>
|
||||
<pin_feature name="slew_rate" value="standard"/>
|
||||
<pin_feature name="open_drain" value="disabled"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="FLEXCOMM3" signal="RXD_SDA_MOSI" pin_num="47" pin_signal="PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3">
|
||||
<pin_features>
|
||||
<pin_feature name="mode" value="pullUp"/>
|
||||
<pin_feature name="invert" value="disabled"/>
|
||||
<pin_feature name="glitch_filter" value="disabled"/>
|
||||
<pin_feature name="slew_rate" value="standard"/>
|
||||
<pin_feature name="open_drain" value="disabled"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="FLEXCOMM3" signal="TXD_SCL_MISO" pin_num="48" pin_signal="PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0">
|
||||
<pin_features>
|
||||
<pin_feature name="mode" value="pullUp"/>
|
||||
<pin_feature name="invert" value="disabled"/>
|
||||
<pin_feature name="glitch_filter" value="disabled"/>
|
||||
<pin_feature name="slew_rate" value="standard"/>
|
||||
<pin_feature name="open_drain" value="disabled"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="ADC0" signal="CH, 0" pin_num="11" pin_signal="PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0"/>
|
||||
<pin peripheral="ADC0" signal="CH, 1" pin_num="12" pin_signal="PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1"/>
|
||||
<pin peripheral="ADC0" signal="CH, 7" pin_num="18" pin_signal="PIO1_4/PDM1_CLK/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7"/>
|
||||
<pin peripheral="ADC0" signal="CH, 6" pin_num="17" pin_signal="PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6"/>
|
||||
<pin peripheral="ADC0" signal="CH, 5" pin_num="16" pin_signal="PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5"/>
|
||||
<pin peripheral="ADC0" signal="CH, 4" pin_num="15" pin_signal="PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4"/>
|
||||
<pin peripheral="ADC0" signal="CH, 3" pin_num="14" pin_signal="PIO1_0/PDM0_DATA/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3"/>
|
||||
<pin peripheral="GPIO" signal="PIO1, 12" pin_num="51" pin_signal="PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 13" pin_num="54" pin_signal="PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 14" pin_num="57" pin_signal="PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 15" pin_num="62" pin_signal="PIO1_15/PDM0_CLK/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 16" pin_num="7" pin_signal="PIO1_16/PDM0_DATA/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
<pin_feature name="mode" value="pullDown"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="FLEXCOMM0" signal="SCK" pin_num="60" pin_signal="PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0"/>
|
||||
<pin peripheral="GPIO" signal="PIO0, 2" pin_num="36" pin_signal="PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3/CTIMER2_CAP1">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 3" pin_num="37" pin_signal="PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 7" pin_num="41" pin_signal="PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
<pin_feature name="gpio_init_state" value="true"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 21" pin_num="61" pin_signal="PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
<pin_feature name="gpio_init_state" value="true"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="SWD" signal="SWCLK" pin_num="52" pin_signal="PIO0_16/FC3_SSEL2/FC6_CTS_SDA_SSEL0/CTIMER3_MAT1/SWCLK"/>
|
||||
<pin peripheral="SWD" signal="SWDIO" pin_num="53" pin_signal="PIO0_17/FC3_SSEL3/FC6_RTS_SCL_SSEL1/CTIMER3_MAT2/SWDIO"/>
|
||||
<pin peripheral="GPIO" signal="PIO1, 8" pin_num="28" pin_signal="PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 19" pin_num="59" pin_signal="PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 24" pin_num="2" pin_signal="PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 25" pin_num="3" pin_signal="PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 14" pin_num="49" pin_signal="PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/CTIMER2_MAT1/FC1_SCK">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
<pin_feature name="mode" value="inactive"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="ADC0" signal="CH, 8" pin_num="19" pin_signal="PIO1_5/PDM1_DATA/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8"/>
|
||||
<pin peripheral="GPIO" signal="PIO0, 26" pin_num="4" pin_signal="PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
<pin_feature name="i2c_filter" value="disabled"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 17" pin_num="10" pin_signal="PIO1_17/MCLK/UTICK_CAP3">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="ADC0" signal="CH, 10" pin_num="27" pin_signal="PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10"/>
|
||||
<pin peripheral="GPIO" signal="PIO1, 9" pin_num="29" pin_signal="PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 10" pin_num="30" pin_signal="PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="FLEXCOMM6" signal="RXD_SDA_MOSI_DATA" pin_num="39" pin_signal="PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0"/>
|
||||
<pin peripheral="FLEXCOMM6" signal="TXD_SCL_MISO_WS" pin_num="40" pin_signal="PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0">
|
||||
<pin_features>
|
||||
<pin_feature name="identifier" value=""/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO1, 11" pin_num="42" pin_signal="PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 10" pin_num="45" pin_signal="PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 18" pin_num="58" pin_signal="PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="SYSCON" signal="CLKIN" pin_num="63" pin_signal="PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3"/>
|
||||
<pin peripheral="FLEXCOMM3" signal="RTS_SCL_SSEL1" pin_num="50" pin_signal="PIO0_15/FC3_RTS_SCL_SSEL1/SWO/CTIMER2_MAT2/FC4_SCK">
|
||||
<pin_features>
|
||||
<pin_feature name="identifier" value=""/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="SCT0" signal="OUT, 1" pin_num="43" pin_signal="PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3"/>
|
||||
<pin peripheral="SCT0" signal="OUT, 2" pin_num="44" pin_signal="PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0"/>
|
||||
<pin peripheral="SCT0" signal="IN, 0" pin_num="1" pin_signal="PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1">
|
||||
<pin_features>
|
||||
<pin_feature name="identifier" value=""/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="USB0" signal="USB_DP" pin_num="5" pin_signal="USB0_DP"/>
|
||||
<pin peripheral="USB0" signal="USB_DM" pin_num="6" pin_signal="USB0_DM"/>
|
||||
<pin peripheral="USB0" signal="USB_VBUS" pin_num="26" pin_signal="PIO1_6/FC7_SCK/CTIMER1_CAP2/CTIMER1_MAT2/USB0_VBUS/ADC0_9">
|
||||
<pin_features>
|
||||
<pin_feature name="identifier" value=""/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO" signal="PIO0, 4" pin_num="38" pin_signal="PIO0_4/FC0_SCK/FC3_SSEL2/CTIMER0_CAP2">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
</pins>
|
||||
</function>
|
||||
</functions_list>
|
||||
</pins>
|
||||
<clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
|
||||
<generated_project_files>
|
||||
<file path="board/clock_config.c" update_enabled="true"/>
|
||||
<file path="board/clock_config.h" update_enabled="true"/>
|
||||
</generated_project_files>
|
||||
<clocks_profile>
|
||||
<processor_version>13.0.1</processor_version>
|
||||
</clocks_profile>
|
||||
<clock_configurations>
|
||||
<clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
|
||||
<description></description>
|
||||
<options/>
|
||||
<dependencies>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<clock_sources/>
|
||||
<clock_outputs>
|
||||
<clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
|
||||
</clock_outputs>
|
||||
<clock_settings/>
|
||||
<called_from_default_init>false</called_from_default_init>
|
||||
</clock_configuration>
|
||||
<clock_configuration name="BOARD_BootClockFROHF48M" id_prefix="" prefix_user_defined="false">
|
||||
<description></description>
|
||||
<options/>
|
||||
<dependencies>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF48M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF48M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF48M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF48M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF48M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF48M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<clock_sources/>
|
||||
<clock_outputs>
|
||||
<clock_output id="System_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
|
||||
</clock_outputs>
|
||||
<clock_settings>
|
||||
<setting id="SYSCON.MAINCLKSELA.sel" value="SYSCON.fro_hf" locked="false"/>
|
||||
</clock_settings>
|
||||
<called_from_default_init>false</called_from_default_init>
|
||||
</clock_configuration>
|
||||
<clock_configuration name="BOARD_BootClockFROHF96M" id_prefix="" prefix_user_defined="false">
|
||||
<description></description>
|
||||
<options/>
|
||||
<dependencies>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<clock_sources>
|
||||
<clock_source id="SYSCON.fro_hf.outFreq" value="96 MHz" locked="false" enabled="false"/>
|
||||
</clock_sources>
|
||||
<clock_outputs>
|
||||
<clock_output id="System_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
|
||||
</clock_outputs>
|
||||
<clock_settings>
|
||||
<setting id="SYSCON.MAINCLKSELA.sel" value="SYSCON.fro_hf" locked="false"/>
|
||||
</clock_settings>
|
||||
<called_from_default_init>false</called_from_default_init>
|
||||
</clock_configuration>
|
||||
<clock_configuration name="BOARD_BootClockPLL150M" id_prefix="" prefix_user_defined="false">
|
||||
<description></description>
|
||||
<options/>
|
||||
<dependencies>
|
||||
<dependency resourceType="PinSignal" resourceId="SYSCON.CLKIN" description="'CLKIN' (Pins tool id: SYSCON.CLKIN, Clocks tool id: SYSCON.CLKIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="routed" evaluation="">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="SYSCON.CLKIN" description="'CLKIN' (Pins tool id: SYSCON.CLKIN, Clocks tool id: SYSCON.CLKIN) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="direction" evaluation="">
|
||||
<data>INPUT</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm0plus">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
|
||||
<feature name="enabled" evaluation="equal" configuration="cm4">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<clock_sources>
|
||||
<clock_source id="SYSCON.clk_in.outFreq" value="24 MHz" locked="false" enabled="true"/>
|
||||
</clock_sources>
|
||||
<clock_outputs>
|
||||
<clock_output id="PLL_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="System_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
|
||||
</clock_outputs>
|
||||
<clock_settings>
|
||||
<setting id="PLL_Mode" value="Normal" locked="false"/>
|
||||
<setting id="SYSCON.DIRECTO.sel" value="SYSCON.PLL" locked="false"/>
|
||||
<setting id="SYSCON.MAINCLKSELA.sel" value="SYSCON.clk_in" locked="false"/>
|
||||
<setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL_BYPASS" locked="false"/>
|
||||
<setting id="SYSCON.M_MULT.scale" value="48" locked="true"/>
|
||||
<setting id="SYSCON.N_DIV.scale" value="8" locked="true"/>
|
||||
<setting id="SYSCON.PLL_BYPASS.sel" value="SYSCON.DIRECTO" locked="false"/>
|
||||
<setting id="SYSCON.SYSPLLCLKSEL.sel" value="SYSCON.clk_in" locked="false"/>
|
||||
</clock_settings>
|
||||
<called_from_default_init>true</called_from_default_init>
|
||||
</clock_configuration>
|
||||
</clock_configurations>
|
||||
</clocks>
|
||||
<dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
|
||||
<generated_project_files/>
|
||||
<dcdx_profile>
|
||||
<processor_version>N/A</processor_version>
|
||||
</dcdx_profile>
|
||||
<dcdx_configurations/>
|
||||
</dcdx>
|
||||
<periphs name="Peripherals" version="11.0" enabled="false" update_project_code="true">
|
||||
<generated_project_files/>
|
||||
<peripherals_profile>
|
||||
<processor_version>N/A</processor_version>
|
||||
</peripherals_profile>
|
||||
<functional_groups/>
|
||||
<components/>
|
||||
</periphs>
|
||||
<tee name="TEE" version="4.0" enabled="false" update_project_code="true">
|
||||
<generated_project_files/>
|
||||
<tee_profile>
|
||||
<processor_version>N/A</processor_version>
|
||||
</tee_profile>
|
||||
</tee>
|
||||
</tools>
|
||||
</configuration>
|
||||
280
source/AppChangeLog.txt
Normal file
280
source/AppChangeLog.txt
Normal file
@@ -0,0 +1,280 @@
|
||||
Changed dID response to "UM_TX_LOADER"
|
||||
Trouble connecting from UM_Setup. Connects to Realterm OK.
|
||||
Found that setting vcp.DtsEnable = true in C# allows connection
|
||||
New problem: Data larger than 64 bytes throws semaphore exception in C#
|
||||
Believe this is because of the max USB packet size in usb_device_config.h
|
||||
|
||||
|
||||
|
||||
11/5/2023 - Started with TX_Loader project with USB and FLASH support
|
||||
REVERT BOOTLOADER CHANGES
|
||||
Changed dID response to "UM_TX"
|
||||
Revert bootloader changes in ctimer_match0_callback()
|
||||
Left USB_Update() call
|
||||
Main.c
|
||||
Removed bootloader function calls
|
||||
Enabled all code from application
|
||||
PROGRAM FLASH SETTINGS
|
||||
Changes MCU Settings: FLASH start @ 0x10000, size 0x30000
|
||||
This gives 192kB for the Application program in FLASH
|
||||
Application builds to 105kB without optimization
|
||||
UM SETUP SUPPORT
|
||||
Added support for pLoaderRunRequest and pClearProgramFlag
|
||||
Added USB_ProcessFrequencyCommand() for handling UM Setup frequency commands
|
||||
SYSTEM
|
||||
Added system.c/h for system strings
|
||||
|
||||
|
||||
UMTX v0.90 11/10/2023
|
||||
SYSTEM
|
||||
Added SYSTEM_DATA_t struct with system data
|
||||
EEPROM ISSUE
|
||||
Found a conflict with the CTIMER0 interrupt - interrupts corrupt EEPROM data
|
||||
Solved by stopping CTIMER0 during EEPROM data transfers
|
||||
Added TMR_Start() and TMR_Start() to control the timer from eeprom.c
|
||||
EEPROM
|
||||
Added support for UINT32 and uint8_t[] read and write to EEPROM
|
||||
Filled out eeprom.c/h
|
||||
Added EE_LoadData() and EE_SaveData()
|
||||
Call load on startup, call save on power down
|
||||
Load / save support for system data only.
|
||||
TODO: Add frequencies and operating states
|
||||
UM SETUP SUPPORT
|
||||
Added support for system info
|
||||
|
||||
UMTX v0.91 11/11/2023
|
||||
MERGE
|
||||
Pulled in Keith's changes from 10/21/23 through 11/10/23
|
||||
|
||||
UMTX v0.92 11/15/2023
|
||||
Unit to Italy, Normal running mode, 263Hz reduced.
|
||||
|
||||
UMTX v0.93 11/16/2023
|
||||
Test Mode for Yao.
|
||||
|
||||
UMTX v0.94 11/16/2023
|
||||
Fixed bug in Test Mode caused by 2nd DDS intermittent turn on.
|
||||
|
||||
UMTX v0.95 12/06/2023
|
||||
Fixed bug in causing DDS incorrect initial power up errors.
|
||||
|
||||
UMTX v0.96 12/08/2023
|
||||
Softer shut down when using clamp. Improved Overcurrent implemented.
|
||||
|
||||
UMTX v1.0 12/12/2023
|
||||
Improved HV blocking HF always blocked. Over power bug fixed.
|
||||
|
||||
UMTX v1.1 12/xx/2023
|
||||
MENU
|
||||
ON_OFF_KEY press exits to main screen from any menu
|
||||
Changed menu order so that optional menu lines are last and can be hidden easily
|
||||
Updated Main menu text in MENU_Init()
|
||||
Updated submenu calls in Menu_Main()
|
||||
Updated menu line display in MENU_DisplayMain()
|
||||
Hid Language menu (until language support is ready)
|
||||
Hid Link Radio and Regulatory menus for Tx10
|
||||
Added Diagnostics screen
|
||||
Added SystemInfoMenu() to control DisplaySystemInfo() and DisplayDiagnostics()
|
||||
Fixed BC cycling issue. Clamp blocking fixed, Clamp overwrite of BC display fixed.
|
||||
Frequency init fixed. Time delay between modes and power off improved, Taps issue fixed,
|
||||
Clamp measurements removed from display.
|
||||
|
||||
|
||||
UMTX v1.1b 12/xx/2023
|
||||
Fixes to Display of V,I,R.
|
||||
Added additional filtering slower k factor.
|
||||
Fixed divide by zero in Ohms calculation
|
||||
|
||||
UMTX v1.2b 12/27/2023
|
||||
Fixed, Adc faster measurements, added catchup for power adjustment, Taps forced,
|
||||
lowered trickle,current limits trimmed.System checking delayed after adjustment.
|
||||
|
||||
UMTX v1.2c 12/27/2023
|
||||
Fixed ESTOP.
|
||||
|
||||
UMTX v1.2d 12/28/2023
|
||||
Disabled H/W when USB connected, Reset power level to zero when switching modes, reduced
|
||||
power in broadcast.
|
||||
|
||||
UMTX v1.2e 01/02/2023
|
||||
Fixed USB connected during run time, fixed s/c current and power adjust after keypress.
|
||||
Changed PSU sequencing when switching.
|
||||
|
||||
UMTX v1.2f 01/03/2023
|
||||
Fixed stuck power increase, missing taps case, overcurrent standby in very low impedance improved.
|
||||
|
||||
UMTX v1.2g 01/03/2023
|
||||
Trickle current increased, current adjust held off in PL1
|
||||
|
||||
UMTX v1.2j 01/03/2023
|
||||
AB amp limited to 500mA.
|
||||
|
||||
UMTX v1.2k 01/04/2023
|
||||
Fixed step from Blocking cap transition on PL1.
|
||||
|
||||
UMTX v1.2l 01/04/2023
|
||||
ADC offset fixed.
|
||||
|
||||
UMTX v1.2 01/04/2024
|
||||
ADC offset fixed.
|
||||
|
||||
|
||||
UMTX v1.2aa 01/05/24
|
||||
ADC
|
||||
Applied current offset (was not turned on)
|
||||
Remove ADC channel 9 - was USB VBUS = not used
|
||||
Added voltage offset measurement at startup
|
||||
Apply voltage offset in ADC_Update()
|
||||
Added error detection to vos and ios measurements
|
||||
ISSUE: If debugging program from running program, outputs keep running and offsets will measure them!
|
||||
DIAGNOSTICS
|
||||
Added voltage and current offsets
|
||||
Added vos and ios measurements and error status
|
||||
|
||||
UMTX v1.2ab
|
||||
ADC
|
||||
Updated voltage and current offsets to use OK instead of error flags
|
||||
Check for +/- 30 counts from midScale (was only checking one side)
|
||||
MENU
|
||||
Updated to use OK flag
|
||||
|
||||
UMTX v1.2ac
|
||||
Checked out from new svn repo: https://yuriykc.dyndns.info:48443/svn/utility/TX/App/Trunk
|
||||
Build to make sure it's all working
|
||||
Had to add libpower_cm4_hardabi.a and _softabi.a
|
||||
|
||||
UMTX v1.3 01/09/24
|
||||
same as v1.2ac except USB turned on in main.
|
||||
|
||||
|
||||
UMTX v1.3M 02/09/24
|
||||
Updated with adc improvement plus usb additional peripherals inits removed.
|
||||
Also contains Alakline battery fixes, new battery calculator for lithium. Class AB protection.
|
||||
ADC_REF change.
|
||||
|
||||
UMTX v1.3R 03/06/24
|
||||
Gain key lock out. PSU Monitor,Blocking cap moved,Safe output after changing hi/lo ,lo hi frequencies.
|
||||
System timer fixed. Short detection sped up.
|
||||
|
||||
UMTX v1.3S 03/08/24
|
||||
Improved gain handling, improved PSU monitor, improved wrap around.Updated alkaline selection.
|
||||
|
||||
UMTX v1.3T 03/14/24
|
||||
Battery voltage changed, Blocking cap operation changed. PL1 on start, Clamp Dc display bug fixed.
|
||||
USB plug in fixed, Error 2 fix, Error 1 fix.
|
||||
|
||||
UMTX v1.3U 03/22/24
|
||||
Temporary incomplete save.
|
||||
|
||||
|
||||
UMTX v1.3V 03/27/24
|
||||
System timer, fixed. Lowered current steps in HF, increased protection of AB amp. Taps bug fix.
|
||||
Improved regulation. HF current measurement fixed. Frequency initial fixed. Improved display software.
|
||||
|
||||
UMTX v1.3W 03/28/24
|
||||
Contains battery fix plus selectable hidden menu for recording H/w changes.
|
||||
|
||||
UMTX v1.3X 04/02/24
|
||||
Contains battery life changes, updated live voltage check, updated battery eol check, updated
|
||||
current demand limitation in high frequencies.
|
||||
UMTX v1.3X1 04/03/24
|
||||
Contains additional menus to select between ASSY changes.
|
||||
|
||||
UMTX v1.3X2 04/03/24
|
||||
Fixes battery scaling error, fixes clamp auto adjustment error.
|
||||
UMTX v1.3X3 04/03/24
|
||||
Fixes 29K, amplitude, and H/W board p/n fix
|
||||
|
||||
UMTX v1.3X4 04/08/24
|
||||
HF measurement fix in LOW gain, Ohms display updated to k Ohms.
|
||||
|
||||
UMTX v1.6 04/09/24
|
||||
HF measurement fix in LOW gain(Not complete) , Ohms display updated to k Ohms. Not recommended for HF
|
||||
due to current measurement error.
|
||||
|
||||
v1.7A 04/xx/2024
|
||||
CURRENT SCALING
|
||||
Changed 208023 tables to 208025
|
||||
208023 does NOT use high frequencies and tables are almost identical up to 45k
|
||||
208023 and 208025 will both use 208025 tables
|
||||
Renamed MeasureXxxCurrent208023 -> 208025
|
||||
|
||||
v1.7 04/12/24
|
||||
Updated lowcurrent table. Changes adcinit til after the splash screen, added power up delay for high voltage
|
||||
adc reading.
|
||||
|
||||
v1.8A 05/30/24
|
||||
Supports 200K and 132K. Allows user to cycle frequencies without forcing zero when transitioning from
|
||||
High to Low frequency and vice versa.
|
||||
|
||||
v1.8B 05/30/24
|
||||
Changed 132K to 132110Hz.
|
||||
|
||||
v1.8C 05/31/24
|
||||
MODE Key used to toggle HI_GAIN.
|
||||
|
||||
v1.8D 06/03/24
|
||||
Updated coefficient for low gain in 200KHz in 208025.
|
||||
v1.8E 06/03/24
|
||||
Same as 1.8D.
|
||||
|
||||
v1.8F 06/05/24
|
||||
Updated Coefficients for 131K and 200KHz.
|
||||
|
||||
v1.8J 07/17/24
|
||||
Updated Coefficients for 131K and 200KHz.
|
||||
|
||||
v1.8K 07/17/24
|
||||
Updated Coefficients for 131K and 200KHz.
|
||||
|
||||
v1.8L 07/31/24
|
||||
Released 12K and 16K to Leica for testing purposes.
|
||||
|
||||
v1.8M 08/02/24
|
||||
Released Rewrites H/W Assy number to 208025 if 208021 found in EEPROM
|
||||
Released to Leica for testing purposes.
|
||||
|
||||
v1.8N 09/06/24
|
||||
Default Language fix, LD disabled, TX10 changed to 10W.
|
||||
|
||||
v1.8P 09/06/24
|
||||
Updated Leica P/n and System info menu and splash screen.
|
||||
|
||||
v1.8R 09/09/24
|
||||
High frequency Power monitor updated.
|
||||
|
||||
v1.8S 09/09/24
|
||||
High frequency Power monitor updated and Leica PN updated.
|
||||
v1.9 09/09/24
|
||||
Released version of v1.8S.
|
||||
|
||||
v1.9X 09/09/24
|
||||
Not released, contains updated High Voltage protection, LD but disabled, Ext 12V, 25W Enabled.
|
||||
|
||||
v1.9Y 04/23/25
|
||||
Not released, contains updated High Voltage protection, LD but disabled, Ext 12V, 25W Enabled.
|
||||
Updated but not complete Clamp changes.
|
||||
v1.9Z 04/23/25
|
||||
Not released, contains updated High Voltage protection, LD but disabled, Ext 12V, 25W Enabled.
|
||||
Updated but not complete Further updated Clamp changes.
|
||||
|
||||
|
||||
DIAGNOSTICS
|
||||
Added main PCBA PN to Diagnostics1 screen
|
||||
HWFIXES
|
||||
Changed HWF_MAX_MAIN_PCBA_PN to 208025
|
||||
|
||||
>>>>>>>>>>>>>>>>>>>>>>>>>>>> TX_App Debugging and Bootloader compatible builds <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
|
||||
|
||||
Debugging requires that the application be built to run at FLASH address 0
|
||||
The bootloader requires that the application be built at 0x10000
|
||||
To change this: Project > Properties > C/C++ Build > MCU Settings >
|
||||
TX_App: PROGRAM_FLASH Location = 0x10000 Size = 0x30000
|
||||
TX_Loader: PROGRAM FLASH Location = 0x0 Size = 0x10000
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
|
||||
TODO: Add support for UM Setup "pEraseAllData" command
|
||||
Needs to erase all EEPROM data except the bootloader section
|
||||
714
source/Fonts/CalibriBoldBasic10_15h.c
Normal file
714
source/Fonts/CalibriBoldBasic10_15h.c
Normal file
@@ -0,0 +1,714 @@
|
||||
/*******************************************************************************
|
||||
* *
|
||||
* This file is generated by BitFontCreator Pro v3.8 *
|
||||
* by Iseatech Software http://www.iseasoft.com/bitfontcreator.html *
|
||||
* support@iseasoft.com *
|
||||
* *
|
||||
* Font name: Calibri *
|
||||
* Font width: 0 (proportional font) *
|
||||
* Font height: 15 *
|
||||
* Encode: Unicode *
|
||||
* Data length: 8 bits *
|
||||
* Invert bits: No *
|
||||
* Data format: Big Endian, Row based, Row preferred, Packed *
|
||||
* *
|
||||
* Create time: 17:17 04-07-2023 *
|
||||
*******************************************************************************/
|
||||
|
||||
#include "bfcfont.h"
|
||||
|
||||
/* The following line needs to be included in any file selecting the
|
||||
font.
|
||||
*/
|
||||
extern const BFC_FONT fontCalibriBoldBasic10_15h;
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_000A[ 14] = { /* code 000A */
|
||||
0x00, 0x00, 0x00, 0x0F, 0xD0, 0xAD, 0x4A, 0xB5,
|
||||
0x4A, 0x17, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_000D[ 14] = { /* code 000D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0020[ 6] = { /* code 0020 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0021[ 8] = { /* code 0021 */
|
||||
0x00, 0x06, 0x66, 0x66, 0x60, 0x66, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0022[ 12] = { /* code 0022 */
|
||||
0x00, 0x00, 0x36, 0xDB, 0x60, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0023[ 12] = { /* code 0023 */
|
||||
0x00, 0x00, 0x00, 0x28, 0xAF, 0xCA, 0x53, 0xF5,
|
||||
0x14, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0024[ 14] = { /* code 0024 */
|
||||
0x00, 0x00, 0x00, 0x87, 0x98, 0xB0, 0x38, 0x38,
|
||||
0x1A, 0x33, 0xC2, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0025[ 17] = { /* code 0025 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x06, 0x24, 0xA2, 0x50,
|
||||
0xD0, 0x16, 0x14, 0x8A, 0x48, 0xC0, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0026[ 17] = { /* code 0026 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0xC1, 0xB0, 0xD8,
|
||||
0x38, 0x3D, 0x33, 0x98, 0xC7, 0xB0, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0027[ 6] = { /* code 0027 */
|
||||
0x00, 0x6D, 0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0028[ 8] = { /* code 0028 */
|
||||
0x00, 0x02, 0x64, 0xCC, 0xCC, 0xC4, 0x62, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0029[ 8] = { /* code 0029 */
|
||||
0x00, 0x08, 0xC4, 0x66, 0x66, 0x64, 0xC8, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_002A[ 12] = { /* code 002A */
|
||||
0x00, 0x00, 0x08, 0xA9, 0xC7, 0x2A, 0x20, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_002B[ 12] = { /* code 002B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x02, 0x08, 0xF8, 0x82,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_002C[ 6] = { /* code 002C */
|
||||
0x00, 0x00, 0x00, 0x01, 0xB7, 0x80
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_002D[ 8] = { /* code 002D */
|
||||
0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_002E[ 6] = { /* code 002E */
|
||||
0x00, 0x00, 0x00, 0x03, 0x60, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_002F[ 12] = { /* code 002F */
|
||||
0x00, 0x00, 0x01, 0x08, 0x21, 0x04, 0x20, 0x84,
|
||||
0x10, 0x82, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0030[ 14] = { /* code 0030 */
|
||||
0x00, 0x00, 0x00, 0x07, 0x99, 0xB3, 0x66, 0xCD,
|
||||
0x9B, 0x33, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0031[ 14] = { /* code 0031 */
|
||||
0x00, 0x00, 0x00, 0x03, 0x0E, 0x2C, 0x18, 0x30,
|
||||
0x60, 0xC7, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0032[ 14] = { /* code 0032 */
|
||||
0x00, 0x00, 0x00, 0x07, 0x91, 0x83, 0x06, 0x18,
|
||||
0x61, 0x87, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0033[ 14] = { /* code 0033 */
|
||||
0x00, 0x00, 0x00, 0x07, 0x91, 0x83, 0x3C, 0x0C,
|
||||
0x1A, 0x33, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0034[ 14] = { /* code 0034 */
|
||||
0x00, 0x00, 0x00, 0x03, 0x87, 0x16, 0x2C, 0x99,
|
||||
0xF8, 0x60, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0035[ 14] = { /* code 0035 */
|
||||
0x00, 0x00, 0x00, 0x0F, 0xD8, 0x30, 0x7C, 0x0C,
|
||||
0x1A, 0x33, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0036[ 14] = { /* code 0036 */
|
||||
0x00, 0x00, 0x00, 0x03, 0x8C, 0x30, 0x7C, 0xCD,
|
||||
0x9B, 0x33, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0037[ 14] = { /* code 0037 */
|
||||
0x00, 0x00, 0x00, 0x0F, 0xC1, 0x86, 0x0C, 0x30,
|
||||
0x61, 0x83, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0038[ 14] = { /* code 0038 */
|
||||
0x00, 0x00, 0x00, 0x07, 0x99, 0xB3, 0x3C, 0xCD,
|
||||
0x9B, 0x33, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0039[ 14] = { /* code 0039 */
|
||||
0x00, 0x00, 0x00, 0x07, 0x99, 0xB3, 0x66, 0x7C,
|
||||
0x18, 0x67, 0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_003A[ 8] = { /* code 003A */
|
||||
0x00, 0x00, 0x00, 0xCC, 0x00, 0xCC, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_003B[ 8] = { /* code 003B */
|
||||
0x00, 0x00, 0x00, 0x66, 0x00, 0x66, 0x6C, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_003C[ 12] = { /* code 003C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0x98, 0x81, 0x81,
|
||||
0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_003D[ 12] = { /* code 003D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x03, 0xE0,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_003E[ 12] = { /* code 003E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x08, 0xCC,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_003F[ 12] = { /* code 003F */
|
||||
0x00, 0x00, 0x1C, 0x98, 0x61, 0x9C, 0x60, 0x06,
|
||||
0x18, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0040[ 23] = { /* code 0040 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x81,
|
||||
0x04, 0x26, 0xA4, 0x9A, 0x51, 0x25, 0x32, 0x4D,
|
||||
0xC2, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0041[ 15] = { /* code 0041 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x38, 0x38, 0x6C, 0x6C,
|
||||
0x6C, 0xFE, 0xC6, 0xC6, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0042[ 14] = { /* code 0042 */
|
||||
0x00, 0x00, 0x00, 0x07, 0xCC, 0xD9, 0xBE, 0x66,
|
||||
0xCD, 0x9B, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0043[ 14] = { /* code 0043 */
|
||||
0x00, 0x00, 0x00, 0x03, 0xCC, 0x58, 0x30, 0x60,
|
||||
0xC1, 0x89, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0044[ 15] = { /* code 0044 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x7C, 0x66, 0x66, 0x66,
|
||||
0x66, 0x66, 0x66, 0x7C, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0045[ 12] = { /* code 0045 */
|
||||
0x00, 0x00, 0x00, 0x7D, 0x86, 0x1F, 0x61, 0x86,
|
||||
0x1F, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0046[ 12] = { /* code 0046 */
|
||||
0x00, 0x00, 0x00, 0x7D, 0x86, 0x1F, 0x61, 0x86,
|
||||
0x18, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0047[ 15] = { /* code 0047 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x3C, 0x62, 0x60, 0x60,
|
||||
0x6E, 0x66, 0x66, 0x3E, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0048[ 15] = { /* code 0048 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x7E,
|
||||
0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0049[ 6] = { /* code 0049 */
|
||||
0x00, 0x0D, 0xB6, 0xDB, 0x60, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_004A[ 8] = { /* code 004A */
|
||||
0x00, 0x00, 0x33, 0x33, 0x33, 0x3E, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_004B[ 14] = { /* code 004B */
|
||||
0x00, 0x00, 0x00, 0x06, 0x6D, 0x9B, 0x3C, 0x78,
|
||||
0xD9, 0xB3, 0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_004C[ 12] = { /* code 004C */
|
||||
0x00, 0x00, 0x00, 0x61, 0x86, 0x18, 0x61, 0x86,
|
||||
0x1F, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_004D[ 21] = { /* code 004D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x0C, 0xE3,
|
||||
0x9C, 0x73, 0xDE, 0x6A, 0xCD, 0xD9, 0x93, 0x32,
|
||||
0x60, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_004E[ 17] = { /* code 004E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x06, 0x33, 0x99, 0xCC,
|
||||
0xD6, 0x6B, 0x33, 0x99, 0xCC, 0x60, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_004F[ 17] = { /* code 004F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x03, 0xE3, 0x19, 0x8C,
|
||||
0xC6, 0x63, 0x31, 0x98, 0xC7, 0xC0, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0050[ 14] = { /* code 0050 */
|
||||
0x00, 0x00, 0x00, 0x07, 0xCC, 0xD9, 0xB3, 0x7C,
|
||||
0xC1, 0x83, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0051[ 17] = { /* code 0051 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x03, 0xE3, 0x19, 0x8C,
|
||||
0xC6, 0x63, 0x31, 0x98, 0xC7, 0xC0, 0x18, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0052[ 14] = { /* code 0052 */
|
||||
0x00, 0x00, 0x00, 0x07, 0xCC, 0xD9, 0xBE, 0x6C,
|
||||
0xCD, 0x9B, 0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0053[ 12] = { /* code 0053 */
|
||||
0x00, 0x00, 0x00, 0x73, 0x2C, 0x3C, 0x78, 0x69,
|
||||
0x9C, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0054[ 12] = { /* code 0054 */
|
||||
0x00, 0x00, 0x00, 0xFC, 0xC3, 0x0C, 0x30, 0xC3,
|
||||
0x0C, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0055[ 15] = { /* code 0055 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66,
|
||||
0x66, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0056[ 15] = { /* code 0056 */
|
||||
0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6, 0xC6, 0x6C,
|
||||
0x6C, 0x6C, 0x38, 0x38, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0057[ 23] = { /* code 0057 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x3C,
|
||||
0x63, 0x6F, 0x66, 0x96, 0x69, 0x63, 0x9C, 0x30,
|
||||
0xC3, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0058[ 14] = { /* code 0058 */
|
||||
0x00, 0x00, 0x00, 0x0C, 0x6D, 0x9B, 0x1C, 0x38,
|
||||
0xD9, 0xB6, 0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0059[ 14] = { /* code 0059 */
|
||||
0x00, 0x00, 0x00, 0x0C, 0xD9, 0x9E, 0x3C, 0x30,
|
||||
0x60, 0xC1, 0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_005A[ 12] = { /* code 005A */
|
||||
0x00, 0x00, 0x00, 0xFC, 0x31, 0x8C, 0x31, 0x8C,
|
||||
0x3F, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_005B[ 8] = { /* code 005B */
|
||||
0x00, 0x07, 0x66, 0x66, 0x66, 0x66, 0x67, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_005C[ 12] = { /* code 005C */
|
||||
0x00, 0x00, 0x20, 0x81, 0x04, 0x08, 0x20, 0x41,
|
||||
0x02, 0x08, 0x10, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_005D[ 8] = { /* code 005D */
|
||||
0x00, 0x0E, 0x66, 0x66, 0x66, 0x66, 0x6E, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_005E[ 12] = { /* code 005E */
|
||||
0x00, 0x00, 0x00, 0x30, 0xC7, 0x92, 0xCC, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_005F[ 12] = { /* code 005F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x03, 0xF0, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0061[ 12] = { /* code 0061 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x06, 0x7B, 0x6D,
|
||||
0x9E, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0062[ 14] = { /* code 0062 */
|
||||
0x00, 0x00, 0x06, 0x0C, 0x18, 0x3E, 0x66, 0xCD,
|
||||
0x9B, 0x37, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0063[ 10] = { /* code 0063 */
|
||||
0x00, 0x00, 0x00, 0x01, 0xD8, 0xC6, 0x30, 0xE0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0064[ 14] = { /* code 0064 */
|
||||
0x00, 0x00, 0x00, 0x60, 0xC1, 0x9F, 0x66, 0xCD,
|
||||
0x9B, 0x33, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0065[ 14] = { /* code 0065 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x66, 0xFD,
|
||||
0x83, 0x03, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0066[ 10] = { /* code 0066 */
|
||||
0x00, 0x00, 0x76, 0x33, 0xCC, 0x63, 0x18, 0xC0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0067[ 12] = { /* code 0067 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x07, 0xF6, 0xD9, 0xCC,
|
||||
0x1E, 0xDB, 0xC0, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0068[ 14] = { /* code 0068 */
|
||||
0x00, 0x00, 0x06, 0x0C, 0x18, 0x3E, 0x66, 0xCD,
|
||||
0x9B, 0x36, 0x60, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0069[ 6] = { /* code 0069 */
|
||||
0x00, 0x6C, 0x36, 0xDB, 0x60, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_006A[ 6] = { /* code 006A */
|
||||
0x00, 0x36, 0x1B, 0x6D, 0xB7, 0x80
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_006B[ 12] = { /* code 006B */
|
||||
0x00, 0x00, 0x30, 0xC3, 0x0D, 0xB6, 0xF3, 0xCD,
|
||||
0xB6, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_006C[ 6] = { /* code 006C */
|
||||
0x00, 0x6D, 0xB6, 0xDB, 0x60, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_006D[ 21] = { /* code 006D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x3E, 0xE6, 0x66, 0xCC, 0xD9, 0x9B, 0x33, 0x66,
|
||||
0x60, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_006E[ 14] = { /* code 006E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x66, 0xCD,
|
||||
0x9B, 0x36, 0x60, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_006F[ 14] = { /* code 006F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x66, 0xCD,
|
||||
0x9B, 0x33, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0070[ 14] = { /* code 0070 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x66, 0xCD,
|
||||
0x9B, 0x37, 0xCC, 0x18, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0071[ 14] = { /* code 0071 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x66, 0xCD,
|
||||
0x9B, 0x33, 0xE0, 0xC1, 0x80, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0072[ 10] = { /* code 0072 */
|
||||
0x00, 0x00, 0x00, 0x03, 0xD8, 0xC6, 0x31, 0x80,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0073[ 10] = { /* code 0073 */
|
||||
0x00, 0x00, 0x00, 0x01, 0xD8, 0xE3, 0x8D, 0xC0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0074[ 10] = { /* code 0074 */
|
||||
0x00, 0x00, 0x06, 0x33, 0xCC, 0x63, 0x18, 0x60,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0075[ 14] = { /* code 0075 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x66, 0xCD,
|
||||
0x9B, 0x33, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0076[ 12] = { /* code 0076 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0D, 0xB6, 0xD9, 0x47,
|
||||
0x1C, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0077[ 19] = { /* code 0077 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C,
|
||||
0x9B, 0x76, 0xD5, 0x9D, 0xC6, 0x31, 0x8C, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0078[ 12] = { /* code 0078 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0D, 0xB6, 0x71, 0xCD,
|
||||
0xB6, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0079[ 12] = { /* code 0079 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0D, 0xB6, 0xD9, 0x47,
|
||||
0x0C, 0x61, 0x80, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_007A[ 10] = { /* code 007A */
|
||||
0x00, 0x00, 0x00, 0x03, 0xC6, 0x63, 0x31, 0xE0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_007B[ 8] = { /* code 007B */
|
||||
0x00, 0x03, 0x66, 0x66, 0xC6, 0x66, 0x63, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_007C[ 12] = { /* code 007C */
|
||||
0x00, 0x00, 0x08, 0x20, 0x82, 0x08, 0x20, 0x82,
|
||||
0x08, 0x20, 0x80, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_007D[ 8] = { /* code 007D */
|
||||
0x00, 0x0C, 0x66, 0x66, 0x36, 0x66, 0x6C, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_00E7[ 10] = { /* code 00E7 */
|
||||
0x00, 0x00, 0x00, 0x01, 0xD8, 0xC6, 0x30, 0xE2,
|
||||
0x30, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_00F1[ 14] = { /* code 00F1 */
|
||||
0x00, 0x00, 0x01, 0xA5, 0x80, 0x3E, 0x66, 0xCD,
|
||||
0x9B, 0x36, 0x60, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0438[ 14] = { /* code 0438 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0xB7, 0x6E,
|
||||
0xED, 0xDB, 0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0439[ 14] = { /* code 0439 */
|
||||
0x00, 0x00, 0x01, 0x11, 0xC0, 0x19, 0xB7, 0x6E,
|
||||
0xED, 0xDB, 0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_043A[ 12] = { /* code 043A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x06, 0xDB, 0x69, 0xC6,
|
||||
0x9B, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0441[ 10] = { /* code 0441 */
|
||||
0x00, 0x00, 0x00, 0x01, 0xD9, 0xC6, 0x32, 0xE0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_0443[ 14] = { /* code 0443 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3B, 0xB6, 0x6C,
|
||||
0x50, 0xE1, 0xC3, 0x06, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic10_15h_2126[ 17] = { /* code 2126 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0xE1, 0x99, 0x86,
|
||||
0xC3, 0x61, 0xB0, 0xCC, 0xCE, 0x70, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const BFC_CHARINFO fontCalibriBoldBasic10_15h_CharInfo[103] = {
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_000A} }, /* code 000A */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_000D} }, /* code 000D */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_0020} }, /* code 0020 */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_0021} }, /* code 0021 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0022} }, /* code 0022 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0023} }, /* code 0023 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0024} }, /* code 0024 */
|
||||
{ 9, 17, {abc_fontCalibriBoldBasic10_15h_0025} }, /* code 0025 */
|
||||
{ 9, 17, {abc_fontCalibriBoldBasic10_15h_0026} }, /* code 0026 */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_0027} }, /* code 0027 */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_0028} }, /* code 0028 */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_0029} }, /* code 0029 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_002A} }, /* code 002A */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_002B} }, /* code 002B */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_002C} }, /* code 002C */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_002D} }, /* code 002D */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_002E} }, /* code 002E */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_002F} }, /* code 002F */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0030} }, /* code 0030 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0031} }, /* code 0031 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0032} }, /* code 0032 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0033} }, /* code 0033 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0034} }, /* code 0034 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0035} }, /* code 0035 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0036} }, /* code 0036 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0037} }, /* code 0037 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0038} }, /* code 0038 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0039} }, /* code 0039 */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_003A} }, /* code 003A */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_003B} }, /* code 003B */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_003C} }, /* code 003C */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_003D} }, /* code 003D */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_003E} }, /* code 003E */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_003F} }, /* code 003F */
|
||||
{ 12, 23, {abc_fontCalibriBoldBasic10_15h_0040} }, /* code 0040 */
|
||||
{ 8, 15, {abc_fontCalibriBoldBasic10_15h_0041} }, /* code 0041 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0042} }, /* code 0042 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0043} }, /* code 0043 */
|
||||
{ 8, 15, {abc_fontCalibriBoldBasic10_15h_0044} }, /* code 0044 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0045} }, /* code 0045 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0046} }, /* code 0046 */
|
||||
{ 8, 15, {abc_fontCalibriBoldBasic10_15h_0047} }, /* code 0047 */
|
||||
{ 8, 15, {abc_fontCalibriBoldBasic10_15h_0048} }, /* code 0048 */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_0049} }, /* code 0049 */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_004A} }, /* code 004A */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_004B} }, /* code 004B */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_004C} }, /* code 004C */
|
||||
{ 11, 21, {abc_fontCalibriBoldBasic10_15h_004D} }, /* code 004D */
|
||||
{ 9, 17, {abc_fontCalibriBoldBasic10_15h_004E} }, /* code 004E */
|
||||
{ 9, 17, {abc_fontCalibriBoldBasic10_15h_004F} }, /* code 004F */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0050} }, /* code 0050 */
|
||||
{ 9, 17, {abc_fontCalibriBoldBasic10_15h_0051} }, /* code 0051 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0052} }, /* code 0052 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0053} }, /* code 0053 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0054} }, /* code 0054 */
|
||||
{ 8, 15, {abc_fontCalibriBoldBasic10_15h_0055} }, /* code 0055 */
|
||||
{ 8, 15, {abc_fontCalibriBoldBasic10_15h_0056} }, /* code 0056 */
|
||||
{ 12, 23, {abc_fontCalibriBoldBasic10_15h_0057} }, /* code 0057 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0058} }, /* code 0058 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0059} }, /* code 0059 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_005A} }, /* code 005A */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_005B} }, /* code 005B */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_005C} }, /* code 005C */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_005D} }, /* code 005D */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_005E} }, /* code 005E */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_005F} }, /* code 005F */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0061} }, /* code 0061 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0062} }, /* code 0062 */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_0063} }, /* code 0063 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0064} }, /* code 0064 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0065} }, /* code 0065 */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_0066} }, /* code 0066 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0067} }, /* code 0067 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0068} }, /* code 0068 */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_0069} }, /* code 0069 */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_006A} }, /* code 006A */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_006B} }, /* code 006B */
|
||||
{ 3, 6, {abc_fontCalibriBoldBasic10_15h_006C} }, /* code 006C */
|
||||
{ 11, 21, {abc_fontCalibriBoldBasic10_15h_006D} }, /* code 006D */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_006E} }, /* code 006E */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_006F} }, /* code 006F */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0070} }, /* code 0070 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0071} }, /* code 0071 */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_0072} }, /* code 0072 */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_0073} }, /* code 0073 */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_0074} }, /* code 0074 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0075} }, /* code 0075 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0076} }, /* code 0076 */
|
||||
{ 10, 19, {abc_fontCalibriBoldBasic10_15h_0077} }, /* code 0077 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0078} }, /* code 0078 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_0079} }, /* code 0079 */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_007A} }, /* code 007A */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_007B} }, /* code 007B */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_007C} }, /* code 007C */
|
||||
{ 4, 8, {abc_fontCalibriBoldBasic10_15h_007D} }, /* code 007D */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_00E7} }, /* code 00E7 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_00F1} }, /* code 00F1 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0438} }, /* code 0438 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0439} }, /* code 0439 */
|
||||
{ 6, 12, {abc_fontCalibriBoldBasic10_15h_043A} }, /* code 043A */
|
||||
{ 5, 10, {abc_fontCalibriBoldBasic10_15h_0441} }, /* code 0441 */
|
||||
{ 7, 14, {abc_fontCalibriBoldBasic10_15h_0443} }, /* code 0443 */
|
||||
{ 9, 17, {abc_fontCalibriBoldBasic10_15h_2126} } /* code 2126 */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop10 = {
|
||||
0x2126, /* first character */
|
||||
0x2126, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 102], /* address of first character */
|
||||
(const BFC_FONT_PROP *)0 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop9 = {
|
||||
0x0443, /* first character */
|
||||
0x0443, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 101], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop10 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop8 = {
|
||||
0x0441, /* first character */
|
||||
0x0441, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 100], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop9 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop7 = {
|
||||
0x0438, /* first character */
|
||||
0x043A, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 97], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop8 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop6 = {
|
||||
0x00F1, /* first character */
|
||||
0x00F1, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 96], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop7 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop5 = {
|
||||
0x00E7, /* first character */
|
||||
0x00E7, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 95], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop6 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop4 = {
|
||||
0x0061, /* first character */
|
||||
0x007D, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 66], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop5 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop3 = {
|
||||
0x0020, /* first character */
|
||||
0x005F, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 2], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop4 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop2 = {
|
||||
0x000D, /* first character */
|
||||
0x000D, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 1], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop3 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic10_15h_Prop1 = {
|
||||
0x000A, /* first character */
|
||||
0x000A, /* last character */
|
||||
&fontCalibriBoldBasic10_15h_CharInfo[ 0], /* address of first character */
|
||||
&fontCalibriBoldBasic10_15h_Prop2 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT fontCalibriBoldBasic10_15h = {
|
||||
0x01020802, /* font type = FONTTYPE_PROP | DATA_PACKED | ENCODING_UNICODE | DATALENGTH_8 */
|
||||
15, /* font height in pixels */
|
||||
12, /* font ascent (baseline) in pixels */
|
||||
0 , /* reversed, =0 */
|
||||
{&fontCalibriBoldBasic10_15h_Prop1}
|
||||
};
|
||||
766
source/Fonts/CalibriBoldBasic11_18h.c
Normal file
766
source/Fonts/CalibriBoldBasic11_18h.c
Normal file
@@ -0,0 +1,766 @@
|
||||
/*******************************************************************************
|
||||
* *
|
||||
* This file is generated by BitFontCreator Pro v3.8 *
|
||||
* by Iseatech Software http://www.iseasoft.com/bitfontcreator.html *
|
||||
* support@iseasoft.com *
|
||||
* *
|
||||
* Font name: Calibri *
|
||||
* Font width: 0 (proportional font) *
|
||||
* Font height: 18 *
|
||||
* Encode: Unicode *
|
||||
* Data length: 8 bits *
|
||||
* Invert bits: No *
|
||||
* Data format: Big Endian, Row based, Row preferred, Packed *
|
||||
* *
|
||||
* Create time: 17:17 04-07-2023 *
|
||||
*******************************************************************************/
|
||||
|
||||
#include "bfcfont.h"
|
||||
|
||||
/* The following line needs to be included in any file selecting the
|
||||
font.
|
||||
*/
|
||||
extern const BFC_FONT fontCalibriBoldBasic11_18h;
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_000A[ 18] = { /* code 000A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x82, 0xBA,
|
||||
0x8A, 0x9A, 0x82, 0x92, 0x82, 0xFE, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_000D[ 18] = { /* code 000D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0020[ 7] = { /* code 0020 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0021[ 12] = { /* code 0021 */
|
||||
0x00, 0x00, 0x06, 0x31, 0x8C, 0x63, 0x18, 0x06,
|
||||
0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0022[ 16] = { /* code 0022 */
|
||||
0x00, 0x00, 0x00, 0x06, 0xCD, 0x9B, 0x36, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0023[ 16] = { /* code 0023 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x04, 0x89, 0x7F, 0x24,
|
||||
0x49, 0x27, 0xF4, 0x89, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0024[ 16] = { /* code 0024 */
|
||||
0x00, 0x00, 0x00, 0x81, 0x0F, 0x31, 0x60, 0xE0,
|
||||
0xF0, 0x70, 0x68, 0xCF, 0x08, 0x10, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0025[ 25] = { /* code 0025 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x09, 0x22,
|
||||
0x24, 0x84, 0x90, 0x64, 0x01, 0x30, 0x49, 0x09,
|
||||
0x22, 0x24, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0026[ 25] = { /* code 0026 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C,
|
||||
0x0C, 0xC1, 0x98, 0x1E, 0x07, 0x99, 0x9B, 0x31,
|
||||
0xC6, 0x38, 0x7D, 0x80, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0027[ 9] = { /* code 0027 */
|
||||
0x00, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0028[ 12] = { /* code 0028 */
|
||||
0x00, 0x00, 0x01, 0x98, 0xCC, 0x63, 0x18, 0xC6,
|
||||
0x18, 0xC3, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0029[ 12] = { /* code 0029 */
|
||||
0x00, 0x00, 0x0C, 0x31, 0x86, 0x31, 0x8C, 0x63,
|
||||
0x31, 0x98, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_002A[ 16] = { /* code 002A */
|
||||
0x00, 0x00, 0x00, 0x01, 0x0A, 0x8E, 0x1C, 0x54,
|
||||
0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_002B[ 16] = { /* code 002B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0x11,
|
||||
0xFC, 0x40, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_002C[ 9] = { /* code 002C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x6C,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_002D[ 12] = { /* code 002D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_002E[ 9] = { /* code 002E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_002F[ 14] = { /* code 002F */
|
||||
0x00, 0x00, 0x03, 0x0C, 0x61, 0x86, 0x30, 0xC3,
|
||||
0x18, 0x61, 0x8C, 0x30, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0030[ 16] = { /* code 0030 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x33, 0x66, 0xCD,
|
||||
0x9B, 0x36, 0x6C, 0xCF, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0031[ 16] = { /* code 0031 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x06, 0x1C, 0x58, 0x30,
|
||||
0x60, 0xC1, 0x83, 0x1F, 0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0032[ 16] = { /* code 0032 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x23, 0x06, 0x0C,
|
||||
0x30, 0xC3, 0x0C, 0x1F, 0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0033[ 16] = { /* code 0033 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x23, 0x06, 0x0C,
|
||||
0xF0, 0x30, 0x68, 0xCF, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0034[ 16] = { /* code 0034 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x03, 0x0E, 0x1C, 0x58,
|
||||
0xB2, 0x67, 0xE1, 0x83, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0035[ 16] = { /* code 0035 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x1F, 0xB0, 0x60, 0xF8,
|
||||
0x18, 0x30, 0x68, 0xCF, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0036[ 16] = { /* code 0036 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x07, 0x18, 0x60, 0xF9,
|
||||
0x9B, 0x36, 0x6C, 0xCF, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0037[ 16] = { /* code 0037 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x1F, 0x83, 0x0C, 0x18,
|
||||
0x60, 0xC1, 0x86, 0x0C, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0038[ 16] = { /* code 0038 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x33, 0x66, 0xCC,
|
||||
0xF3, 0x36, 0x6C, 0xCF, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0039[ 16] = { /* code 0039 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x33, 0x66, 0xCD,
|
||||
0x99, 0xF0, 0x61, 0x9E, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_003A[ 9] = { /* code 003A */
|
||||
0x00, 0x00, 0x00, 0x06, 0x60, 0x00, 0x66, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_003B[ 9] = { /* code 003B */
|
||||
0x00, 0x00, 0x00, 0x06, 0x60, 0x00, 0x66, 0x6C,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_003C[ 16] = { /* code 003C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0C, 0x61,
|
||||
0x01, 0x80, 0xC0, 0x40, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_003D[ 16] = { /* code 003D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE,
|
||||
0x00, 0x07, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_003E[ 16] = { /* code 003E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x18, 0x0C,
|
||||
0x04, 0x31, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_003F[ 16] = { /* code 003F */
|
||||
0x00, 0x00, 0x00, 0x03, 0x89, 0x83, 0x06, 0x38,
|
||||
0x60, 0xC0, 0x03, 0x06, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0040[ 30] = { /* code 0040 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0xE0, 0x60, 0xC6, 0x03, 0x37, 0xDB, 0x66,
|
||||
0xDB, 0x66, 0xDB, 0x26, 0x6E, 0x30, 0x00, 0xC1,
|
||||
0x03, 0xF0, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0041[ 21] = { /* code 0041 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x70,
|
||||
0x6C, 0x36, 0x31, 0x98, 0xCF, 0xEC, 0x1E, 0x0C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0042[ 18] = { /* code 0042 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x66, 0x66,
|
||||
0x66, 0x7C, 0x66, 0x66, 0x66, 0x7C, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0043[ 18] = { /* code 0043 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x31, 0x60,
|
||||
0x60, 0x60, 0x60, 0x60, 0x31, 0x1E, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0044[ 21] = { /* code 0044 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xE1, 0x98,
|
||||
0xC6, 0x63, 0x31, 0x98, 0xCC, 0x66, 0x63, 0xE0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0045[ 16] = { /* code 0045 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0xD8, 0x30, 0x60,
|
||||
0xF9, 0x83, 0x06, 0x0F, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0046[ 16] = { /* code 0046 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0xD8, 0x30, 0x60,
|
||||
0xF9, 0x83, 0x06, 0x0C, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0047[ 23] = { /* code 0047 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xC3,
|
||||
0x09, 0x80, 0x60, 0x19, 0xE6, 0x19, 0x86, 0x31,
|
||||
0x87, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0048[ 21] = { /* code 0048 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x19, 0x8C,
|
||||
0xC6, 0x63, 0x3F, 0x98, 0xCC, 0x66, 0x33, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0049[ 9] = { /* code 0049 */
|
||||
0x00, 0x00, 0x06, 0x66, 0x66, 0x66, 0x66, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_004A[ 12] = { /* code 004A */
|
||||
0x00, 0x00, 0x00, 0x18, 0xC6, 0x31, 0x8C, 0x63,
|
||||
0x70, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_004B[ 18] = { /* code 004B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x66, 0x66,
|
||||
0x6C, 0x78, 0x6C, 0x66, 0x66, 0x63, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_004C[ 14] = { /* code 004C */
|
||||
0x00, 0x00, 0x00, 0x01, 0x86, 0x18, 0x61, 0x86,
|
||||
0x18, 0x61, 0xF0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_004D[ 30] = { /* code 004D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x38, 0x39, 0xC1, 0xCF, 0x1E, 0x68, 0xB3, 0x6D,
|
||||
0x9B, 0x6C, 0xCA, 0x66, 0x73, 0x33, 0x98, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_004E[ 23] = { /* code 004E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x67,
|
||||
0x19, 0xE6, 0x69, 0x9B, 0x66, 0x59, 0x9E, 0x63,
|
||||
0x98, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_004F[ 23] = { /* code 004F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x83,
|
||||
0x31, 0x86, 0x61, 0x98, 0x66, 0x19, 0x86, 0x33,
|
||||
0x07, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0050[ 18] = { /* code 0050 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x66, 0x66,
|
||||
0x66, 0x66, 0x7C, 0x60, 0x60, 0x60, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0051[ 23] = { /* code 0051 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x83,
|
||||
0x31, 0x86, 0x61, 0x98, 0x66, 0x19, 0x86, 0x33,
|
||||
0x07, 0xC0, 0x18, 0x03, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0052[ 18] = { /* code 0052 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x66, 0x66,
|
||||
0x66, 0x7C, 0x6C, 0x66, 0x66, 0x66, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0053[ 16] = { /* code 0053 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x07, 0x19, 0x30, 0x70,
|
||||
0x70, 0x70, 0x64, 0xC7, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0054[ 16] = { /* code 0054 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x1F, 0x8C, 0x18, 0x30,
|
||||
0x60, 0xC1, 0x83, 0x06, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0055[ 23] = { /* code 0055 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x66,
|
||||
0x19, 0x86, 0x61, 0x98, 0x66, 0x19, 0x86, 0x33,
|
||||
0x07, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0056[ 21] = { /* code 0056 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x0F, 0x06,
|
||||
0xC6, 0x63, 0x31, 0x8D, 0x86, 0xC1, 0xC0, 0xE0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0057[ 32] = { /* code 0057 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0x0C, 0x3C, 0x30, 0xF1, 0xE3, 0x67, 0x99,
|
||||
0xB3, 0x66, 0xCD, 0x8E, 0x1C, 0x38, 0x70, 0xC0,
|
||||
0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0058[ 18] = { /* code 0058 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0x66, 0x66,
|
||||
0x3C, 0x18, 0x3C, 0x66, 0x66, 0xC3, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0059[ 18] = { /* code 0059 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0x66, 0x66,
|
||||
0x3C, 0x3C, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_005A[ 16] = { /* code 005A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x1F, 0xC1, 0x86, 0x18,
|
||||
0x30, 0xC3, 0x0C, 0x1F, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_005B[ 12] = { /* code 005B */
|
||||
0x00, 0x00, 0x07, 0x31, 0x8C, 0x63, 0x18, 0xC6,
|
||||
0x31, 0x8E, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_005C[ 14] = { /* code 005C */
|
||||
0x00, 0x00, 0x30, 0xC1, 0x86, 0x18, 0x30, 0xC3,
|
||||
0x06, 0x18, 0x60, 0xC3, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_005D[ 12] = { /* code 005D */
|
||||
0x00, 0x00, 0x07, 0x18, 0xC6, 0x31, 0x8C, 0x63,
|
||||
0x18, 0xCE, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_005E[ 16] = { /* code 005E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x07, 0x0E, 0x36, 0x6D,
|
||||
0x8F, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_005F[ 16] = { /* code 005F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0061[ 16] = { /* code 0061 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x8C,
|
||||
0x19, 0xF6, 0x6C, 0xCF, 0x80, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0062[ 18] = { /* code 0062 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x60, 0x60, 0x60, 0x7C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0063[ 14] = { /* code 0063 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x65, 0x86,
|
||||
0x18, 0x64, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0064[ 18] = { /* code 0064 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x06, 0x3E,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x3E, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0065[ 18] = { /* code 0065 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C,
|
||||
0x66, 0x66, 0x7E, 0x60, 0x62, 0x3C, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0066[ 12] = { /* code 0066 */
|
||||
0x00, 0x00, 0x03, 0xB1, 0x9E, 0x63, 0x18, 0xC6,
|
||||
0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0067[ 16] = { /* code 0067 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x6C,
|
||||
0xD9, 0xB1, 0xC6, 0x07, 0x99, 0xB3, 0x3C, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0068[ 18] = { /* code 0068 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x60, 0x60, 0x60, 0x7C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0069[ 9] = { /* code 0069 */
|
||||
0x00, 0x00, 0x66, 0x06, 0x66, 0x66, 0x66, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_006A[ 9] = { /* code 006A */
|
||||
0x00, 0x00, 0x66, 0x06, 0x66, 0x66, 0x66, 0x66,
|
||||
0xC0
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_006B[ 16] = { /* code 006B */
|
||||
0x00, 0x00, 0x00, 0x06, 0x0C, 0x18, 0x33, 0x6C,
|
||||
0xF1, 0xE3, 0x66, 0xCC, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_006C[ 9] = { /* code 006C */
|
||||
0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_006D[ 27] = { /* code 006D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x07, 0xDC, 0x66, 0x66, 0x66, 0x66,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_006E[ 18] = { /* code 006E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_006F[ 18] = { /* code 006F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0070[ 18] = { /* code 0070 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x60, 0x60,
|
||||
0x60, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0071[ 18] = { /* code 0071 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x3E, 0x06, 0x06,
|
||||
0x06, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0072[ 12] = { /* code 0072 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x0F, 0x63, 0x18, 0xC6,
|
||||
0x30, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0073[ 14] = { /* code 0073 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x61, 0xC3,
|
||||
0x86, 0x19, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0074[ 12] = { /* code 0074 */
|
||||
0x00, 0x00, 0x00, 0x31, 0x9F, 0x63, 0x18, 0xC6,
|
||||
0x1C, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0075[ 18] = { /* code 0075 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x3E, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0076[ 16] = { /* code 0076 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0xC6,
|
||||
0xD9, 0xB3, 0x63, 0x87, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0077[ 25] = { /* code 0077 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x06, 0x23, 0xCE, 0x6D, 0xD9, 0xAB, 0x3D,
|
||||
0xE3, 0x18, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0078[ 16] = { /* code 0078 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x6C,
|
||||
0xD8, 0xE3, 0x66, 0xD8, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0079[ 16] = { /* code 0079 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0xC6,
|
||||
0xD9, 0xB3, 0x63, 0x87, 0x06, 0x18, 0x30, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_007A[ 14] = { /* code 007A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x18, 0xC3,
|
||||
0x0C, 0x61, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_007B[ 12] = { /* code 007B */
|
||||
0x00, 0x00, 0x66, 0x31, 0x8C, 0x66, 0x18, 0xC6,
|
||||
0x31, 0x86, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_007C[ 16] = { /* code 007C */
|
||||
0x00, 0x00, 0x01, 0x83, 0x06, 0x0C, 0x18, 0x30,
|
||||
0x60, 0xC1, 0x83, 0x06, 0x0C, 0x18, 0x30, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_007D[ 12] = { /* code 007D */
|
||||
0x00, 0x00, 0xC3, 0x18, 0xC6, 0x30, 0xCC, 0x63,
|
||||
0x18, 0xCC, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_00E7[ 14] = { /* code 00E7 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x65, 0x86,
|
||||
0x18, 0x64, 0xE1, 0x02, 0x30, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_00F1[ 18] = { /* code 00F1 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x1A, 0x2C, 0x00, 0x7C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0438[ 18] = { /* code 0438 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63,
|
||||
0x67, 0x6F, 0x7B, 0x7B, 0x73, 0x63, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0439[ 18] = { /* code 0439 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x36, 0x1C, 0x00, 0x63,
|
||||
0x67, 0x6F, 0x7B, 0x7B, 0x73, 0x63, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_043A[ 16] = { /* code 043A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x66,
|
||||
0xD9, 0xE3, 0x66, 0x6C, 0xC0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0441[ 14] = { /* code 0441 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x65, 0x86,
|
||||
0x18, 0x64, 0xE0, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_0443[ 16] = { /* code 0443 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x6C,
|
||||
0xD9, 0xB1, 0x43, 0x87, 0x04, 0x18, 0x30, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic11_18h_2126[ 23] = { /* code 2126 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xC3,
|
||||
0x19, 0x83, 0x60, 0xD8, 0x36, 0x0D, 0x83, 0x31,
|
||||
0x9E, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const BFC_CHARINFO fontCalibriBoldBasic11_18h_CharInfo[103] = {
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_000A} }, /* code 000A */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_000D} }, /* code 000D */
|
||||
{ 3, 7, {abc_fontCalibriBoldBasic11_18h_0020} }, /* code 0020 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_0021} }, /* code 0021 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0022} }, /* code 0022 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0023} }, /* code 0023 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0024} }, /* code 0024 */
|
||||
{ 11, 25, {abc_fontCalibriBoldBasic11_18h_0025} }, /* code 0025 */
|
||||
{ 11, 25, {abc_fontCalibriBoldBasic11_18h_0026} }, /* code 0026 */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_0027} }, /* code 0027 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_0028} }, /* code 0028 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_0029} }, /* code 0029 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_002A} }, /* code 002A */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_002B} }, /* code 002B */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_002C} }, /* code 002C */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_002D} }, /* code 002D */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_002E} }, /* code 002E */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_002F} }, /* code 002F */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0030} }, /* code 0030 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0031} }, /* code 0031 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0032} }, /* code 0032 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0033} }, /* code 0033 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0034} }, /* code 0034 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0035} }, /* code 0035 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0036} }, /* code 0036 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0037} }, /* code 0037 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0038} }, /* code 0038 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0039} }, /* code 0039 */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_003A} }, /* code 003A */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_003B} }, /* code 003B */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_003C} }, /* code 003C */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_003D} }, /* code 003D */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_003E} }, /* code 003E */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_003F} }, /* code 003F */
|
||||
{ 13, 30, {abc_fontCalibriBoldBasic11_18h_0040} }, /* code 0040 */
|
||||
{ 9, 21, {abc_fontCalibriBoldBasic11_18h_0041} }, /* code 0041 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0042} }, /* code 0042 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0043} }, /* code 0043 */
|
||||
{ 9, 21, {abc_fontCalibriBoldBasic11_18h_0044} }, /* code 0044 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0045} }, /* code 0045 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0046} }, /* code 0046 */
|
||||
{ 10, 23, {abc_fontCalibriBoldBasic11_18h_0047} }, /* code 0047 */
|
||||
{ 9, 21, {abc_fontCalibriBoldBasic11_18h_0048} }, /* code 0048 */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_0049} }, /* code 0049 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_004A} }, /* code 004A */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_004B} }, /* code 004B */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_004C} }, /* code 004C */
|
||||
{ 13, 30, {abc_fontCalibriBoldBasic11_18h_004D} }, /* code 004D */
|
||||
{ 10, 23, {abc_fontCalibriBoldBasic11_18h_004E} }, /* code 004E */
|
||||
{ 10, 23, {abc_fontCalibriBoldBasic11_18h_004F} }, /* code 004F */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0050} }, /* code 0050 */
|
||||
{ 10, 23, {abc_fontCalibriBoldBasic11_18h_0051} }, /* code 0051 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0052} }, /* code 0052 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0053} }, /* code 0053 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0054} }, /* code 0054 */
|
||||
{ 10, 23, {abc_fontCalibriBoldBasic11_18h_0055} }, /* code 0055 */
|
||||
{ 9, 21, {abc_fontCalibriBoldBasic11_18h_0056} }, /* code 0056 */
|
||||
{ 14, 32, {abc_fontCalibriBoldBasic11_18h_0057} }, /* code 0057 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0058} }, /* code 0058 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0059} }, /* code 0059 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_005A} }, /* code 005A */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_005B} }, /* code 005B */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_005C} }, /* code 005C */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_005D} }, /* code 005D */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_005E} }, /* code 005E */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_005F} }, /* code 005F */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0061} }, /* code 0061 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0062} }, /* code 0062 */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_0063} }, /* code 0063 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0064} }, /* code 0064 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0065} }, /* code 0065 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_0066} }, /* code 0066 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0067} }, /* code 0067 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0068} }, /* code 0068 */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_0069} }, /* code 0069 */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_006A} }, /* code 006A */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_006B} }, /* code 006B */
|
||||
{ 4, 9, {abc_fontCalibriBoldBasic11_18h_006C} }, /* code 006C */
|
||||
{ 12, 27, {abc_fontCalibriBoldBasic11_18h_006D} }, /* code 006D */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_006E} }, /* code 006E */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_006F} }, /* code 006F */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0070} }, /* code 0070 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0071} }, /* code 0071 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_0072} }, /* code 0072 */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_0073} }, /* code 0073 */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_0074} }, /* code 0074 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0075} }, /* code 0075 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0076} }, /* code 0076 */
|
||||
{ 11, 25, {abc_fontCalibriBoldBasic11_18h_0077} }, /* code 0077 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0078} }, /* code 0078 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0079} }, /* code 0079 */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_007A} }, /* code 007A */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_007B} }, /* code 007B */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_007C} }, /* code 007C */
|
||||
{ 5, 12, {abc_fontCalibriBoldBasic11_18h_007D} }, /* code 007D */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_00E7} }, /* code 00E7 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_00F1} }, /* code 00F1 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0438} }, /* code 0438 */
|
||||
{ 8, 18, {abc_fontCalibriBoldBasic11_18h_0439} }, /* code 0439 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_043A} }, /* code 043A */
|
||||
{ 6, 14, {abc_fontCalibriBoldBasic11_18h_0441} }, /* code 0441 */
|
||||
{ 7, 16, {abc_fontCalibriBoldBasic11_18h_0443} }, /* code 0443 */
|
||||
{ 10, 23, {abc_fontCalibriBoldBasic11_18h_2126} } /* code 2126 */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop10 = {
|
||||
0x2126, /* first character */
|
||||
0x2126, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 102], /* address of first character */
|
||||
(const BFC_FONT_PROP *)0 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop9 = {
|
||||
0x0443, /* first character */
|
||||
0x0443, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 101], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop10 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop8 = {
|
||||
0x0441, /* first character */
|
||||
0x0441, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 100], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop9 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop7 = {
|
||||
0x0438, /* first character */
|
||||
0x043A, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 97], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop8 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop6 = {
|
||||
0x00F1, /* first character */
|
||||
0x00F1, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 96], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop7 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop5 = {
|
||||
0x00E7, /* first character */
|
||||
0x00E7, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 95], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop6 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop4 = {
|
||||
0x0061, /* first character */
|
||||
0x007D, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 66], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop5 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop3 = {
|
||||
0x0020, /* first character */
|
||||
0x005F, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 2], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop4 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop2 = {
|
||||
0x000D, /* first character */
|
||||
0x000D, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 1], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop3 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic11_18h_Prop1 = {
|
||||
0x000A, /* first character */
|
||||
0x000A, /* last character */
|
||||
&fontCalibriBoldBasic11_18h_CharInfo[ 0], /* address of first character */
|
||||
&fontCalibriBoldBasic11_18h_Prop2 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT fontCalibriBoldBasic11_18h = {
|
||||
0x01020802, /* font type = FONTTYPE_PROP | DATA_PACKED | ENCODING_UNICODE | DATALENGTH_8 */
|
||||
18, /* font height in pixels */
|
||||
14, /* font ascent (baseline) in pixels */
|
||||
0 , /* reversed, =0 */
|
||||
{&fontCalibriBoldBasic11_18h_Prop1}
|
||||
};
|
||||
2220
source/Fonts/CalibriBoldBasic12_19h.c
Normal file
2220
source/Fonts/CalibriBoldBasic12_19h.c
Normal file
File diff suppressed because it is too large
Load Diff
912
source/Fonts/CalibriBoldBasic14_23h.c
Normal file
912
source/Fonts/CalibriBoldBasic14_23h.c
Normal file
@@ -0,0 +1,912 @@
|
||||
/*******************************************************************************
|
||||
* *
|
||||
* This file is generated by BitFontCreator Pro v3.8 *
|
||||
* by Iseatech Software http://www.iseasoft.com/bitfontcreator.html *
|
||||
* support@iseasoft.com *
|
||||
* *
|
||||
* Font name: Calibri *
|
||||
* Font width: 0 (proportional font) *
|
||||
* Font height: 23 *
|
||||
* Encode: Unicode *
|
||||
* Data length: 8 bits *
|
||||
* Invert bits: No *
|
||||
* Data format: Big Endian, Row based, Row preferred, Packed *
|
||||
* *
|
||||
* Create time: 17:16 04-07-2023 *
|
||||
*******************************************************************************/
|
||||
|
||||
#include "bfcfont.h"
|
||||
|
||||
/* The following line needs to be included in any file selecting the
|
||||
font.
|
||||
*/
|
||||
extern const BFC_FONT fontCalibriBoldBasic14_23h;
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_000A[ 29] = { /* code 000A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F,
|
||||
0xFA, 0x02, 0xBC, 0xA1, 0xA8, 0x6A, 0x1A, 0x9C,
|
||||
0xA0, 0x29, 0x8A, 0x62, 0x80, 0xBF, 0xE0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_000D[ 29] = { /* code 000D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0020[ 12] = { /* code 0020 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0021[ 18] = { /* code 0021 */
|
||||
0x00, 0x00, 0x00, 0x00, 0xC3, 0x0C, 0x30, 0xC3,
|
||||
0x0C, 0x30, 0xC3, 0x00, 0x30, 0xC0, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0022[ 23] = { /* code 0022 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x6C, 0x6C,
|
||||
0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0023[ 26] = { /* code 0023 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC,
|
||||
0x66, 0x33, 0x7F, 0xFF, 0xE6, 0x66, 0x67, 0xFF,
|
||||
0xFE, 0xCC, 0x66, 0x33, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0024[ 29] = { /* code 0024 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x01, 0x81,
|
||||
0xF0, 0xFE, 0x60, 0x98, 0x07, 0x00, 0xF0, 0x0F,
|
||||
0x00, 0xE0, 0x19, 0x06, 0x7F, 0x0F, 0x81, 0x80,
|
||||
0x60, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0025[ 41] = { /* code 0025 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x07, 0x83, 0x33, 0x18, 0xCC, 0x63,
|
||||
0x33, 0x0C, 0xD8, 0x1E, 0xC0, 0x03, 0x78, 0x1B,
|
||||
0x30, 0xCC, 0xC6, 0x33, 0x18, 0xCC, 0xC1, 0xE0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0026[ 38] = { /* code 0026 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x0F, 0x80, 0xFE, 0x06, 0x30, 0x31, 0x81, 0xDC,
|
||||
0x07, 0xC0, 0x7C, 0x67, 0x73, 0x31, 0xD9, 0x87,
|
||||
0x8E, 0x1C, 0x3F, 0xF8, 0xF8, 0xC0, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0027[ 12] = { /* code 0027 */
|
||||
0x00, 0x00, 0x06, 0x66, 0x66, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0028[ 18] = { /* code 0028 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x63, 0x0C, 0x31, 0x86,
|
||||
0x18, 0x61, 0x86, 0x18, 0x60, 0xC3, 0x0C, 0x18,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0029[ 18] = { /* code 0029 */
|
||||
0x00, 0x00, 0x00, 0x01, 0x83, 0x0C, 0x30, 0x61,
|
||||
0x86, 0x18, 0x61, 0x86, 0x18, 0xC3, 0x0C, 0x60,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_002A[ 26] = { /* code 002A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC1, 0x68,
|
||||
0xEC, 0x18, 0x3B, 0x16, 0x83, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_002B[ 26] = { /* code 002B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x0C, 0x06, 0x03, 0x0F, 0xF7, 0xF8,
|
||||
0x60, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_002C[ 15] = { /* code 002C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x31, 0x8C, 0xC6, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_002D[ 18] = { /* code 002D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x79, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_002E[ 15] = { /* code 002E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x63, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_002F[ 23] = { /* code 002F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x06, 0x06,
|
||||
0x06, 0x0C, 0x0C, 0x18, 0x18, 0x18, 0x30, 0x30,
|
||||
0x60, 0x60, 0x60, 0xC0, 0xC0, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0030[ 29] = { /* code 0030 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
|
||||
0xE0, 0xFC, 0x73, 0x98, 0x66, 0x19, 0x86, 0x61,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x3F, 0x07, 0x80, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0031[ 29] = { /* code 0031 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC0, 0xF0, 0x7C, 0x13, 0x00, 0xC0, 0x30, 0x0C,
|
||||
0x03, 0x00, 0xC0, 0x30, 0x7F, 0x9F, 0xE0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0032[ 29] = { /* code 0032 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
|
||||
0xE1, 0xFC, 0x43, 0x00, 0xC0, 0x30, 0x18, 0x06,
|
||||
0x03, 0x01, 0x80, 0xC0, 0x7F, 0x9F, 0xE0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0033[ 29] = { /* code 0033 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
|
||||
0xE1, 0xFC, 0x43, 0x00, 0xC0, 0x30, 0xF8, 0x3E,
|
||||
0x00, 0xC0, 0x31, 0x0C, 0x7F, 0x0F, 0x80, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0034[ 29] = { /* code 0034 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x70, 0x3C, 0x0B, 0x06, 0xC3, 0x30, 0xCC, 0x63,
|
||||
0x1F, 0xE7, 0xF8, 0x0C, 0x03, 0x00, 0xC0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0035[ 29] = { /* code 0035 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
|
||||
0xF1, 0xFC, 0x60, 0x18, 0x07, 0xE1, 0xFC, 0x03,
|
||||
0x80, 0x60, 0x19, 0x0E, 0x7F, 0x0F, 0x80, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0036[ 29] = { /* code 0036 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xF0, 0xFC, 0x30, 0x18, 0x06, 0xE1, 0xFC, 0x73,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x3F, 0x07, 0x80, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0037[ 29] = { /* code 0037 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
|
||||
0xF9, 0xFE, 0x01, 0x80, 0xC0, 0x30, 0x18, 0x0E,
|
||||
0x03, 0x01, 0xC0, 0x60, 0x38, 0x0C, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0038[ 29] = { /* code 0038 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
|
||||
0xF1, 0xFE, 0x61, 0x98, 0x67, 0x30, 0xF8, 0x1F,
|
||||
0x0C, 0xE6, 0x19, 0x86, 0x7F, 0x8F, 0xC0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0039[ 29] = { /* code 0039 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
|
||||
0xE0, 0xFC, 0x73, 0x98, 0x66, 0x19, 0xCE, 0x3F,
|
||||
0x87, 0x60, 0x18, 0x0C, 0x7F, 0x1F, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_003A[ 15] = { /* code 003A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0xC0,
|
||||
0x00, 0x00, 0x63, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_003B[ 15] = { /* code 003B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0xC0,
|
||||
0x00, 0x00, 0x63, 0x19, 0x8C, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_003C[ 26] = { /* code 003C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x01, 0x03, 0x87, 0x8F, 0x06, 0x03, 0xC0,
|
||||
0x78, 0x0E, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_003D[ 26] = { /* code 003D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x3F, 0xDF, 0xE0, 0x00, 0x03,
|
||||
0xFD, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_003E[ 26] = { /* code 003E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x40, 0x38, 0x0F, 0x01, 0xE0, 0x30, 0x78,
|
||||
0xF0, 0xE0, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_003F[ 26] = { /* code 003F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xE1, 0xF8,
|
||||
0x8E, 0x03, 0x01, 0x81, 0xC3, 0xC1, 0x80, 0xC0,
|
||||
0x00, 0x30, 0x18, 0x0C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0040[ 49] = { /* code 0040 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0xE0, 0x1F,
|
||||
0xFC, 0x1C, 0x06, 0x1C, 0xD9, 0x8C, 0xFC, 0xCC,
|
||||
0xCE, 0x66, 0x66, 0x33, 0x33, 0x39, 0x9F, 0xF8,
|
||||
0xC7, 0x78, 0x70, 0x00, 0x1C, 0x08, 0x07, 0xFC,
|
||||
0x01, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0041[ 35] = { /* code 0041 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x0E, 0x00, 0xE0, 0x1B, 0x01, 0xB0, 0x1B,
|
||||
0x03, 0x18, 0x31, 0x87, 0xFC, 0x7F, 0xC6, 0x0C,
|
||||
0xC0, 0x6C, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0042[ 32] = { /* code 0042 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x1F, 0xE3, 0xFE, 0x60, 0xCC, 0x19, 0x83, 0x3F,
|
||||
0xC7, 0xFC, 0xC1, 0x98, 0x33, 0x06, 0x7F, 0xCF,
|
||||
0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0043[ 29] = { /* code 0043 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xF8, 0xFF, 0x30, 0x58, 0x06, 0x01, 0x80, 0x60,
|
||||
0x18, 0x06, 0x00, 0xC1, 0x3F, 0xC3, 0xE0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0044[ 35] = { /* code 0044 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x7F, 0x07, 0xFC, 0x60, 0xC6, 0x06, 0x60,
|
||||
0x66, 0x06, 0x60, 0x66, 0x06, 0x60, 0x66, 0x0C,
|
||||
0x7F, 0xC7, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0045[ 26] = { /* code 0045 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xFC,
|
||||
0xFE, 0x60, 0x30, 0x18, 0x0F, 0xC7, 0xE3, 0x01,
|
||||
0x80, 0xC0, 0x7F, 0x3F, 0x80, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0046[ 26] = { /* code 0046 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xFC,
|
||||
0xFE, 0x60, 0x30, 0x18, 0x0F, 0xC7, 0xE3, 0x01,
|
||||
0x80, 0xC0, 0x60, 0x30, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0047[ 35] = { /* code 0047 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x0F, 0xC3, 0xFE, 0x30, 0x26, 0x00, 0x60,
|
||||
0x06, 0x3E, 0x63, 0xE6, 0x06, 0x60, 0x63, 0x06,
|
||||
0x3F, 0xE0, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0048[ 35] = { /* code 0048 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x60, 0x66, 0x06, 0x60, 0x66, 0x06, 0x60,
|
||||
0x67, 0xFE, 0x7F, 0xE6, 0x06, 0x60, 0x66, 0x06,
|
||||
0x60, 0x66, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0049[ 15] = { /* code 0049 */
|
||||
0x00, 0x00, 0x00, 0x01, 0x8C, 0x63, 0x18, 0xC6,
|
||||
0x31, 0x8C, 0x63, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_004A[ 18] = { /* code 004A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0x86, 0x18, 0x61,
|
||||
0x86, 0x18, 0x61, 0xA6, 0xF9, 0xC0, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_004B[ 29] = { /* code 004B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06,
|
||||
0x0D, 0x87, 0x63, 0x99, 0xC6, 0xE1, 0xF0, 0x7C,
|
||||
0x1B, 0x86, 0x71, 0x9C, 0x63, 0x98, 0x70, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_004C[ 23] = { /* code 004C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x60,
|
||||
0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60,
|
||||
0x7F, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_004D[ 49] = { /* code 004D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0xC0, 0x38, 0xE0,
|
||||
0x1C, 0x78, 0x1E, 0x3C, 0x0F, 0x1B, 0x0D, 0x8D,
|
||||
0x86, 0xC6, 0x66, 0x63, 0x33, 0x31, 0x8F, 0x18,
|
||||
0xC7, 0x8C, 0x61, 0x86, 0x30, 0xC3, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_004E[ 38] = { /* code 004E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x01, 0xC0, 0xCF, 0x06, 0x78, 0x33, 0x61,
|
||||
0x9B, 0x8C, 0xCC, 0x66, 0x33, 0x31, 0xD9, 0x86,
|
||||
0xCC, 0x1E, 0x60, 0xF3, 0x03, 0x80, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_004F[ 38] = { /* code 004F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x3E, 0x07, 0xFC, 0x30, 0x63, 0x01,
|
||||
0x98, 0x0C, 0xC0, 0x66, 0x03, 0x30, 0x19, 0x80,
|
||||
0xC6, 0x0C, 0x3F, 0xE0, 0x7C, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0050[ 29] = { /* code 0050 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
|
||||
0xE1, 0xFC, 0x63, 0x98, 0x66, 0x19, 0x8E, 0x7F,
|
||||
0x1F, 0x86, 0x01, 0x80, 0x60, 0x18, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0051[ 38] = { /* code 0051 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x3E, 0x07, 0xFC, 0x30, 0x63, 0x01,
|
||||
0x98, 0x0C, 0xC0, 0x66, 0x03, 0x30, 0x19, 0x80,
|
||||
0xC6, 0x0C, 0x3F, 0xC0, 0x7F, 0x00, 0x1E, 0x00,
|
||||
0x30, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0052[ 32] = { /* code 0052 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x1F, 0xC3, 0xFC, 0x61, 0x8C, 0x31, 0x86, 0x3F,
|
||||
0x87, 0xE0, 0xC6, 0x18, 0x63, 0x0C, 0x60, 0xCC,
|
||||
0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0053[ 26] = { /* code 0053 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78,
|
||||
0x7E, 0x61, 0x30, 0x1C, 0x07, 0x81, 0xE0, 0x38,
|
||||
0x0C, 0x86, 0x7E, 0x1E, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0054[ 26] = { /* code 0054 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xFD,
|
||||
0xFE, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x80, 0xC0,
|
||||
0x60, 0x30, 0x18, 0x0C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0055[ 35] = { /* code 0055 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x60, 0x66, 0x06, 0x60, 0x66, 0x06, 0x60,
|
||||
0x66, 0x06, 0x60, 0x66, 0x06, 0x60, 0x67, 0x0E,
|
||||
0x3F, 0xC1, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0056[ 32] = { /* code 0056 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x30, 0x1E, 0x03, 0x60, 0xCC, 0x19, 0x83, 0x18,
|
||||
0xC3, 0x18, 0x36, 0x06, 0xC0, 0xD8, 0x0E, 0x01,
|
||||
0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0057[ 49] = { /* code 0057 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0x82, 0x0C, 0xC3,
|
||||
0x86, 0x61, 0xC3, 0x18, 0xE3, 0x0C, 0xD9, 0x86,
|
||||
0x6C, 0xC1, 0xB6, 0xC0, 0xF1, 0xE0, 0x78, 0xF0,
|
||||
0x1C, 0x70, 0x0C, 0x18, 0x06, 0x0C, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0058[ 29] = { /* code 0058 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C,
|
||||
0x19, 0x8C, 0x63, 0x0D, 0x83, 0x60, 0x70, 0x1C,
|
||||
0x0D, 0x83, 0x61, 0x8C, 0x63, 0x30, 0x60, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0059[ 29] = { /* code 0059 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06,
|
||||
0x19, 0x86, 0x33, 0x0C, 0xC1, 0xE0, 0x78, 0x0C,
|
||||
0x03, 0x00, 0xC0, 0x30, 0x0C, 0x03, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_005A[ 26] = { /* code 005A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xFF,
|
||||
0xFF, 0x03, 0x83, 0x83, 0x83, 0x81, 0x81, 0xC1,
|
||||
0xC1, 0xC0, 0xFF, 0xFF, 0xC0, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_005B[ 18] = { /* code 005B */
|
||||
0x00, 0x00, 0x00, 0x01, 0xE7, 0x98, 0x61, 0x86,
|
||||
0x18, 0x61, 0x86, 0x18, 0x61, 0x86, 0x1E, 0x78,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_005C[ 23] = { /* code 005C */
|
||||
0x00, 0x00, 0x00, 0x00, 0xC0, 0xC0, 0x60, 0x60,
|
||||
0x60, 0x30, 0x30, 0x18, 0x18, 0x18, 0x0C, 0x0C,
|
||||
0x06, 0x06, 0x06, 0x03, 0x03, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_005D[ 18] = { /* code 005D */
|
||||
0x00, 0x00, 0x00, 0x01, 0xE7, 0x86, 0x18, 0x61,
|
||||
0x86, 0x18, 0x61, 0x86, 0x18, 0x61, 0x9E, 0x78,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_005E[ 26] = { /* code 005E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
|
||||
0x7C, 0x36, 0x31, 0x98, 0xD8, 0x3C, 0x18, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_005F[ 26] = { /* code 005F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0xFF, 0xF8,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0061[ 26] = { /* code 0061 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x1F, 0x1F, 0xC8, 0x60, 0x31, 0xF9,
|
||||
0x8C, 0xC6, 0x7F, 0x1D, 0x80, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0062[ 29] = { /* code 0062 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x06,
|
||||
0x01, 0x80, 0x60, 0x1B, 0x87, 0xF1, 0xCE, 0x61,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x7F, 0x1B, 0x80, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0063[ 23] = { /* code 0063 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x1C, 0x3E, 0x72, 0x60, 0x60, 0x60, 0x72,
|
||||
0x3E, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0064[ 29] = { /* code 0064 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60,
|
||||
0x18, 0x06, 0x01, 0x87, 0x63, 0xF9, 0xCE, 0x61,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x3F, 0x87, 0x60, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0065[ 29] = { /* code 0065 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x07, 0x83, 0xF1, 0xCE, 0x61,
|
||||
0x9F, 0xE6, 0x01, 0xC2, 0x3F, 0x87, 0xC0, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0066[ 18] = { /* code 0066 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x73, 0xCC, 0x31, 0xF7,
|
||||
0xCC, 0x30, 0xC3, 0x0C, 0x30, 0xC0, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0067[ 26] = { /* code 0067 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x1F, 0x9F, 0xCC, 0xC6, 0x63, 0xF0,
|
||||
0xF0, 0xC0, 0x7E, 0x7F, 0xB0, 0xDF, 0xE7, 0xC0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0068[ 29] = { /* code 0068 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x06,
|
||||
0x01, 0x80, 0x60, 0x1B, 0xC7, 0xF9, 0xC6, 0x61,
|
||||
0x98, 0x66, 0x19, 0x86, 0x61, 0x98, 0x60, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0069[ 15] = { /* code 0069 */
|
||||
0x00, 0x00, 0x00, 0x01, 0x8C, 0x03, 0x18, 0xC6,
|
||||
0x31, 0x8C, 0x63, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_006A[ 15] = { /* code 006A */
|
||||
0x00, 0x00, 0x00, 0x00, 0xC6, 0x01, 0x8C, 0x63,
|
||||
0x18, 0xC6, 0x31, 0x8D, 0xEE, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_006B[ 26] = { /* code 006B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01, 0x80,
|
||||
0xC0, 0x60, 0x31, 0xD9, 0xCD, 0xC7, 0xC3, 0xE1,
|
||||
0xB8, 0xCE, 0x63, 0xB0, 0xC0, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_006C[ 15] = { /* code 006C */
|
||||
0x00, 0x00, 0x00, 0x31, 0x8C, 0x63, 0x18, 0xC6,
|
||||
0x31, 0x8C, 0x63, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_006D[ 44] = { /* code 006D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xDC, 0xE1, 0xFF, 0xE3, 0x9C, 0xC6, 0x31,
|
||||
0x8C, 0x63, 0x18, 0xC6, 0x31, 0x8C, 0x63, 0x18,
|
||||
0xC6, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_006E[ 29] = { /* code 006E */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x1B, 0xC7, 0xF9, 0xC6, 0x61,
|
||||
0x98, 0x66, 0x19, 0x86, 0x61, 0x98, 0x60, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_006F[ 29] = { /* code 006F */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x07, 0x83, 0xF1, 0xCE, 0x61,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x3F, 0x07, 0x80, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0070[ 29] = { /* code 0070 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x1B, 0x87, 0xF1, 0xCE, 0x61,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x7F, 0x1B, 0x86, 0x01,
|
||||
0x80, 0x60, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0071[ 29] = { /* code 0071 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x07, 0x63, 0xF9, 0xCE, 0x61,
|
||||
0x98, 0x66, 0x19, 0xCE, 0x3F, 0x87, 0x60, 0x18,
|
||||
0x06, 0x01, 0x80, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0072[ 21] = { /* code 0072 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xD9, 0xF3, 0x86, 0x0C, 0x18, 0x30, 0x60, 0xC0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0073[ 23] = { /* code 0073 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x3C, 0x7E, 0x62, 0x70, 0x3C, 0x0E, 0x46,
|
||||
0x7E, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0074[ 21] = { /* code 0074 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x30,
|
||||
0xF9, 0xF1, 0x83, 0x06, 0x0C, 0x18, 0x3C, 0x38,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0075[ 29] = { /* code 0075 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x18, 0x66, 0x19, 0x86, 0x61,
|
||||
0x98, 0x66, 0x19, 0x8E, 0x7F, 0x8F, 0x60, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0076[ 26] = { /* code 0076 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x60, 0xF0, 0x6C, 0x66, 0x33, 0x18,
|
||||
0xD8, 0x6C, 0x1C, 0x0E, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0077[ 41] = { /* code 0077 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
|
||||
0x0C, 0x3C, 0x30, 0xD9, 0xE6, 0x67, 0x99, 0x92,
|
||||
0x63, 0xCF, 0x0F, 0x3C, 0x18, 0x60, 0x61, 0x80,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0078[ 26] = { /* code 0078 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x31, 0x98, 0xC6, 0xC3, 0xE0, 0xE0,
|
||||
0xF8, 0x6C, 0x63, 0x31, 0x80, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0079[ 26] = { /* code 0079 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x60, 0xF0, 0x6C, 0x66, 0x33, 0x18,
|
||||
0xD8, 0x6C, 0x1C, 0x06, 0x03, 0x03, 0x01, 0x80,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_007A[ 23] = { /* code 007A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x7E, 0x7E, 0x06, 0x0C, 0x18, 0x30, 0x60,
|
||||
0x7E, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_007B[ 21] = { /* code 007B */
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0xC7, 0x8C, 0x18,
|
||||
0x30, 0x60, 0xC7, 0x0E, 0x06, 0x0C, 0x18, 0x30,
|
||||
0x60, 0xF0, 0xE0, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_007C[ 26] = { /* code 007C */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x60,
|
||||
0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x80, 0xC0,
|
||||
0x60, 0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x80,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_007D[ 21] = { /* code 007D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x1C, 0x3C, 0x18, 0x30,
|
||||
0x60, 0xC1, 0x81, 0xC3, 0x8C, 0x18, 0x30, 0x60,
|
||||
0xC7, 0x8E, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_00E7[ 23] = { /* code 00E7 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x1C, 0x3E, 0x72, 0x60, 0x60, 0x60, 0x72,
|
||||
0x3E, 0x1C, 0x0C, 0x3C, 0x38, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_00F1[ 29] = { /* code 00F1 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x43,
|
||||
0xF0, 0x98, 0x00, 0x1B, 0xC7, 0xF9, 0xC6, 0x61,
|
||||
0x98, 0x66, 0x19, 0x86, 0x61, 0x98, 0x60, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0438[ 32] = { /* code 0438 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x0C, 0x31, 0x8E, 0x33,
|
||||
0xC6, 0xF8, 0xDB, 0x1E, 0x63, 0xCC, 0x71, 0x8C,
|
||||
0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0439[ 32] = { /* code 0439 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63,
|
||||
0x0F, 0xE0, 0xF8, 0x00, 0x0C, 0x31, 0x8E, 0x33,
|
||||
0xC6, 0xF8, 0xDB, 0x1E, 0x63, 0xCC, 0x71, 0x8C,
|
||||
0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_043A[ 26] = { /* code 043A */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x30, 0xD8, 0xCC, 0xE7, 0xE3, 0xF1,
|
||||
0x9C, 0xC6, 0x63, 0xB0, 0xC0, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0441[ 23] = { /* code 0441 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x1E, 0x3F, 0x71, 0x60, 0x60, 0x60, 0x71,
|
||||
0x3F, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_0443[ 26] = { /* code 0443 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x61, 0xD8, 0xCC, 0x67, 0x71, 0xB0,
|
||||
0xD8, 0x7C, 0x1C, 0x0E, 0x07, 0x03, 0x81, 0xC0,
|
||||
0x00, 0x00
|
||||
};
|
||||
|
||||
const UCHAR abc_fontCalibriBoldBasic14_23h_2126[ 38] = { /* code 2126 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x3E, 0x03, 0xFC, 0x38, 0x63, 0x81,
|
||||
0x98, 0x0C, 0xC0, 0x66, 0x03, 0x30, 0x18, 0xC1,
|
||||
0x87, 0x1C, 0x7D, 0xF3, 0xEF, 0x80, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const BFC_CHARINFO fontCalibriBoldBasic14_23h_CharInfo[103] = {
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_000A} }, /* code 000A */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_000D} }, /* code 000D */
|
||||
{ 4, 12, {abc_fontCalibriBoldBasic14_23h_0020} }, /* code 0020 */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_0021} }, /* code 0021 */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_0022} }, /* code 0022 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0023} }, /* code 0023 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0024} }, /* code 0024 */
|
||||
{ 14, 41, {abc_fontCalibriBoldBasic14_23h_0025} }, /* code 0025 */
|
||||
{ 13, 38, {abc_fontCalibriBoldBasic14_23h_0026} }, /* code 0026 */
|
||||
{ 4, 12, {abc_fontCalibriBoldBasic14_23h_0027} }, /* code 0027 */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_0028} }, /* code 0028 */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_0029} }, /* code 0029 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_002A} }, /* code 002A */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_002B} }, /* code 002B */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_002C} }, /* code 002C */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_002D} }, /* code 002D */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_002E} }, /* code 002E */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_002F} }, /* code 002F */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0030} }, /* code 0030 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0031} }, /* code 0031 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0032} }, /* code 0032 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0033} }, /* code 0033 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0034} }, /* code 0034 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0035} }, /* code 0035 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0036} }, /* code 0036 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0037} }, /* code 0037 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0038} }, /* code 0038 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0039} }, /* code 0039 */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_003A} }, /* code 003A */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_003B} }, /* code 003B */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_003C} }, /* code 003C */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_003D} }, /* code 003D */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_003E} }, /* code 003E */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_003F} }, /* code 003F */
|
||||
{ 17, 49, {abc_fontCalibriBoldBasic14_23h_0040} }, /* code 0040 */
|
||||
{ 12, 35, {abc_fontCalibriBoldBasic14_23h_0041} }, /* code 0041 */
|
||||
{ 11, 32, {abc_fontCalibriBoldBasic14_23h_0042} }, /* code 0042 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0043} }, /* code 0043 */
|
||||
{ 12, 35, {abc_fontCalibriBoldBasic14_23h_0044} }, /* code 0044 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0045} }, /* code 0045 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0046} }, /* code 0046 */
|
||||
{ 12, 35, {abc_fontCalibriBoldBasic14_23h_0047} }, /* code 0047 */
|
||||
{ 12, 35, {abc_fontCalibriBoldBasic14_23h_0048} }, /* code 0048 */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_0049} }, /* code 0049 */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_004A} }, /* code 004A */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_004B} }, /* code 004B */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_004C} }, /* code 004C */
|
||||
{ 17, 49, {abc_fontCalibriBoldBasic14_23h_004D} }, /* code 004D */
|
||||
{ 13, 38, {abc_fontCalibriBoldBasic14_23h_004E} }, /* code 004E */
|
||||
{ 13, 38, {abc_fontCalibriBoldBasic14_23h_004F} }, /* code 004F */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0050} }, /* code 0050 */
|
||||
{ 13, 38, {abc_fontCalibriBoldBasic14_23h_0051} }, /* code 0051 */
|
||||
{ 11, 32, {abc_fontCalibriBoldBasic14_23h_0052} }, /* code 0052 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0053} }, /* code 0053 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0054} }, /* code 0054 */
|
||||
{ 12, 35, {abc_fontCalibriBoldBasic14_23h_0055} }, /* code 0055 */
|
||||
{ 11, 32, {abc_fontCalibriBoldBasic14_23h_0056} }, /* code 0056 */
|
||||
{ 17, 49, {abc_fontCalibriBoldBasic14_23h_0057} }, /* code 0057 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0058} }, /* code 0058 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0059} }, /* code 0059 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_005A} }, /* code 005A */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_005B} }, /* code 005B */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_005C} }, /* code 005C */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_005D} }, /* code 005D */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_005E} }, /* code 005E */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_005F} }, /* code 005F */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0061} }, /* code 0061 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0062} }, /* code 0062 */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_0063} }, /* code 0063 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0064} }, /* code 0064 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0065} }, /* code 0065 */
|
||||
{ 6, 18, {abc_fontCalibriBoldBasic14_23h_0066} }, /* code 0066 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0067} }, /* code 0067 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0068} }, /* code 0068 */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_0069} }, /* code 0069 */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_006A} }, /* code 006A */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_006B} }, /* code 006B */
|
||||
{ 5, 15, {abc_fontCalibriBoldBasic14_23h_006C} }, /* code 006C */
|
||||
{ 15, 44, {abc_fontCalibriBoldBasic14_23h_006D} }, /* code 006D */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_006E} }, /* code 006E */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_006F} }, /* code 006F */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0070} }, /* code 0070 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0071} }, /* code 0071 */
|
||||
{ 7, 21, {abc_fontCalibriBoldBasic14_23h_0072} }, /* code 0072 */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_0073} }, /* code 0073 */
|
||||
{ 7, 21, {abc_fontCalibriBoldBasic14_23h_0074} }, /* code 0074 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_0075} }, /* code 0075 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0076} }, /* code 0076 */
|
||||
{ 14, 41, {abc_fontCalibriBoldBasic14_23h_0077} }, /* code 0077 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0078} }, /* code 0078 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0079} }, /* code 0079 */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_007A} }, /* code 007A */
|
||||
{ 7, 21, {abc_fontCalibriBoldBasic14_23h_007B} }, /* code 007B */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_007C} }, /* code 007C */
|
||||
{ 7, 21, {abc_fontCalibriBoldBasic14_23h_007D} }, /* code 007D */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_00E7} }, /* code 00E7 */
|
||||
{ 10, 29, {abc_fontCalibriBoldBasic14_23h_00F1} }, /* code 00F1 */
|
||||
{ 11, 32, {abc_fontCalibriBoldBasic14_23h_0438} }, /* code 0438 */
|
||||
{ 11, 32, {abc_fontCalibriBoldBasic14_23h_0439} }, /* code 0439 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_043A} }, /* code 043A */
|
||||
{ 8, 23, {abc_fontCalibriBoldBasic14_23h_0441} }, /* code 0441 */
|
||||
{ 9, 26, {abc_fontCalibriBoldBasic14_23h_0443} }, /* code 0443 */
|
||||
{ 13, 38, {abc_fontCalibriBoldBasic14_23h_2126} } /* code 2126 */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop10 = {
|
||||
0x2126, /* first character */
|
||||
0x2126, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 102], /* address of first character */
|
||||
(const BFC_FONT_PROP *)0 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop9 = {
|
||||
0x0443, /* first character */
|
||||
0x0443, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 101], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop10 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop8 = {
|
||||
0x0441, /* first character */
|
||||
0x0441, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 100], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop9 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop7 = {
|
||||
0x0438, /* first character */
|
||||
0x043A, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 97], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop8 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop6 = {
|
||||
0x00F1, /* first character */
|
||||
0x00F1, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 96], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop7 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop5 = {
|
||||
0x00E7, /* first character */
|
||||
0x00E7, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 95], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop6 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop4 = {
|
||||
0x0061, /* first character */
|
||||
0x007D, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 66], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop5 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop3 = {
|
||||
0x0020, /* first character */
|
||||
0x005F, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 2], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop4 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop2 = {
|
||||
0x000D, /* first character */
|
||||
0x000D, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 1], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop3 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT_PROP fontCalibriBoldBasic14_23h_Prop1 = {
|
||||
0x000A, /* first character */
|
||||
0x000A, /* last character */
|
||||
&fontCalibriBoldBasic14_23h_CharInfo[ 0], /* address of first character */
|
||||
&fontCalibriBoldBasic14_23h_Prop2 /* pointer to next BFC_FONT_PROP */
|
||||
};
|
||||
|
||||
const BFC_FONT fontCalibriBoldBasic14_23h = {
|
||||
0x01020802, /* font type = FONTTYPE_PROP | DATA_PACKED | ENCODING_UNICODE | DATALENGTH_8 */
|
||||
23, /* font height in pixels */
|
||||
18, /* font ascent (baseline) in pixels */
|
||||
0 , /* reversed, =0 */
|
||||
{&fontCalibriBoldBasic14_23h_Prop1}
|
||||
};
|
||||
1005
source/Fonts/CalibriBoldBasic16_26h.c
Normal file
1005
source/Fonts/CalibriBoldBasic16_26h.c
Normal file
File diff suppressed because it is too large
Load Diff
1107
source/Fonts/CalibriBoldBasic18_29h.c
Normal file
1107
source/Fonts/CalibriBoldBasic18_29h.c
Normal file
File diff suppressed because it is too large
Load Diff
1589
source/Fonts/SimSunBold12_19h.c
Normal file
1589
source/Fonts/SimSunBold12_19h.c
Normal file
File diff suppressed because it is too large
Load Diff
137
source/Fonts/bfcfont.h
Normal file
137
source/Fonts/bfcfont.h
Normal file
@@ -0,0 +1,137 @@
|
||||
/****************************************************************************
|
||||
* *
|
||||
* Copyright (c) 2012, Iseatech Software. All rights reserved. *
|
||||
* Internet: http://www.iseasoft.com/bitfontcreator.htm *
|
||||
* Support: support@iseatech.com *
|
||||
* *
|
||||
*****************************************************************************
|
||||
* *
|
||||
* @file bfcfont.h *
|
||||
* @version 0.3.1.0 *
|
||||
* @date Mar-28-2016 *
|
||||
* @brief BitFontCreator (Pro & Grayscale) font header include file *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef _BFC_FONT_H_
|
||||
#define _BFC_FONT_H_
|
||||
|
||||
#define UCHAR unsigned char
|
||||
#define USHORT unsigned short
|
||||
#define ULONG unsigned long
|
||||
|
||||
#define FONTTYPE_MONO (1<<0) /* Is monospaced font */
|
||||
#define FONTTYPE_PROP (1<<1) /* Is proportional font */
|
||||
#define FONTTYPE_MONO_AA2 (1<<2) /* Is an antialiased mono font, 2bpp */
|
||||
#define FONTTYPE_MONO_AA4 (1<<3) /* Is an antialiased mono font, 4bpp */
|
||||
#define FONTTYPE_MONO_AA8 (1<<4) /* Is an antialiased mono font, 8bpp */
|
||||
#define FONTTYPE_PROP_AA2 (1<<5) /* Is an antialiased prop font, 2bpp */
|
||||
#define FONTTYPE_PROP_AA4 (1<<6) /* Is an antialiased prop font, 4bpp */
|
||||
#define FONTTYPE_PROP_AA8 (1<<7) /* Is an antialiased prop font, 8bpp */
|
||||
|
||||
/* the following 4 flags are added since BitFontCreator Pro v3.7 & Grayscale v4.5 */
|
||||
#define LITTLEENDIAN (1<<8) /* Is Little Endian if set, or is Big Endian (default) */ //LITTLE_ENDIAN already defined. 2/9/22 bkb
|
||||
#define COLUMN_BASED (1<<9) /* Is Column if set, or is Row (default) */
|
||||
#define COLUMN_PREFERRED (1<<10) /* Is Column if set, or is Row (default) */
|
||||
#define DATA_PACKED (1<<11) /* Is Packed if set, or is Unpacked (default) */
|
||||
|
||||
#define ENCODING_ASCII (1<<16) /* Character encoding: Ascii + ISO8859 */
|
||||
#define ENCODING_UNICODE (1<<17) /* Character encoding: Unicode */
|
||||
#define ENCODING_SHIFTJIS (1<<18) /* Character encoding: Shift_JIS */
|
||||
#define ENCODING_BIG5 (1<<19) /* Character encoding: Big5 */
|
||||
#define ENCODING_GBK (1<<20) /* Character encoding: GBK */
|
||||
#define ENCODING_JOHAB (1<<21) /* Character encoding: Johab */
|
||||
|
||||
#define DATALENGTH_8 (1<<24) /* Data length: 8 bits per unit (1 byte) */
|
||||
#define DATALENGTH_16 (1<<25) /* Data length: 16 bits per unit (2 bytes) */
|
||||
#define DATALENGTH_32 (1<<26) /* Data length: 32 bits per unit (4 bytes) */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" { /* Make sure we have C-declarations in C++ programs */
|
||||
#endif
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* C font structures
|
||||
**********************************************************************/
|
||||
typedef struct BFC_CHARINFO
|
||||
{
|
||||
USHORT Width; /* character width in pixels */
|
||||
USHORT DataSize; /* # bytes/words/dwords of pixel data */
|
||||
union
|
||||
{
|
||||
const void *pData;
|
||||
const UCHAR *pData8; /* pixel data in bytes */
|
||||
const USHORT *pData16; /* pixel data in words */
|
||||
const ULONG *pData32; /* pixel data in dwords */
|
||||
} p;
|
||||
} BFC_CHARINFO;
|
||||
|
||||
typedef struct BFC_FONT_PROP //proportional font
|
||||
{
|
||||
USHORT FirstChar; /* index of first character */
|
||||
USHORT LastChar; /* index of last character */
|
||||
const BFC_CHARINFO *pFirstCharInfo; /* address of first character */
|
||||
const struct BFC_FONT_PROP *pNextProp; /* pointer to next BFC_FONT_PROP */
|
||||
} BFC_FONT_PROP;
|
||||
|
||||
typedef struct BFC_FONT_MONO //monospace font
|
||||
{
|
||||
USHORT FirstChar; /* index of first character */
|
||||
USHORT LastChar; /* index of last character */
|
||||
USHORT FontWidth; /* font width in pixels */
|
||||
USHORT DataSize; /* # bytes/words/dwords data of single character */
|
||||
union
|
||||
{
|
||||
const void *pData;
|
||||
const UCHAR *pData8; /* pixel data in bytes */
|
||||
const USHORT *pData16; /* pixel data in words */
|
||||
const ULONG *pData32; /* pixel data in dwords */
|
||||
} p;
|
||||
} BFC_FONT_MONO;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
ULONG FontType; /* font type */
|
||||
USHORT FontHeight; /* font height in pixels */
|
||||
USHORT Baseline; /* font ascent (baseline) in pixels */
|
||||
ULONG Reversed; /* reversed, =0 */
|
||||
union
|
||||
{
|
||||
const void * pData;
|
||||
const BFC_FONT_MONO * pMono; /* point to Monospaced font */
|
||||
const BFC_FONT_PROP * pProp; /* point to proportional font */
|
||||
} p;
|
||||
} BFC_FONT;
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* Binary font structures (BIN)
|
||||
**********************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
ULONG FontType; /* font type */
|
||||
USHORT FontHeight; /* font height in pixels */
|
||||
USHORT Baseline; /* font ascent (baseline) in pixels */
|
||||
USHORT Reversed; /* reversed, =0 */
|
||||
USHORT NumRanges; /* number of character ranges */
|
||||
} BFC_BIN_FONT;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
USHORT FirstChar; /* index of first character */
|
||||
USHORT LastChar; /* index of last charcter */
|
||||
} BFC_BIN_CHARRANGE;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
USHORT Width; /* character width in pixels */
|
||||
USHORT DataSize; /* # bytes/words/dwords of pixel data */
|
||||
ULONG OffData; /* Offset of pixel data */
|
||||
} BFC_BIN_CHARINFO;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //#ifndef _BFC_FONT_H_
|
||||
278
source/Fonts/fontLibrary.c
Normal file
278
source/Fonts/fontLibrary.c
Normal file
@@ -0,0 +1,278 @@
|
||||
/*
|
||||
* fontLibrary.c
|
||||
*
|
||||
* Created on: Feb 9, 2022
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "fontLibrary.h"
|
||||
#include "translate.h"
|
||||
#include "lcd.h"
|
||||
#include "System/system.h"
|
||||
|
||||
//UTF8 Decode
|
||||
// Copyright (c) 2008-2009 Bjoern Hoehrmann <bjoern@hoehrmann.de>
|
||||
// See http://bjoern.hoehrmann.de/utf-8/decoder/dfa/ for details.
|
||||
|
||||
#define UTF8_ACCEPT 0
|
||||
#define UTF8_REJECT 1
|
||||
|
||||
static const uint8_t utf8d[] = {
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, // 00..1f
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, // 20..3f
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, // 40..5f
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, // 60..7f
|
||||
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, // 80..9f
|
||||
7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, // a0..bf
|
||||
8,8,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2, // c0..df
|
||||
0xa,0x3,0x3,0x3,0x3,0x3,0x3,0x3,0x3,0x3,0x3,0x3,0x3,0x4,0x3,0x3, // e0..ef
|
||||
0xb,0x6,0x6,0x6,0x5,0x8,0x8,0x8,0x8,0x8,0x8,0x8,0x8,0x8,0x8,0x8, // f0..ff
|
||||
0x0,0x1,0x2,0x3,0x5,0x8,0x7,0x1,0x1,0x1,0x4,0x6,0x1,0x1,0x1,0x1, // s0..s0
|
||||
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,0,1,0,1,1,1,1,1,1, // s1..s2
|
||||
1,2,1,1,1,1,1,2,1,2,1,1,1,1,1,1,1,1,1,1,1,1,1,2,1,1,1,1,1,1,1,1, // s3..s4
|
||||
1,2,1,1,1,1,1,1,1,2,1,1,1,1,1,1,1,1,1,1,1,1,1,3,1,3,1,1,1,1,1,1, // s5..s6
|
||||
1,3,1,1,1,1,1,3,1,3,1,1,1,1,1,1,1,3,1,1,1,1,1,1,1,1,1,1,1,1,1,1, // s7..s8
|
||||
};
|
||||
|
||||
uint32_t FL_Decode(uint32_t* state, uint32_t* codep, uint32_t byte) //removed inline to make compiler happy
|
||||
{
|
||||
uint32_t type = utf8d[byte];
|
||||
|
||||
*codep = (*state != UTF8_ACCEPT) ?
|
||||
(byte & 0x3fu) | (*codep << 6) :
|
||||
(0xff >> type) & (byte);
|
||||
|
||||
*state = utf8d[256 + *state*16 + type];
|
||||
return *state;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* Get information about first codepoint in a UTF8-encoded string
|
||||
*
|
||||
* \param str UTF8-encoded string
|
||||
* \param codepoint Font to draw string in
|
||||
* \param charCount number of characters in the codepoint
|
||||
* \return UTF8_ACCEPT if valid, UTF8_REJECT otherwise
|
||||
*/
|
||||
uint32_t FL_GetCodepointInfo(const char * str, uint32_t * codepoint, uint32_t * charCount)
|
||||
{
|
||||
uint32_t state = 0;
|
||||
uint32_t count = 0; //character count
|
||||
for(; *str; ++str)
|
||||
{
|
||||
count++;
|
||||
if(!FL_Decode(&state, codepoint, *str))
|
||||
{
|
||||
//found the codepoint
|
||||
*charCount = count;
|
||||
return state;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
uint32_t FL_GetFontHeight(const BFC_FONT * font)
|
||||
{
|
||||
return font->FontHeight;
|
||||
}
|
||||
|
||||
|
||||
//
|
||||
void FL_DrawTranslatedString(const char *str, int16_t x, int16_t y, const BFC_FONT *pFont, LCD_DRAWMODE_t drawMode, FL_ALIGN align)
|
||||
{
|
||||
if(SYS_GetLanguage() < LANG_CHINESE) //Use normal fonts if language NOT Chinese or Korean
|
||||
{
|
||||
FL_DrawString(Translate(str), x, y, pFont, drawMode, align);
|
||||
}
|
||||
else //Chinese or Korean - Use simsun font
|
||||
{
|
||||
//if translate returns different pointer, the translation was not found.
|
||||
char * strTranslated = 0;
|
||||
strTranslated = (char *)Translate(str);
|
||||
if(strTranslated == str)
|
||||
{
|
||||
//Translation string not found. Use English (So we can see the problem!)
|
||||
FL_DrawString(Translate(str), x, y, pFont, drawMode, align);
|
||||
}
|
||||
else
|
||||
{
|
||||
//Translation successful
|
||||
FL_DrawString(Translate(str), x, y, fontSimsun, drawMode, align);
|
||||
}
|
||||
}
|
||||
//FL_DrawString(Translate(str), x, y, pFont, drawMode, align);
|
||||
}
|
||||
|
||||
//Draw a null terminated UTF8 encoded string
|
||||
void FL_DrawString(const char *str, int16_t x, int16_t y, const BFC_FONT *pFont, LCD_DRAWMODE_t drawMode, FL_ALIGN align)
|
||||
{
|
||||
|
||||
switch(align)
|
||||
{
|
||||
case FL_ALIGN_LEFT:
|
||||
break;
|
||||
case FL_ALIGN_CENTER:
|
||||
x -= (FL_GetStringLengthInPixels(str, pFont)) >> 1;
|
||||
break;
|
||||
case FL_ALIGN_RIGHT:
|
||||
x -= FL_GetStringLengthInPixels(str, pFont);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
uint32_t error = 0;
|
||||
uint32_t index = 0;
|
||||
while(str[index] != '\0' && !error)
|
||||
{
|
||||
uint32_t codepoint; //UTF8 code
|
||||
uint32_t charCount; //number of chars in the current codepoint
|
||||
if(FL_GetCodepointInfo(&str[index], &codepoint, &charCount))
|
||||
{
|
||||
codepoint = 0x000A; //not valid UTF8 codepoint so return a distinctive char
|
||||
charCount = 1; //assume 1 byte consumed. It might be wrong but we won't skip any bytes
|
||||
}
|
||||
index += charCount; //Advance index by number of chars consumed from string
|
||||
|
||||
x += FL_DrawChar(codepoint, x, y, pFont, drawMode); //advance x coordinate by glyph width
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Draw a character to the framebuffer
|
||||
* Encode: Unicode
|
||||
* Data length: 8 bits
|
||||
* Invert bits: No
|
||||
* 1 bpp
|
||||
* Data format: Big Endian, Row based, Row preferred, Packed
|
||||
*/
|
||||
uint32_t FL_DrawChar(uint16_t codepoint, int x0, int y0, const BFC_FONT *pFont, LCD_DRAWMODE_t drawMode)
|
||||
{
|
||||
// 1. find the character information first
|
||||
const BFC_CHARINFO *pCharInfo = FL_GetCharInfo(pFont, (unsigned short)codepoint); //cast for this function
|
||||
|
||||
if( pCharInfo != 0 )
|
||||
{
|
||||
int height = pFont->FontHeight;
|
||||
int width = pCharInfo->Width;
|
||||
int data_size = pCharInfo->DataSize; // # bytes of the data array
|
||||
const unsigned char *pData = pCharInfo->p.pData8; // pointer to data array
|
||||
|
||||
int x, y; //pixel coordinates within the glyph
|
||||
unsigned char data;
|
||||
|
||||
uint32_t packedDataSize = 8; //8-bit data ONLY
|
||||
uint32_t bitPosition = packedDataSize-1; //bit position in the byte
|
||||
uint32_t byteIndex = 0;
|
||||
|
||||
unsigned char bitMask[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
|
||||
|
||||
// 2. draw all the pixels in this character
|
||||
for(y=0; y<height; y++)
|
||||
{
|
||||
for(x=0; x<width; x++)
|
||||
{
|
||||
data = pData[byteIndex];
|
||||
|
||||
if(data & bitMask[bitPosition])
|
||||
{
|
||||
LCD_DrawPixel(x0+x, y0+y, drawMode);
|
||||
}
|
||||
|
||||
if(bitPosition == 0)
|
||||
{
|
||||
bitPosition = packedDataSize-1;
|
||||
byteIndex++;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitPosition--;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
return width;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
uint32_t FL_GetStringLengthInPixels(const char * str, const BFC_FONT *pFont)
|
||||
{
|
||||
uint32_t widthInPixels = 0;
|
||||
uint32_t error = 0;
|
||||
uint32_t index = 0;
|
||||
while(str[index] != '\0' && !error)
|
||||
{
|
||||
uint32_t codepoint; //UTF8 code
|
||||
uint32_t charCount; //number of chars in the current codepoint
|
||||
if(FL_GetCodepointInfo(&str[index], &codepoint, &charCount))
|
||||
{
|
||||
while(1); //not valid UTF8 codepoint
|
||||
}
|
||||
index += charCount; //Advance index by number of chars consumed from string
|
||||
|
||||
widthInPixels += FL_GetCharInfo(pFont, str[index])->Width;
|
||||
}
|
||||
|
||||
return widthInPixels;
|
||||
}
|
||||
|
||||
|
||||
|
||||
const BFC_CHARINFO* FL_GetCharInfo(const BFC_FONT *pFont, unsigned short ch)
|
||||
{
|
||||
const BFC_CHARINFO *pCharInfo = 0;
|
||||
const BFC_FONT_PROP *pProp = pFont->p.pProp;
|
||||
unsigned short first_char, last_char;
|
||||
|
||||
if(pFont == 0 || pFont->p.pProp == 0)
|
||||
return 0;
|
||||
|
||||
while(pProp != 0)
|
||||
{
|
||||
first_char = pProp->FirstChar;
|
||||
last_char = pProp->LastChar;
|
||||
pCharInfo = pProp->pFirstCharInfo;
|
||||
|
||||
if( ch >= first_char && ch <= last_char )
|
||||
{
|
||||
// the character "ch" is inside this range,
|
||||
// return this char info, and not search anymore.
|
||||
pCharInfo = pCharInfo + (ch - first_char);
|
||||
return pCharInfo;
|
||||
}
|
||||
else
|
||||
{
|
||||
// the character "ch" is not in this range
|
||||
// so search it in the next range
|
||||
pProp = pProp->pNextProp;
|
||||
}
|
||||
}
|
||||
|
||||
// if the character "ch" is not rendered in this font,
|
||||
// we use the first character in this font as the default one.
|
||||
if( pCharInfo == 0 )
|
||||
{
|
||||
pProp = pFont->p.pProp;
|
||||
pCharInfo = pProp->pFirstCharInfo;
|
||||
}
|
||||
|
||||
return pCharInfo;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
54
source/Fonts/fontLibrary.h
Normal file
54
source/Fonts/fontLibrary.h
Normal file
@@ -0,0 +1,54 @@
|
||||
/*
|
||||
* fontLibrary.h
|
||||
*
|
||||
* Created on: Feb 9, 2022
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
#ifndef FONTS_FONTLIBRARY_H_
|
||||
#define FONTS_FONTLIBRARY_H_
|
||||
|
||||
#include <Fonts/bfcfont.h>
|
||||
#include "../lcd.h" //include for LCD_DRAW_MODE_t
|
||||
#include "translate.h"
|
||||
|
||||
|
||||
//extern all fonts (required)
|
||||
extern const BFC_FONT fontCalibriBoldBasic10_15h[];
|
||||
extern const BFC_FONT fontCalibriBoldBasic11_18h[];
|
||||
extern const BFC_FONT fontCalibriBoldBasic12_19h[];
|
||||
extern const BFC_FONT fontCalibriBoldBasic14_23h[];
|
||||
extern const BFC_FONT fontCalibriBoldBasic16_26h[];
|
||||
extern const BFC_FONT fontCalibriBoldBasic18_29h[];
|
||||
|
||||
extern const BFC_FONT fontSimSunBold12_19h[];
|
||||
|
||||
//quick names for fonts (optional)
|
||||
#define font10Bold fontCalibriBoldBasic10_15h
|
||||
#define font11Bold fontCalibriBoldBasic11_18h
|
||||
#define font12Bold fontCalibriBoldBasic12_19h
|
||||
#define font14Bold fontCalibriBoldBasic14_23h
|
||||
#define font16Bold fontCalibriBoldBasic16_26h
|
||||
#define font18Bold fontCalibriBoldBasic18_29h
|
||||
|
||||
#define fontSimsun fontSimSunBold12_19h
|
||||
|
||||
typedef enum {
|
||||
FL_ALIGN_LEFT,
|
||||
FL_ALIGN_CENTER,
|
||||
FL_ALIGN_RIGHT,
|
||||
FL_ALIGN_NUM
|
||||
} FL_ALIGN;
|
||||
|
||||
|
||||
uint32_t FL_GetCodepointInfo(const char * str, uint32_t * codepoint, uint32_t * charCount);
|
||||
uint32_t FL_GetFontHeight(const BFC_FONT * font);
|
||||
void FL_DrawTranslatedString(const char *str, int16_t x, int16_t y, const BFC_FONT *pFont, LCD_DRAWMODE_t drawMode, FL_ALIGN align);
|
||||
void FL_DrawString(const char *str, int16_t x, int16_t y, const BFC_FONT *font, LCD_DRAWMODE_t drawMode, FL_ALIGN align);
|
||||
uint32_t FL_DrawChar(uint16_t codepoint, int x0, int y0, const BFC_FONT *pFont, LCD_DRAWMODE_t drawMode);
|
||||
uint32_t FL_GetStringLengthInPixels(const char * str, const BFC_FONT *pFont);
|
||||
const BFC_CHARINFO* FL_GetCharInfo(const BFC_FONT *pFont, unsigned short ch);
|
||||
|
||||
|
||||
|
||||
#endif /* FONTS_FONTLIBRARY_H_ */
|
||||
35
source/Fonts/languages.h
Normal file
35
source/Fonts/languages.h
Normal file
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
#ifndef FONTS_LANGUAGES_H_
|
||||
#define FONTS_LANGUAGES_H_
|
||||
|
||||
extern const char * textEnglish[];
|
||||
extern const char * textSpanish[];
|
||||
extern const char * textFrench[];
|
||||
extern const char * textGerman[];
|
||||
extern const char * textItalian[];
|
||||
extern const char * textPolish[];
|
||||
extern const char * textDutch[];
|
||||
extern const char * textPortuguese[];
|
||||
extern const char * textRussian[];
|
||||
extern const char * textSwedish[];
|
||||
extern const char * textDanish[];
|
||||
extern const char * textEstonian[];
|
||||
extern const char * textLatvian[];
|
||||
extern const char * textLithuanian[];
|
||||
extern const char * textCzech[];
|
||||
extern const char * textFinnish[];
|
||||
extern const char * textGreek[];
|
||||
extern const char * textNorwegian[];
|
||||
extern const char * textHungarian[];
|
||||
extern const char * textRomanian[];
|
||||
extern const char * textChinese[];
|
||||
extern const char * textKorean[];
|
||||
|
||||
#endif /* FONTS_LANGUAGES_H_ */
|
||||
|
||||
34
source/Fonts/textChinese.c
Normal file
34
source/Fonts/textChinese.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textChinese[] =
|
||||
{
|
||||
"1 小时",
|
||||
"2 小时",
|
||||
"自动关机",
|
||||
"包含",
|
||||
"频率",
|
||||
"频率",
|
||||
"小时数",
|
||||
"语言",
|
||||
"无线连接",
|
||||
"语言",
|
||||
"无线连接",
|
||||
"加载程序版本",
|
||||
"生产日期",
|
||||
"型号名称",
|
||||
"从不",
|
||||
"监管信息",
|
||||
"监管",
|
||||
"设置",
|
||||
"系统信息",
|
||||
"序列号",
|
||||
"软件版本",
|
||||
"系统信息",
|
||||
};
|
||||
|
||||
34
source/Fonts/textCzech.c
Normal file
34
source/Fonts/textCzech.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 6/26/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textCzech[] =
|
||||
{
|
||||
"1 HODINA",
|
||||
"2 HODINY",
|
||||
"Auto. vypnutí",
|
||||
"Obsahuje",
|
||||
"FREKVENCE",
|
||||
"Frekvence",
|
||||
"Počet hodin",
|
||||
"JAZYK",
|
||||
"RÁDIOVÉ SPOJENÍ",
|
||||
"Jazyk",
|
||||
"Rádiové spojení",
|
||||
"Verze zavaděče",
|
||||
"Datum výroby",
|
||||
"Název modelu",
|
||||
"NIKDY",
|
||||
"REGULAČNÍ INFORMACE",
|
||||
"Právní předpisy",
|
||||
"NASTAVENÍ",
|
||||
"SYSTÉMOVÉ INFO",
|
||||
"Sériové číslo",
|
||||
"Verze softwaru",
|
||||
"Systém. infor.",
|
||||
};
|
||||
|
||||
34
source/Fonts/textDanish.c
Normal file
34
source/Fonts/textDanish.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textDanish[] =
|
||||
{
|
||||
"1 TIME",
|
||||
"2 TIMER",
|
||||
"Auto nedlukning",
|
||||
"Indeholder",
|
||||
"FREKVENSER",
|
||||
"Frekvenser",
|
||||
"Antal timer",
|
||||
"SPROG",
|
||||
"LINK RADIO",
|
||||
"Sprog",
|
||||
"Link radio",
|
||||
"Loader-version",
|
||||
"Fremst.dato",
|
||||
"Modelnavn",
|
||||
"ALDRIG",
|
||||
"LOVGIVNINGSMÆSSIGE OPLYSNINGER",
|
||||
"Lovgivning",
|
||||
"INDSTILLINGER",
|
||||
"SYSTEMOPLYSNINGER",
|
||||
"Serienummer",
|
||||
"Softwarev.",
|
||||
"Systeminfo",
|
||||
};
|
||||
|
||||
34
source/Fonts/textDutch.c
Normal file
34
source/Fonts/textDutch.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textDutch[] =
|
||||
{
|
||||
"1 UUR",
|
||||
"2 UUR",
|
||||
"Automatisch uit",
|
||||
"Bevat",
|
||||
"FREQUENTIES",
|
||||
"Frequenties",
|
||||
"Aantal uur",
|
||||
"TAAL",
|
||||
"LINKRADIO",
|
||||
"Taal",
|
||||
"Linkradio",
|
||||
"Versie loader",
|
||||
"Productiedatum",
|
||||
"Modelnaam",
|
||||
"NOOIT",
|
||||
"WETTELIJKE INFORMATIE",
|
||||
"Wettelijke info",
|
||||
"INSTELLINGEN",
|
||||
"SYSTEEMINFORMATIE",
|
||||
"Serienummer",
|
||||
"Softwareversie",
|
||||
"Systeeminformatie",
|
||||
};
|
||||
|
||||
34
source/Fonts/textEnglish.c
Normal file
34
source/Fonts/textEnglish.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textEnglish[] =
|
||||
{
|
||||
"1 HOUR",
|
||||
"2 HOURS",
|
||||
"Auto Shutdown",
|
||||
"Contains",
|
||||
"FREQUENCIES",
|
||||
"Frequencies",
|
||||
"Hour Count",
|
||||
"LANGUAGE",
|
||||
"LINK RADIO",
|
||||
"Language",
|
||||
"Link Radio",
|
||||
"Loader Version",
|
||||
"Manufacture Date",
|
||||
"Model Name",
|
||||
"NEVER",
|
||||
"REGULATORY INFO",
|
||||
"Regulatory",
|
||||
"SETTINGS",
|
||||
"SYSTEM INFO",
|
||||
"Serial Number",
|
||||
"Software Version",
|
||||
"System Information",
|
||||
};
|
||||
|
||||
34
source/Fonts/textEstonian.c
Normal file
34
source/Fonts/textEstonian.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textEstonian[] =
|
||||
{
|
||||
"1 TUND",
|
||||
"2 TUNDI",
|
||||
"Autom. väljalülitus",
|
||||
"Sisaldab",
|
||||
"SAGEDUSED",
|
||||
"Sagedused",
|
||||
"Töötunnid",
|
||||
"KEEL",
|
||||
"SEO RAADIO",
|
||||
"Keel",
|
||||
"Seo raadio",
|
||||
"Laaduri versioon",
|
||||
"Tootmise kuup.",
|
||||
"Mudeli nimi",
|
||||
"POLE",
|
||||
"NORMATIIVTEAVE",
|
||||
"Normatiivteave",
|
||||
"SEADED",
|
||||
"SÜSTEEMI TEAVE",
|
||||
"Seerianumber",
|
||||
"Tarkvara versioon",
|
||||
"Süsteemi teave",
|
||||
};
|
||||
|
||||
34
source/Fonts/textFinnish.c
Normal file
34
source/Fonts/textFinnish.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textFinnish[] =
|
||||
{
|
||||
"1 TUNTI",
|
||||
"2 TUNTIA",
|
||||
"Autom. sammutus",
|
||||
"Sisältää",
|
||||
"TAAJUUDET",
|
||||
"Taajuudet",
|
||||
"Tuntimäärä",
|
||||
"KIELI",
|
||||
"LANGATON YHTEYS",
|
||||
"Kieli",
|
||||
"Langaton yhteys",
|
||||
"Käynnist.ohj. versio",
|
||||
"Valmistuspäivä",
|
||||
"Mallin nimi",
|
||||
"EI KOSK.",
|
||||
"SÄÄNTELYTIEDOT",
|
||||
"Sääntely",
|
||||
"ASETUKSET",
|
||||
"JÄRJESTELMÄN TIEDOT",
|
||||
"Sarjanumero",
|
||||
"Ohjelmiston versio",
|
||||
"Järjestelmän tiedot",
|
||||
};
|
||||
|
||||
34
source/Fonts/textFrench.c
Normal file
34
source/Fonts/textFrench.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 6/26/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textFrench[] =
|
||||
{
|
||||
"1 HEURE",
|
||||
"2 HEURES",
|
||||
"Arrêt automatique",
|
||||
"Contient",
|
||||
"FRÉQUENCES",
|
||||
"Fréquences",
|
||||
"Décompte horaire",
|
||||
"LANGUE",
|
||||
"LIAISON RADIO",
|
||||
"Langue",
|
||||
"Liaison radio",
|
||||
"Vers. charg. dém.",
|
||||
"Date de fabrication",
|
||||
"Nom du modèle",
|
||||
"JAMAIS",
|
||||
"INFOS RÉGLEMENTAIRES",
|
||||
"Réglementation",
|
||||
"PARAMÈTRES",
|
||||
"INFORMATIONS SUR LE SYSTÈME",
|
||||
"Numéro de série",
|
||||
"Version du logiciel",
|
||||
"Infos système",
|
||||
};
|
||||
|
||||
34
source/Fonts/textGerman.c
Normal file
34
source/Fonts/textGerman.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 6/26/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textGerman[] =
|
||||
{
|
||||
"1 STD.",
|
||||
"2 STDN.",
|
||||
"Auto-Abschaltung",
|
||||
"Enthält",
|
||||
"FREQUENZEN",
|
||||
"Frequenzen",
|
||||
"Stundenzahl",
|
||||
"SPRACHE",
|
||||
"FUNKANBINDUNG",
|
||||
"Sprache",
|
||||
"Funkanbindung",
|
||||
"Bootloader-Version",
|
||||
"Herstellungsdatum",
|
||||
"Modellname",
|
||||
"NIEMALS",
|
||||
"REGULATORISCHE INFORMATION",
|
||||
"Regulatorische Info",
|
||||
"EINSTELLUNGEN",
|
||||
"SYSTEMINFO",
|
||||
"Seriennummer",
|
||||
"Softwareversion",
|
||||
"Systeminformation",
|
||||
};
|
||||
|
||||
34
source/Fonts/textGreek.c
Normal file
34
source/Fonts/textGreek.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textGreek[] =
|
||||
{
|
||||
"1 ΩΡΑ",
|
||||
"2 ΩΡΕΣ",
|
||||
"Αυτόματη απενεργ.",
|
||||
"Περιέχει",
|
||||
"ΣΥΧΝΟΤΗΤΕΣ",
|
||||
"Συχνότητες",
|
||||
"Μέτρηση ωρών",
|
||||
"ΓΛΩΣΣΑ",
|
||||
"ΣΥΝΔΕΣΗ ΑΣΥΡΜΑΤΟΥ",
|
||||
"Γλώσσα",
|
||||
"Σύνδ. ασυρμ.",
|
||||
"Έκδ. προγρ. εκκίν.",
|
||||
"Ημ/α κατασκευής",
|
||||
"Όνομα μοντέλου",
|
||||
"ΠΟΤΕ",
|
||||
"ΚΑΝΟΝΙΣΤΙΚΕΣ ΠΛΗΡΟΦΟΡΙΕΣ",
|
||||
"Κανονιστικά",
|
||||
"ΡΥΘΜΙΣΕΙΣ",
|
||||
"ΠΛΗΡΟΦΟΡΙΕΣ ΣΥΣΤΗΜΑΤΟΣ",
|
||||
"Σειριακός αριθμός",
|
||||
"Έκδοση λογισμικού",
|
||||
"Πληροφορίες συστ.",
|
||||
};
|
||||
|
||||
34
source/Fonts/textHungarian.c
Normal file
34
source/Fonts/textHungarian.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textHungarian[] =
|
||||
{
|
||||
"1 ÓRA",
|
||||
"2 ÓRA",
|
||||
"Automatikus leállítás",
|
||||
"Tartalom",
|
||||
"FREKVENCIÁK",
|
||||
"Frekvenciák",
|
||||
"Óraszám",
|
||||
"NYELV",
|
||||
"RÁDIÓKAPCSOLAT",
|
||||
"Nyelv",
|
||||
"Rádiókapcsolat",
|
||||
"Betöltő verziója",
|
||||
"Gyártás dátuma",
|
||||
"Modellnév",
|
||||
"SOHA",
|
||||
"SZABÁLYOZÁSI INFORMÁCIÓK",
|
||||
"Szabályozás",
|
||||
"BEÁLLÍTÁSOK",
|
||||
"RENDSZERINFÓ",
|
||||
"Sorozatszám",
|
||||
"Szoftververzió",
|
||||
"Rendszerinformáció",
|
||||
};
|
||||
|
||||
34
source/Fonts/textItalian.c
Normal file
34
source/Fonts/textItalian.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textItalian[] =
|
||||
{
|
||||
"1 ORA",
|
||||
"2 ORE",
|
||||
"Spegnim. auto",
|
||||
"Contiene",
|
||||
"FREQUENZE",
|
||||
"Frequenze",
|
||||
"Conteggio ore",
|
||||
"LINGUA",
|
||||
"LINK RADIO",
|
||||
"Lingua",
|
||||
"Link radio",
|
||||
"Versione caricatore",
|
||||
"Data prod.",
|
||||
"Nome modello",
|
||||
"MAI",
|
||||
"INFO NORMATIVE",
|
||||
"Cont. norm.",
|
||||
"IMPOSTAZIONI",
|
||||
"INFO SISTEMA",
|
||||
"Numero serie",
|
||||
"Vers. software",
|
||||
"Info sistema",
|
||||
};
|
||||
|
||||
34
source/Fonts/textKorean.c
Normal file
34
source/Fonts/textKorean.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textKorean[] =
|
||||
{
|
||||
"1시간",
|
||||
"2시간",
|
||||
"자동 종료",
|
||||
"포함",
|
||||
"주파수",
|
||||
"주파수",
|
||||
"시간 수",
|
||||
"언어",
|
||||
"링크 라디오",
|
||||
"언어",
|
||||
"링크 라디오",
|
||||
"로더 버전",
|
||||
"제조 날짜",
|
||||
"모델 이름",
|
||||
"안 함",
|
||||
"규정 정보",
|
||||
"규정",
|
||||
"설정",
|
||||
"시스템 정보",
|
||||
"일련번호",
|
||||
"SW 버전",
|
||||
"시스템 정보",
|
||||
};
|
||||
|
||||
34
source/Fonts/textLatvian.c
Normal file
34
source/Fonts/textLatvian.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textLatvian[] =
|
||||
{
|
||||
"1 ST.",
|
||||
"2 ST.",
|
||||
"Autom. izslēgšanās",
|
||||
"Satur",
|
||||
"FREKVENCES",
|
||||
"Frekvences",
|
||||
"Stundu skaits",
|
||||
"VALODA",
|
||||
"RADIOLĪNIJA",
|
||||
"Valoda",
|
||||
"Radiolīnija",
|
||||
"Sākn. ielādēt. vers.",
|
||||
"Izgatavoš. datums",
|
||||
"Modeļa nosaukums",
|
||||
"NEKAD",
|
||||
"REGULĒJUMA INFORM.",
|
||||
"Regulējums",
|
||||
"IESTATĪJUMI",
|
||||
"SISTĒMAS INFORM.",
|
||||
"Sērijas numurs",
|
||||
"Programmat. vers.",
|
||||
"Sistēmas informācija",
|
||||
};
|
||||
|
||||
34
source/Fonts/textLithuanian.c
Normal file
34
source/Fonts/textLithuanian.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* languages.h
|
||||
*
|
||||
* Created on: 5/24/2024
|
||||
* Author: Brian.Bailey
|
||||
*/
|
||||
|
||||
|
||||
const char * textLithuanian[] =
|
||||
{
|
||||
"1 VAL.",
|
||||
"2 VAL.",
|
||||
"Automat. išjun.",
|
||||
"Sudaro",
|
||||
"DAŽNIAI",
|
||||
"Dažniai",
|
||||
"Val. skaičiav.",
|
||||
"KALBA",
|
||||
"SUSIETI RADIJĄ",
|
||||
"Kalba",
|
||||
"Susieti radiją",
|
||||
"Krautuvo versija",
|
||||
"Pagaminimo data",
|
||||
"Model. pavad.",
|
||||
"NIEKADA",
|
||||
"REGLAMENTAVIMO INFORMACIJA",
|
||||
"Reglamentavimas",
|
||||
"NUOSTATOS",
|
||||
"SISTEMOS INFORMACIJA",
|
||||
"Serijos numeris",
|
||||
"Progr. įr. versija",
|
||||
"Sistemos informacija",
|
||||
};
|
||||
|
||||
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Reference in New Issue
Block a user