/*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ #ifndef _PIN_MUX_H_ #define _PIN_MUX_H_ /*! * @addtogroup pin_mux * @{ */ /*********************************************************************************************************************** * API **********************************************************************************************************************/ #if defined(__cplusplus) extern "C" { #endif /*! * @brief Calls initialization functions. * */ void BOARD_InitBootPins(void); /*! * @brief Enables digital function */ #define IOCON_PIO_DIGITAL_EN 0x80u /*! * @brief Selects pin function 1 */ #define IOCON_PIO_FUNC1 0x01u /*! * @brief Input filter disabled */ #define IOCON_PIO_INPFILT_OFF 0x0100u /*! * @brief Input function is not inverted */ #define IOCON_PIO_INV_DI 0x00u /*! * @brief No addition pin function */ #define IOCON_PIO_MODE_INACT 0x00u /*! * @brief Selects pull-up function */ #define IOCON_PIO_MODE_PULLUP 0x10u /*! * @brief Open drain is disabled */ #define IOCON_PIO_OPENDRAIN_DI 0x00u /*! * @brief Standard mode, output slew rate control is enabled */ #define IOCON_PIO_SLEW_STANDARD 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO010_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO010_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO014_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO014_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO014_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO015_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 1. */ #define PIO015_FUNC_ALT1 0x01u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO016_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 5. */ #define PIO016_FUNC_ALT5 0x05u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO017_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 5. */ #define PIO017_FUNC_ALT5 0x05u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO018_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO018_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO019_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO019_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO020_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 2. */ #define PIO020_FUNC_ALT2 0x02u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO021_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO021_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO022_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 1. */ #define PIO022_FUNC_ALT1 0x01u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO024_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO024_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO025_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO025_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO026_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO026_FUNC_ALT0 0x00u /*! * @brief * Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation. * : Disabled. * I2C 50 ns glitch filter disabled. */ #define PIO026_I2CFILTER_DISABLED 0x01u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO029_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO029_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO029_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO02_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO02_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO030_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO030_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO030_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO03_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO03_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO04_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO04_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO05_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 1. */ #define PIO05_FUNC_ALT1 0x01u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO06_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 1. */ #define PIO06_FUNC_ALT1 0x01u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO07_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO07_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO08_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 2. */ #define PIO08_FUNC_ALT2 0x02u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO09_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 2. */ #define PIO09_FUNC_ALT2 0x02u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO10_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO10_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO10_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO110_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO110_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO111_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO111_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO112_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO112_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO113_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO113_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO114_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO114_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO115_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO115_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO116_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO116_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Pull-down. * Pull-down resistor enabled. */ #define PIO116_MODE_PULL_DOWN 0x01u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO117_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO117_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO11_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO11_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO11_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO12_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO12_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO12_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO13_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO13_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO13_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO14_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO14_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO14_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO15_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO15_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO15_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO16_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 7. */ #define PIO16_FUNC_ALT7 0x07u /*! * @brief Select Analog/Digital mode.: Analog mode. */ #define PIO17_DIGIMODE_ANALOG 0x00u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO17_FUNC_ALT0 0x00u /*! * @brief * Selects function mode (on-chip pull-up/pull-down resistor control). * : Inactive. * Inactive (no pull-down/pull-up resistor enabled). */ #define PIO17_MODE_INACTIVE 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO18_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO18_FUNC_ALT0 0x00u /*! * @brief Select Analog/Digital mode.: Digital mode. */ #define PIO19_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO19_FUNC_ALT0 0x00u /*! @name PIO0_0 (number 31), U18[4]/TO_MUX_P0_0-ISP_RX @{ */ #define BOARD_INITPINS_FC0_MOSI_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_FC0_MOSI_PIN 0U /*!<@brief PORT pin number */ #define BOARD_INITPINS_FC0_MOSI_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_1 (number 32), U6[4]/U22[3]/P0_1-ISP_TX @{ */ #define BOARD_INITPINS_FC0_MISO_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_FC0_MISO_PIN 1U /*!<@brief PORT pin number */ #define BOARD_INITPINS_FC0_MISO_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_11 (number 46), J4[4]/U9[13]/BRIDGE_T_SCK @{ */ #define BOARD_INITPINS_SCLK_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SCLK_PIN 11U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SCLK_PIN_MASK (1U << 11U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_12 (number 47), J4[2]/U9[11]/BRIDGE_T_MOSI @{ */ #define BOARD_INITPINS_SDATA_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SDATA_PIN 12U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SDATA_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_13 (number 48), J4[3]/U15[4]/BRIDGE_T_MISO @{ */ #define BOARD_INITPINS_SDIN_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SDIN_PIN 13U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SDIN_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_29 (number 11), J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED @{ */ #define BOARD_INITPINS_I_OUT1_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_I_OUT1_PIN 29U /*!<@brief PORT pin number */ #define BOARD_INITPINS_I_OUT1_PIN_MASK (1U << 29U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_30 (number 12), J9[2]/P0_30-ADC1 @{ */ #define BOARD_INITPINS_V_OUT1_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_V_OUT1_PIN 30U /*!<@brief PORT pin number */ #define BOARD_INITPINS_V_OUT1_PIN_MASK (1U << 30U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_4 (number 18), J2[18]/J9[10]/P1_4-ADC7-PDM1_CLK-FC7_RTS-FC3_TXD @{ */ #define BOARD_INITPINS_V_CHK_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_V_CHK_PIN 4U /*!<@brief PORT pin number */ #define BOARD_INITPINS_V_CHK_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_3 (number 17), J2[20]/P1_3-FC7_SSEL2-CT32B0_CAP1 @{ */ #define BOARD_INITPINS_ID2_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_ID2_PIN 3U /*!<@brief PORT pin number */ #define BOARD_INITPINS_ID2_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_2 (number 16), J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3 @{ */ #define BOARD_INITPINS_ID1_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_ID1_PIN 2U /*!<@brief PORT pin number */ #define BOARD_INITPINS_ID1_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_1 (number 15), J1[15]/P1_1-FC5_SSEL2 @{ */ #define BOARD_INITPINS_VBAT_MON_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_VBAT_MON_PIN 1U /*!<@brief PORT pin number */ #define BOARD_INITPINS_VBAT_MON_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_0 (number 14), J2[3]/P1_0-PDM0_DATA-CT32B3_MAT1 @{ */ #define BOARD_INITPINS_PSU_MON_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_PSU_MON_PIN 0U /*!<@brief PORT pin number */ #define BOARD_INITPINS_PSU_MON_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_12 (number 51), J2[9]/P1_12-CT32B1_MAT0-ACCl_INT1 @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SIG_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SIG_RST_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SIG_RST_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SIG_RST_PIN 12U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SIG_RST_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_13 (number 54), J2[7]/P1_13-CT32B1_MAT1 @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SD_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SD_RST_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SD_RST_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SD_RST_PIN 13U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SD_RST_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_14 (number 57), J2[1]/P1_14-SCTO7 @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_RAMP_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_RAMP_RST_GPIO_PIN_MASK (1U << 14U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_RAMP_RST_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_RAMP_RST_PIN 14U /*!<@brief PORT pin number */ #define BOARD_INITPINS_RAMP_RST_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_15 (number 62), J1[17]/P1_15-SCTO5-FC7_CTS @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_ON_POLL_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_ON_POLL_GPIO_PIN_MASK (1U << 15U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_ON_POLL_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_ON_POLL_PIN 15U /*!<@brief PORT pin number */ #define BOARD_INITPINS_ON_POLL_PIN_MASK (1U << 15U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_16 (number 7), J1[19]/P1_16-CT32B0_MAT0-GYRO_INT1 @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_CTL_PSU_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_CTL_PSU_GPIO_PIN_MASK (1U << 16U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_CTL_PSU_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_CTL_PSU_PIN 16U /*!<@brief PORT pin number */ #define BOARD_INITPINS_CTL_PSU_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_20 (number 60), J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI @{ */ #define BOARD_INITPINS_FC0_SCK_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_FC0_SCK_PIN 20U /*!<@brief PORT pin number */ #define BOARD_INITPINS_FC0_SCK_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_2 (number 36), J9[1]/P0_2-GPIO_SPI_CS @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SFTKY1_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SFTKY1_GPIO_PIN_MASK (1U << 2U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SFTKY1_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SFTKY1_PIN 2U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SFTKY1_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_3 (number 37), J9[3]/P0_3-GPIO_SPI_CS @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SFTKY2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SFTKY2_GPIO_PIN_MASK (1U << 3U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SFTKY2_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SFTKY2_PIN 3U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SFTKY2_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_7 (number 41), J1[16]/P0_7-FC6_SCK @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_POT_CS_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_POT_CS_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_POT_CS_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_POT_CS_PIN 7U /*!<@brief PORT pin number */ #define BOARD_INITPINS_POT_CS_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_21 (number 61), J2[2]/P0_21-CLKOUT-SPIFI_CLK @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_POT_CS2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_POT_CS2_GPIO_PIN_MASK (1U << 21U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_POT_CS2_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_POT_CS2_PIN 21U /*!<@brief PORT pin number */ #define BOARD_INITPINS_POT_CS2_PIN_MASK (1U << 21U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_16 (number 52), J2[4]/JS28/U4[4]/TCK-SWDCLK_TRGT-SPIFI_IO1 @{ */ #define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PIN 16U /*!<@brief PORT pin number */ #define BOARD_INITPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_17 (number 53), J2[6]/P1[2]/U2[5]/U14[4]/IF_TMS_SWDIO-SPIFI_IO0 @{ */ #define BOARD_INITPINS_DEBUG_SWD_SWDIO_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_DEBUG_SWD_SWDIO_PIN 17U /*!<@brief PORT pin number */ #define BOARD_INITPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 17U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_8 (number 28), J1[12]/J9[6]/P1_8-ADC11-FC7_TXD_SCL_MISO_FRAME @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_LCD_CD_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_LCD_CD_GPIO_PIN_MASK (1U << 8U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_LCD_CD_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_LCD_CD_PIN 8U /*!<@brief PORT pin number */ #define BOARD_INITPINS_LCD_CD_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_19 (number 59), J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_PORT_LE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_PORT_LE_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_PORT_LE_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_PORT_LE_PIN 19U /*!<@brief PORT pin number */ #define BOARD_INITPINS_PORT_LE_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_24 (number 2), J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SFTKY3_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SFTKY3_GPIO_PIN_MASK (1U << 24U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SFTKY3_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SFTKY3_PIN 24U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SFTKY3_PIN_MASK (1U << 24U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_25 (number 3), J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SFTKY4_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SFTKY4_GPIO_PIN_MASK (1U << 25U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SFTKY4_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SFTKY4_PIN 25U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SFTKY4_PIN_MASK (1U << 25U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_14 (number 49), J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3 @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SFTKY0_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SFTKY0_GPIO_PIN_MASK (1U << 14U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SFTKY0_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SFTKY0_PIN 14U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SFTKY0_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_5 (number 19), J2[16]/J9[12]/P1_5-ADC8-PDM1_DAT-FC7_CTS @{ */ #define BOARD_INITPINS_TEMP_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_TEMP_PIN 5U /*!<@brief PORT pin number */ #define BOARD_INITPINS_TEMP_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_26 (number 4), J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_RF_BUSY_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_RF_BUSY_GPIO_PIN_MASK (1U << 26U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_RF_BUSY_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_RF_BUSY_PIN 26U /*!<@brief PORT pin number */ #define BOARD_INITPINS_RF_BUSY_PIN_MASK (1U << 26U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_17 (number 10), J9[9]/P1_17-IR_LEARN_EN @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_E_STOP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_E_STOP_GPIO_PIN_MASK (1U << 17U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_E_STOP_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_E_STOP_PIN 17U /*!<@brief PORT pin number */ #define BOARD_INITPINS_E_STOP_PIN_MASK (1U << 17U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_7 (number 27), J1[10]/P1_7-FC7_RXD_SDA_MOSI_DATA @{ */ #define BOARD_INITPINS_BAT_ID_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_BAT_ID_PIN 7U /*!<@brief PORT pin number */ #define BOARD_INITPINS_BAT_ID_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_9 (number 29), J9[5]/D2[3]/P1_9-BLUE_LED @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SIG_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SIG_EN_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SIG_EN_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SIG_EN_PIN 9U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SIG_EN_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_10 (number 30), J9[8]/D2[4]/P1_10-SCT4-LED_GREEN @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_SD_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_SD_EN_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_SD_EN_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SD_EN_PIN 10U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SD_EN_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_5 (number 39), J1[20]/P0_5-FC6_RXD_SDA_MOSI_DATA @{ */ #define BOARD_INITPINS_RXD_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_RXD_PIN 5U /*!<@brief PORT pin number */ #define BOARD_INITPINS_RXD_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_11 (number 42), J2[19]/P1_11-FC6_RTS_SSEL1-MAG_DRDY @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_RAMP_EN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_RAMP_EN_GPIO_PIN_MASK (1U << 11U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_RAMP_EN_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_RAMP_EN_PIN 11U /*!<@brief PORT pin number */ #define BOARD_INITPINS_RAMP_EN_PIN_MASK (1U << 11U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_10 (number 45), J2[11]/P0_10-FC2_SCK-CT32B3_MAT0 @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_CS_EEP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_CS_EEP_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_CS_EEP_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_CS_EEP_PIN 10U /*!<@brief PORT pin number */ #define BOARD_INITPINS_CS_EEP_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_18 (number 58), J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_WRITE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_WRITE_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_WRITE_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_WRITE_PIN 18U /*!<@brief PORT pin number */ #define BOARD_INITPINS_WRITE_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_22 (number 63), J4[8]/P0_22-BRIDGE_GPIO @{ */ #define BOARD_INITPINS_SYS_CLK_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_SYS_CLK_PIN 22U /*!<@brief PORT pin number */ #define BOARD_INITPINS_SYS_CLK_PIN_MASK (1U << 22U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_8 (number 43), J2[15]/P0_8-FC2_RXD_SDA_MOSI @{ */ #define BOARD_INITPINS_PWM_BAR_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_PWM_BAR_PIN 8U /*!<@brief PORT pin number */ #define BOARD_INITPINS_PWM_BAR_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_9 (number 44), J2[13]/P0_9-FC2_TXD_SCL_MISO @{ */ #define BOARD_INITPINS_PWM_CPU_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_PWM_CPU_PIN 9U /*!<@brief PORT pin number */ #define BOARD_INITPINS_PWM_CPU_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */ /* @} */ /*! @name USB0_DP (number 5), J5[3]/U7[2]/USB_DP @{ */ /* @} */ /*! @name USB0_DM (number 6), J5[2]/U7[3]/USB_DM @{ */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitPins(void); /* Function assigned for the Cortex-M4F */ #if defined(__cplusplus) } #endif /*! * @} */ #endif /* _PIN_MUX_H_ */ /*********************************************************************************************************************** * EOF **********************************************************************************************************************/